[OpenWrt-Devel] Broken GPIO on MT7620 after commit 34ca34b32b02

[Rosen Penev]

On Sun, May 20, 2018 at 1:04 PM, Kristian Evensen
<kristian.evensen at gmail.com> wrote:
> Hello,
>
> When building and testing nightly on an MT7620-device I have (the
> Sanlinking D240), I noticed that changing the state of the two
> exported pins (45 and 46) had no effect. The pins are used to control
> the power to the two mini-PCIe slots on the board, and the devices
> connected to the slots were visible irrespective of if the pin was set
> to high or low.
>
> I bisected the problem to commit 34ca34b32b02 ("ramips: mmc: Sync with
> staging driver"). Reverting the commit makes setting the pins to
> low/high works as expected again.
Hrm unfortunate. I've only tested on mt7621 where it works fine.
> Bisecting further is hard, since the
> commit is a combination of (a lot of) clean-up and some functional
> changes.
Changes can be viewed on the linux-next tree. It should be as simple
as dropping in the relevant files to the files-4.14 directory.

> Would it be possible to revert the commit and split it in two
> parts (clean-up + functional)? Then it should be easier to figure out
> what is wrong.
I'm torn on this. The long term solution is to migrate to the mainline
mtk-sd driver (which is just a newer version of this one). The new
18.06 release does not contain this patch.

I don't really know how hard it would be to port mt7620 to the
mainline driver. mt7621 has been done but has not been upstreamed.
See: https://github.com/jonpry/openwrt_mt7688/commit/a85e6d99899f3dc1204cd5bfba944e17bfa6178f

and https://github.com/jonpry/openwrt_mt7688/commit/24878467a650d765b747618de1a575e79114b764

The mainline driver probably interferes with NAND as well.
>
> BR,
> Kristian

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