[OpenWrt-Devel] [PATCH] ar71xx: fix ar724x clock calculation

[Karl Palsson]

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Weijie Gao <hackpascal at gmail.com> wrote:
> Signed-off-by: Weijie Gao <hackpascal at gmail.com>
> 
> According to the AR7242 datasheet section 2.8, AR724X CPUs use a 40MHz
> input clock as the REF_CLK instead of 5MHz.
> 
> The correct CPU PLL calculation procedure is as follows:
> CPU_PLL = (DIV * REF_CLK) / REF_DIV / 2.
> 
> This patch is compatible with the current calculation procedure with
> default
> DIV and REF_DIV values.
> 
> Test on both AR7240, AR7241 and AR7242.


So, what was the behaviour before?

Cheers,
Karl P

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