No subject

,<br>
that special hack was necessary due to Lantiq's pci(e?)-host silicon do=
ing<br>
byteswaps just for 32-bit writes. The only other system that uses the owl-l=
oader<br>
is ath79/ar71xx. This is a big-endian MIPS as well that didn't need the=
 swap.<br>
<br>
(That said, I don't remember what was the reason for going with __raw_w=
ritel<br>
rather than "iowrite32" though. At least ath9k is using it for th=
e pci access<br>
just fine everywhere.)<br>
<br>
Anyone fancy checking out lantiq and ath79 devices with a AR92XX without th=
e<br>
swap above and the __raw_writel replaced by iowrite32?<br>
<br>
> > ++<br>
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__raw_writel(val, mem +=
 reg);<br>
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0usleep_range(100, 120);=
<br>
> > +=C2=A0 =C2=A0} <br>
<br>
Regards,<br>
Christian<br>
<br>
<br>
<br>
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</blockquote></div>

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