[OpenWrt-Devel] Pending ath79 issues on ar9342 and 4.14/4.19 kernels

Petr Štetiar ynezz at true.cz
Tue Jan 1 19:24:22 EST 2019


this is more like my todo list shared with 蝈蝈 (Guo), but I hope, that I
could get some inputs from others as well. I'm aware about following issues
with ath79 on ar9342 so far, and I don't know how to fix some of them
properly. BTW, everything described bellow works fine on ar71xx using 4.14 or
4.19 kernels.

1. MAC reset issue

 While converting UBNT Nanostation M XW to ath79, I've found out, that the MAC
 isn't properly reset on ath79, resulting in disfunctional networking due to
 MAC_CFG2_CRC_EN bit set in AG71XX_REG_MAC_CFG2. My first naive attempt to fix
 this issue[A], but I wasn't satisfied with this fix it so I've asked for help
 with proper fix.

 With the help of blogic/Guo I've found out, that we need to reset MDIO/GMAC in
 one step, otherwise resetting of MAC doesn't work. ar71xx does this, but ath79
 doesn't, in ath79 we reset MDIO and GMAC separately. I'm able to reset MAC
 properly in ath79 with following changes:

  &eth0 {
    reset-names = "mac", "mdio";
    resets = <&rst 9>, <&rst 22>;

 and using `devm_reset_control_array_get_exclusive` to reset the MAC. But then
 there's issue with MDIO configuration, since MDIO is configured/probed before
 MAC reset and issue with fast reset as well, since on ar71xx it's only
 reseting GMAC0 (bit 9) so it needs someone with better complete picture to fix
 it properly.

2. Different MDIO divider values

 I've observed this on UBNT Bullet M XW.  On ar71xx it's using
 MII_CFG_CLK_DIV_58 fallback value because ag71xx_mdio_get_divider() doesn't
 return anything, but on ath79 it's using MII_CFG_CLK_DIV_50 as computed in
 ag71xx_mdio_get_divider(). I'm not sure if it has significant impact on

3. TX hang workaround is not enabled (DMA engine stuck)

 On ath79 we enable this workaround only for `qca,ar7240-eth`, but in ar71xx
 it's enabled for is_ar724x SoCs (ar724x, ar933x, ar934x, qca9533, tp9343,
 qca955x, qca956x). What is correct? To me it seems, that we should enable it
 for same set of SoCs in ath79 as well, but I'm not 100% sure.

4. Transmit queue 0 timed out

 On ath79 and UBNT Bullet M XW I'm experiencing weird issues during network
 setup[B] which I'm able to reproduce easily with following commands:

  uci set network.lan.ipaddr=''
  uci commit network
  ifup lan

 Resulting after some time in:

  WARNING: CPU: 0 PID: 0 at net/sched/sch_generic.c:461 dev_watchdog+0x16c/0x280
  NETDEV WATCHDOG: eth0 (ag71xx): transmit queue 0 timed out

 Sometimes I'm not able to use networking anymore, sometimes it's enough to
 just ifdown/ifup lan and the network is backup.

 While trying to fix this issue, I've found out about 2. and 3., but fixing
 them in the same way as on ar71xx doesn't help with this issue. Proper MAC
 reset as described in 1. doesn't help with this issue either.

 Any idea what might possibly cause this? Dump of registers looks same on
 ar71xx/ath79 so it's probably something related to code path changes.

A. https://github.com/ynezz/openwrt/commit/9d8f7d52072352dd3ecb4a3c5067307903c48346
B. https://github.com/openwrt/openwrt/pull/1635#issuecomment-448638246

-- ynezz

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