[PATCH] mvebu: Add support for Comtime CT-Router NG 5G
Daniel Danzberger
dd at embedd.com
Wed Apr 9 09:10:53 PDT 2025
The device is a small industrial 5G Router build by comtime GmbH
in Germany.
https://comtime-com.de/router-5g-hutschiene-industrie-anwendung/
Hardware
--------
CPU : Marvell 88F3720 (Armada 3700 family) 64-Bit ARMv8,
Cortex A72, Dual Core, 1GHz
Flash : 128M-bit (Serial NOR-Flash)
eMMC : 4GB, alt. 8GB
RAM : DDR3 RAM 256Mbx16
Modem : Quectel RM520N-GL
Switch: 4 Port Gigabit
USB : 1 Port
Installation
------------
The factory image is already openwrt based, so all you need to do is scp
an image and run sysupgrade. Default login via ssh is admin/admin, but
you can become root by simply running 'su -'.
Steps:
1. Turn on sshd in webUI on 192.168.0.1
2. scp openwrt-mvebu-cortexa53-comtime_ct142-3gpp-emmc-squashfs-sdcard.img.gz admin at 192.168.0.1:/tmp
3. ssh admin at 192.168.0.1
4. su -
5. sysupgrade -n /tmp/openwrt-mvebu-cortexa53-comtime_ct142-3gpp-emmc-squashfs-sdcard.img.gz
Signed-off-by: Daniel Danzberger <dd at embedd.com>
---
.../cortexa53/base-files/etc/board.d/01_leds | 4 +
.../base-files/etc/board.d/02_network | 3 +
.../base-files/lib/upgrade/platform.sh | 3 +
.../marvell/armada-3720-ct142-3gpp-emmc.dts | 58 +++
.../boot/dts/marvell/armada-3720-ct142.dtsi | 332 ++++++++++++++++++
target/linux/mvebu/image/cortexa53.mk | 12 +
6 files changed, 412 insertions(+)
create mode 100644 target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-ct142-3gpp-emmc.dts
create mode 100644 target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-ct142.dtsi
diff --git a/target/linux/mvebu/cortexa53/base-files/etc/board.d/01_leds b/target/linux/mvebu/cortexa53/base-files/etc/board.d/01_leds
index 4dce204f14..84e5266099 100644
--- a/target/linux/mvebu/cortexa53/base-files/etc/board.d/01_leds
+++ b/target/linux/mvebu/cortexa53/base-files/etc/board.d/01_leds
@@ -7,6 +7,10 @@ board_config_update
board=$(board_name)
case "$board" in
+comtime,ct142-3gpp-emmc)
+ ucidef_set_led_default "m2_pwron" "m2_pwron" "m2_pwron" 1
+ ucidef_set_led_default "m2_vbat" "m2_vbat" "m2_vbat" 1
+ ;;
glinet,gl-mv1000)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan"
;;
diff --git a/target/linux/mvebu/cortexa53/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa53/base-files/etc/board.d/02_network
index 6789edb861..2b0387b799 100644
--- a/target/linux/mvebu/cortexa53/base-files/etc/board.d/02_network
+++ b/target/linux/mvebu/cortexa53/base-files/etc/board.d/02_network
@@ -10,6 +10,9 @@ board_config_update
board=$(board_name)
case "$board" in
+comtime,ct142-3gpp-emmc)
+ ucidef_set_interface_lan "lan1 lan2 lan3 lan4"
+ ;;
glinet,gl-mv1000|\
globalscale,espressobin|\
globalscale,espressobin-emmc|\
diff --git a/target/linux/mvebu/cortexa53/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa53/base-files/lib/upgrade/platform.sh
index f77f15ecab..741ba6278d 100755
--- a/target/linux/mvebu/cortexa53/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mvebu/cortexa53/base-files/lib/upgrade/platform.sh
@@ -9,6 +9,7 @@ REQUIRE_IMAGE_METADATA=1
platform_check_image() {
case "$(board_name)" in
+ comtime,ct142-3gpp-emmc|\
glinet,gl-mv1000|\
globalscale,espressobin|\
globalscale,espressobin-emmc|\
@@ -25,6 +26,7 @@ platform_check_image() {
platform_do_upgrade() {
case "$(board_name)" in
+ comtime,ct142-3gpp-emmc|\
glinet,gl-mv1000|\
globalscale,espressobin|\
globalscale,espressobin-emmc|\
@@ -44,6 +46,7 @@ platform_do_upgrade() {
}
platform_copy_config() {
case "$(board_name)" in
+ comtime,ct142-3gpp-emmc|\
glinet,gl-mv1000|\
globalscale,espressobin|\
globalscale,espressobin-emmc|\
diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-ct142-3gpp-emmc.dts b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-ct142-3gpp-emmc.dts
new file mode 100644
index 0000000000..e32736d174
--- /dev/null
+++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-ct142-3gpp-emmc.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Comtime 3GPP Router Board with eMMC
+ * Copyright (C) 2022 Comtime-IT GmbH
+ *
+ */
+
+/dts-v1/;
+
+#include "armada-3720-ct142.dtsi"
+
+/ {
+ model = "Comtime 3GPP Router Board (eMMC)";
+ compatible = "comtime,ct142-3gpp-emmc",
+ "marvell,armada3720", "marvell,armada3710";
+
+ aliases {
+ led-upgrade = &led_l2;
+ };
+};
+
+/*
+ * Rename LEDs
+ */
+&led_l2 {
+ label = "led_NET";
+};
+&led_l3 {
+ label = "led_STATUS";
+};
+&led_l4 {
+ label = "led_QUALITY";
+};
+&led_r1 {
+ label = "led_SIM1";
+};
+&led_r2 {
+ label = "led_SIM2";
+};
+&led_r3 {
+ label = "led_VPN";
+};
+
+&usb3 {
+/*
+ * The USB3 is used for the m.2 slot,
+ * so enable it by default
+ */
+ status = "okay";
+};
+
+&sdhci0 {
+/*
+ * This eMMC is used for the Linux-Kernel and Rootfs,
+ * so enable it by default
+ */
+ status = "okay";
+};
diff --git a/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-ct142.dtsi b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-ct142.dtsi
new file mode 100644
index 0000000000..16fabd82a8
--- /dev/null
+++ b/target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-ct142.dtsi
@@ -0,0 +1,332 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Comtime CT142 Router Board with eMMC
+ * Copyright (C) 2022 Comtime-IT GmbH
+ *
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "armada-372x.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &switch0port1; /* ethaddr at lan1 */
+ ethernet1 = ð0;
+ ethernet2 = &switch0port2;
+ ethernet3 = &switch0port3;
+ ethernet4 = &switch0port4;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ led-running = &led_running;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
+ };
+
+ vcc_sd_reg1: regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vcc_sd1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+
+ gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+ states = <1800000 0x1
+ 3300000 0x0>;
+ enable-active-high;
+ };
+
+ pio-leds {
+ pinctrl-names = "default";
+ compatible = "gpio-leds";
+
+ out_1 {
+ label = "out_1";
+ gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
+ };
+ out_2 {
+ label = "out_2";
+ gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
+ };
+ m2_vbat {
+ label = "m2_vbat";
+ gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
+ };
+ usb_vcc {
+ label = "usb_vcc";
+ gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
+ };
+ led_running: led_pwr {
+ label = "led_PWR";
+ gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ i2c-leds {
+ compatible = "gpio-leds";
+
+ m2_pwron {
+ label = "m2_pwron";
+ gpios = <&gpio_exp 0 GPIO_ACTIVE_HIGH>;
+ };
+ m2_reset {
+ label = "m2_reset";
+ gpios = <&gpio_exp 1 GPIO_ACTIVE_HIGH>;
+ };
+ led_l2: led_l2 {
+ label = "led_L2";
+ gpios = <&gpio_exp 2 GPIO_ACTIVE_LOW>;
+ };
+ led_l3: led_l3 {
+ label = "led_L3";
+ gpios = <&gpio_exp 3 GPIO_ACTIVE_LOW>;
+ };
+ led_l4: led_l4 {
+ label = "led_L4";
+ gpios = <&gpio_exp 4 GPIO_ACTIVE_LOW>;
+ };
+ led_r3: led_r3 {
+ label = "led_R3";
+ gpios = <&gpio_exp 5 GPIO_ACTIVE_LOW>;
+ };
+ led_r1: led_r1 {
+ label = "led_R1";
+ gpios = <&gpio_exp 6 GPIO_ACTIVE_LOW>;
+ };
+ led_r2: led_r2 {
+ label = "led_R2";
+ gpios = <&gpio_exp 7 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpionb 2 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+
+ gpio_export {
+ compatible = "gpio-export";
+ #size-cells = <0>;
+
+ in_1 {
+ gpio-export,name = "in_1";
+ gpio-export,input;
+ gpios = <&gpiosb 20 GPIO_ACTIVE_LOW>;
+ };
+ in_2 {
+ gpio-export,name = "in_2";
+ gpio-export,input;
+ gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
+ reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
+};
+
+&sdhci1 {
+ wp-inverted;
+ bus-width = <4>;
+ cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
+ marvell,pad-type = "sd";
+ vqmmc-supply = <&vcc_sd_reg1>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio_pins>;
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ flash at 0 {
+ reg = <0>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <104000000>;
+ m25p,fast-read;
+
+ /* partition layout applies to u-boot-18.12 */
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition at 0 {
+ label = "bootfw";
+ reg = <0 0x3f0000>;
+ read-only;
+ };
+
+ partition at 3f0000 {
+ label = "u-boot-env";
+ reg = <0x3f0000 0x10000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "okay";
+};
+
+&usb2 {
+ status = "okay";
+};
+
+ð0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
+&mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&smi_pins>;
+ status = "okay";
+
+ switch0 at 1 {
+ compatible = "marvell,mv88e6085";
+ reg = <1>;
+
+ dsa,member = <0 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <ð0>;
+ phy-mode = "rgmii-id";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ switch0port1: port at 1 {
+ reg = <1>;
+ label = "lan1";
+ phy-handle = <&switch0phy0>;
+ };
+
+ switch0port2: port at 2 {
+ reg = <2>;
+ label = "lan2";
+ phy-handle = <&switch0phy1>;
+ };
+
+ switch0port3: port at 3 {
+ reg = <3>;
+ label = "lan3";
+ phy-handle = <&switch0phy2>;
+ };
+
+ switch0port4: port at 4 {
+ reg = <4>;
+ label = "lan4";
+ phy-handle = <&switch0phy3>;
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch0phy0: switch0phy0 at 11 {
+ reg = <0x11>;
+ };
+ switch0phy1: switch0phy1 at 12 {
+ reg = <0x12>;
+ };
+ switch0phy2: switch0phy2 at 13 {
+ reg = <0x13>;
+ };
+ switch0phy3: switch0phy3 at 14 {
+ reg = <0x14>;
+ };
+ };
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ clock-frequency = <100000>;
+ status = "okay";
+ /delete-property/mrvl,i2c-fast-mode;
+
+ gpio_exp: tca6408 at 20 {
+ /* TCA6408A from ti, 8 pin I/O, driver gpio-pca953x */
+ compatible = "ti,tca6408";
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ reg = <0x20>;
+ /*
+ * IO_0: M2_PWRON
+ * IO_1: M2_RESET
+ * IO_2: LED_L2 (left column, 2nd from top)
+ * IO_3: LED_L3
+ * IO_4: LED_L4
+ * IO_5: LED_R3 (right column, 3rd from top)
+ * IO_6: LED_R1
+ * IO_7: LED_R2
+ */
+ };
+
+ rtc: rtc at 32 {
+ /* R2221T from ricoh, driver rtc-rs5c372 */
+ compatible = "ricoh,r2221tl";
+ reg = <0x32>;
+ };
+};
+
+&sdhci0 {
+ non-removable;
+ no-sd;
+ no-sdio;
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ marvell,xenon-emmc;
+ marvell,xenon-tun-count = <9>;
+ marvell,pad-type = "fixed-1-8v";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc_pins>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mmccard: mmccard at 0 {
+ compatible = "mmc-card";
+ reg = <0>;
+ };
+};
diff --git a/target/linux/mvebu/image/cortexa53.mk b/target/linux/mvebu/image/cortexa53.mk
index 67bff6c0b2..395bb397a9 100644
--- a/target/linux/mvebu/image/cortexa53.mk
+++ b/target/linux/mvebu/image/cortexa53.mk
@@ -75,6 +75,18 @@ define Device/globalscale_espressobin-v7-emmc
endef
TARGET_DEVICES += globalscale_espressobin-v7-emmc
+define Device/comtime_ct142-3gpp-emmc
+ $(call Device/Default-arm64)
+ DEVICE_VENDOR := Marvell
+ DEVICE_MODEL := Comtime CT-Router NG 5G
+ DEVICE_PACKAGES += kmod-dsa-mv88e6xxx kmod-gpio-pca953x \
+ kmod-rtc-rs5c372a kmod-i2c-pxa \
+ kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
+ SOC := armada-3720
+ BOOT_SCRIPT := espressobin
+endef
+TARGET_DEVICES += comtime_ct142-3gpp-emmc
+
define Device/marvell_armada-3720-db
$(call Device/Default-arm64)
DEVICE_VENDOR := Marvell
--
2.39.5
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