OpenWrt One - celebrating 20 years of OpenWrt

[Daniel Santos]

On 1/10/24 08:18, Forest Crossman wrote:
> On Tue, Jan 9, 2024 at 4:52 AM John Crispin <john at phrozen.org> wrote:
> ---SNIP---
>> * Why is there no USB 3.x host port on the device?
>> - the USB 3.x and PCIe buses are shared in the selected SoC silicon,
>> hence only a single High-Speed USB port is available
> Perhaps you've already considered this, but it may be possible to
> route the shared PCIe/USB 3 traces to both an M.2 slot and a USB 3
> host port using a high-speed dual-channel differential 1:2/2:1
> switch/mux. It wouldn't enable both interfaces to be used at the same
> time, but it would make it possible to select which interface is
> enabled using a GPIO pin. Then U-boot could either automatically
> enable one port or the other depending on what devices it detects
> (e.g., enable PCIe and disable USB 3 if a PCIe device is connected,
> otherwise enable USB 3 and disable PCIe), or it could be statically
> configurable via a U-boot environment variable.
>
>  From some quick searching, the switches/muxes that would enable this
> cost less than $1 each in qty. 1000. For a <$100 product I understand that
> may be too much of an increase to the BoM cost and PCB complexity, but
> I think users would really appreciate being able to choose between
> being able to add an M.2 SSD, WiFi card, or SATA controller and being
> able to plug in a USB 3.x 2.5 GbE adapter, SSD/flash drive, WiFi
> dongle, or 5G modem.
>
> All the best,
> Forest
>

I'm always a fan of a single PCB design that *can* be built in different 
configurations. So would suggest a design where differential mux can be 
left unpopulated to create a product w/o USB 3 support. But of course, 
this doesn't overcome EMI concerns Daniel Golle mentioned.

Daniel