[OpenWrt-Devel] mt76x8: Strange GPIO numbering on Onion Omega2+

Martin Blumenstingl martin.blumenstingl at googlemail.com
Sat Jun 12 13:02:21 PDT 2021

Hi Lukas,

On Sat, Jun 12, 2021 at 9:49 PM Lukas Zeller <luz at plan44.ch> wrote:
> Hi Gerd,
> > There is still one major issue migrating to 21.02 on my side: Reboot doesn't work. I need to switch power off/on on my Omega2+. AFAIU it has somethoing to do with the SPI 3byte/4byte mode. Older versions worked, but 4byte mode seems to boot faster. BTW: spi-nor spi0.0: mx25l25635e (32768 Kbytes)
> This is a hardware problem of the Omega2+ (so further details -> probably off topic for here). But in short: The SPI flash chip must be in 3-byte mode for the MT7688 to start the way CHIP_MODE pins are wired in the Omega2. A power cycle resets the flash to 3 byte mode, however just a SoC reset does not, and if the SPI chip is in 4 byte mode when the reset occurs, the MT7688 will try to boot in 3 byte mode from a chip that is in 4 byte mode.
There is a "broken-flash-reset" property which probably is missing in
the Omega2+ .dts(i) files
See target/linux/ramips/dts/mt7621_gnubee_gb-pc1.dts for an example on
how it's used

If you have already considered this and my comment does not apply then
please ignore it (I am not familiar with any of the Ralink/Mediatek
SoCs, I just recognized this problem description)

Best regards,

[0] https://elixir.bootlin.com/linux/v5.4.48/source/Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt#L72

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