[PATCH 3/3] at91: add support for sama5d27-wlsom1-ek board

Claudiu Beznea claudiu.beznea at microchip.com
Thu Jul 15 22:08:59 PDT 2021


Add support for SAMA5D27 WLSOM1-EK board.

Hardware:
- SIP: SAMA5D27C-LD2G-CU including SAMA5D27 MPU and 2Gbit LPDDR2-SDRAM
- MMC: one standard SD card interface
- Flash: 64 Mb serial quad I/O flash memory (SST26VF064BEUIT-104I/MF)
	 with embedded EUI-48 and EUI-64 MAC addresses
- USB: one USB device, one USB host one HSIC interface
- Ethernet: 1x10/100Mbps port
- WiFi/BT: IEEE 802.11 b/g/n Wi-Fi plus Bluetooth (Wi-Fi/BT) module
	   (ATWILC3000-MR110UA)
- Crypto: one ATECC608B-TNGTLS secure element
- Video: one LCD RGB 18-bit interface, one ISC 12-bit camera interface
- Debug port: one JTAG interface, one UART interface, one WILC UART
              interface
- Leds: one RGB LED
- Buttons: start, reset, wakeup, user buttons
- Expansion: one tamper connector, one mikrobus interface, 2 XPRO PTC
             connector
- Power managament: PMIC (MCP16502)

Flashing:
- follow procedure at [1]

[1] https://www.linux4sam.org/bin/view/Linux4SAM/Sama5d27WLSom1EKMainPage#Create_a_SD_card_with_the_demo

Signed-off-by: Claudiu Beznea <claudiu.beznea at microchip.com>
---
 package/boot/at91bootstrap/Makefile           |  14 +
 package/boot/uboot-at91/Makefile              |  14 +
 target/linux/at91/image/sama5.mk              |  11 +
 .../at91/patches-5.4/106-add-wlsom1.patch     | 600 ++++++++++++++++++
 4 files changed, 639 insertions(+)
 create mode 100644 target/linux/at91/patches-5.4/106-add-wlsom1.patch

diff --git a/package/boot/at91bootstrap/Makefile b/package/boot/at91bootstrap/Makefile
index 56e14c57703c..8711acd286bd 100644
--- a/package/boot/at91bootstrap/Makefile
+++ b/package/boot/at91bootstrap/Makefile
@@ -118,6 +118,18 @@ define AT91Bootstrap/sama5d27_som1_ekqspi_uboot
   BUILD_DEVICES:=microchip_sama5d27-som1-ek
 endef
 
+define AT91Bootstrap/sama5d27_wlsom1_eksd_uboot
+  TITLE:=AT91Bootstrap for SAMA5D27 WLSOM1 Ek (SDcard0)
+  BUILD_SUBTARGET:=sama5
+  BUILD_DEVICES:=microchip_sama5d27-wlsom1-ek
+endef
+
+define AT91Bootstrap/sama5d27_wlsom1_ekdf_qspi_uboot
+  TITLE:=AT91Bootstrap for SAMA5D27 WLSOM1 Ek (QSPI Flash)
+  BUILD_SUBTARGET:=sama5
+  BUILD_DEVICES:=microchip_sama5d27-wlsom1-ek
+endef
+
 define AT91Bootstrap/sama5d2_ptc_eknf_uboot
   TITLE:=AT91Bootstrap for SAMA5D2 PTC EK (Nand Flash)
   BUILD_SUBTARGET:=sama5
@@ -145,6 +157,8 @@ AT91BOOTSTRAP_TARGETS := \
 	sama5d4_xplainedsd_uboot_secure \
 	sama5d27_som1_eksd1_uboot \
 	sama5d27_som1_ekqspi_uboot \
+	sama5d27_wlsom1_eksd_uboot \
+	sama5d27_wlsom1_ekdf_qspi_uboot \
 	sama5d2_ptc_eknf_uboot \
 	sama5d2_ptc_eksd_uboot
 
diff --git a/package/boot/uboot-at91/Makefile b/package/boot/uboot-at91/Makefile
index 193f26dae471..5aade7de9cf9 100644
--- a/package/boot/uboot-at91/Makefile
+++ b/package/boot/uboot-at91/Makefile
@@ -107,6 +107,18 @@ define U-Boot/sama5d27_som1_ek_qspiflash
   BUILD_DEVICES:=microchip_sama5d27-som1-ek
 endef
 
+define U-Boot/sama5d27_wlsom1_ek_mmc
+  NAME:=SAMA5D27 WLSOM1 Ek (SDCard)
+  BUILD_SUBTARGET:=sama5
+  BUILD_DEVICES:=microchip_sama5d27-wlsom1-ek
+endef
+
+define U-Boot/sama5d27_wlsom1_ek_qspiflash
+  NAME:=SAMA5D27 WLSOM1 Ek (QSPI Flash)
+  BUILD_SUBTARGET:=sama5
+  BUILD_DEVICES:=microchip_sama5d27-wlsom1-ek
+endef
+
 define U-Boot/sama5d2_ptc_ek_nandflash
   NAME:=SAMA5D2 PTC Ek (Nand Flash)
   BUILD_SUBTARGET:=sama5
@@ -133,6 +145,8 @@ UBOOT_TARGETS := \
 	sama5d4_xplained_nandflash\
 	sama5d27_som1_ek_mmc1 \
 	sama5d27_som1_ek_qspiflash \
+	sama5d27_wlsom1_ek_mmc \
+	sama5d27_wlsom1_ek_qspiflash \
 	sama5d2_ptc_ek_nandflash \
 	sama5d2_ptc_ek_mmc
 
diff --git a/target/linux/at91/image/sama5.mk b/target/linux/at91/image/sama5.mk
index d02d09e835ec..af1ef44dc83a 100644
--- a/target/linux/at91/image/sama5.mk
+++ b/target/linux/at91/image/sama5.mk
@@ -87,6 +87,17 @@ define Device/microchip_sama5d27-som1-ek
 endef
 TARGET_DEVICES += microchip_sama5d27-som1-ek
 
+define Device/microchip_sama5d27-wlsom1-ek
+  $(Device/evaluation-dtb)
+  DEVICE_VENDOR := Microchip
+  DEVICE_MODEL := SAMA5D27 WSOM1 Ek
+  DEVICE_DTS := at91-sama5d27_wlsom1_ek
+  SUPPORTED_DEVICES := microchip,sama5d27-wlsom1-ek
+  KERNEL_SIZE := 6144k
+  $(Device/evaluation-sdimage)
+endef
+TARGET_DEVICES += microchip_sama5d27-wlsom1-ek
+
 define Device/microchip_sama5d2-ptc-ek
   $(Device/evaluation-dtb)
   DEVICE_VENDOR := Microchip
diff --git a/target/linux/at91/patches-5.4/106-add-wlsom1.patch b/target/linux/at91/patches-5.4/106-add-wlsom1.patch
new file mode 100644
index 000000000000..9d86aadd0da7
--- /dev/null
+++ b/target/linux/at91/patches-5.4/106-add-wlsom1.patch
@@ -0,0 +1,600 @@
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -48,6 +48,7 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
+ 	at91-kizbox2.dtb \
+ 	at91-nattis-2-natte-2.dtb \
+ 	at91-sama5d27_som1_ek.dtb \
++	at91-sama5d27_wlsom1_ek.dtb \
+ 	at91-sama5d2_icp.dtb \
+ 	at91-sama5d2_ptc_ek.dtb \
+ 	at91-sama5d2_xplained.dtb \
+--- /dev/null
++++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi
+@@ -0,0 +1,314 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
++ *
++ * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
++ *
++ * Author: Nicolas Ferre <nicolas.ferre at microcihp.com>
++ * Author: Eugen Hristev <eugen.hristev at microcihp.com>
++ */
++#include "sama5d2.dtsi"
++#include "sama5d2-pinfunc.h"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/mfd/atmel-flexcom.h>
++#include <dt-bindings/pinctrl/at91.h>
++
++/ {
++	model = "Microchip SAMA5D27 WLSOM1";
++	compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
++
++	aliases {
++		i2c0 = &i2c0;
++	};
++
++	clocks {
++		slow_xtal {
++			clock-frequency = <32768>;
++		};
++
++		main_xtal {
++			clock-frequency = <24000000>;
++		};
++	};
++};
++
++&flx1 {
++	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
++
++	uart6: serial at 200 {
++		pinctrl-0 = <&pinctrl_flx1_default>;
++		pinctrl-names = "default";
++	};
++};
++
++&i2c0 {
++	pinctrl-0 = <&pinctrl_i2c0_default>;
++	pinctrl-1 = <&pinctrl_i2c0_gpio>;
++	pinctrl-names = "default", "gpio";
++	sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
++	scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
++	status = "okay";
++};
++
++&i2c1 {
++	dmas = <0>, <0>;
++	pinctrl-names = "default", "gpio";
++	pinctrl-0 = <&pinctrl_i2c1_default>;
++	pinctrl-1 = <&pinctrl_i2c1_gpio>;
++	sda-gpios = <&pioA PIN_PD19 GPIO_ACTIVE_HIGH>;
++	scl-gpios = <&pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
++	status = "okay";
++
++	mcp16502 at 5b {
++		compatible = "microchip,mcp16502";
++		reg = <0x5b>;
++		status = "okay";
++		lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>;
++
++		regulators {
++			vdd_3v3: VDD_IO {
++				regulator-name = "VDD_IO";
++				regulator-min-microvolt = <1200000>;
++				regulator-max-microvolt = <3700000>;
++				regulator-initial-mode = <2>;
++				regulator-allowed-modes = <2>, <4>;
++				regulator-always-on;
++
++				regulator-state-standby {
++					regulator-on-in-suspend;
++					regulator-mode = <4>;
++				};
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-mode = <4>;
++				};
++			};
++
++			vddio_ddr: VDD_DDR {
++				regulator-name = "VDD_DDR";
++				regulator-min-microvolt = <600000>;
++				regulator-max-microvolt = <1850000>;
++				regulator-initial-mode = <2>;
++				regulator-allowed-modes = <2>, <4>;
++				regulator-always-on;
++
++				regulator-state-standby {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1200000>;
++					regulator-changeable-in-suspend;
++					regulator-mode = <4>;
++				};
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1200000>;
++					regulator-changeable-in-suspend;
++					regulator-mode = <4>;
++				};
++			};
++
++			vdd_core: VDD_CORE {
++				regulator-name = "VDD_CORE";
++				regulator-min-microvolt = <600000>;
++				regulator-max-microvolt = <1850000>;
++				regulator-initial-mode = <2>;
++				regulator-allowed-modes = <2>, <4>;
++				regulator-always-on;
++
++				regulator-state-standby {
++					regulator-on-in-suspend;
++					regulator-mode = <4>;
++				};
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++					regulator-mode = <4>;
++				};
++			};
++
++			vdd_ddr: VDD_OTHER {
++				regulator-name = "VDD_OTHER";
++				regulator-min-microvolt = <1800000>;
++				regulator-max-microvolt = <1800000>;
++				regulator-initial-mode = <2>;
++				regulator-allowed-modes = <2>, <4>;
++				regulator-always-on;
++
++				regulator-state-standby {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++					regulator-changeable-in-suspend;
++					regulator-mode = <4>;
++				};
++
++				regulator-state-mem {
++					regulator-on-in-suspend;
++					regulator-suspend-microvolt = <1800000>;
++					regulator-changeable-in-suspend;
++					regulator-mode = <4>;
++				};
++			};
++
++			LDO1 {
++				regulator-name = "LDO1";
++				regulator-min-microvolt = <1200000>;
++				regulator-max-microvolt = <3700000>;
++				regulator-always-on;
++
++				regulator-state-standby {
++					regulator-on-in-suspend;
++				};
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++
++			LDO2 {
++				regulator-name = "LDO2";
++				regulator-min-microvolt = <1200000>;
++				regulator-max-microvolt = <3700000>;
++				regulator-always-on;
++
++				regulator-state-standby {
++					regulator-on-in-suspend;
++				};
++
++				regulator-state-mem {
++					regulator-off-in-suspend;
++				};
++			};
++		};
++	};
++};
++
++&macb0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_macb0_default>;
++	phy-mode = "rmii";
++
++	ethernet-phy at 0 {
++		reg = <0x0>;
++		interrupt-parent = <&pioA>;
++		interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_macb0_phy_irq>;
++	};
++};
++
++&pmc {
++	atmel,osc-bypass;
++};
++
++&qspi1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_qspi1_default>;
++	status = "disabled";
++
++	qspi1_flash: spi_flash at 0 {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		compatible = "jedec,spi-nor";
++		reg = <0>;
++		spi-max-frequency = <80000000>;
++		spi-rx-bus-width = <4>;
++		spi-tx-bus-width = <4>;
++		m25p,fast-read;
++		status = "disabled";
++
++		at91bootstrap at 0 {
++			label = "at91bootstrap";
++			reg = <0x0 0x40000>;
++		};
++
++		bootloader at 40000 {
++			label = "bootloader";
++			reg = <0x40000 0xc0000>;
++		};
++
++		bootloaderenvred at 100000 {
++			label = "bootloader env redundant";
++			reg = <0x100000 0x40000>;
++		};
++
++		bootloaderenv at 140000 {
++			label = "bootloader env";
++			reg = <0x140000 0x40000>;
++		};
++
++		dtb at 180000 {
++			label = "device tree";
++			reg = <0x180000 0x80000>;
++		};
++
++		kernel at 200000 {
++			label = "kernel";
++			reg = <0x200000 0x600000>;
++		};
++	};
++};
++
++&pioA {
++	pinctrl_flx1_default: flx1_usart_default {
++		pinmux = <PIN_PA24__FLEXCOM1_IO0>,
++			 <PIN_PA23__FLEXCOM1_IO1>,
++			 <PIN_PA25__FLEXCOM1_IO3>,
++			 <PIN_PA26__FLEXCOM1_IO4>;
++		bias-disable;
++	};
++
++	pinctrl_i2c0_default: i2c0_default {
++		pinmux = <PIN_PD21__TWD0>,
++			 <PIN_PD22__TWCK0>;
++		bias-disable;
++	};
++
++	pinctrl_i2c0_gpio: i2c0_gpio {
++		pinmux = <PIN_PD21__GPIO>,
++			 <PIN_PD22__GPIO>;
++		bias-disable;
++	};
++
++	pinctrl_i2c1_default: i2c1_default {
++		pinmux = <PIN_PD19__TWD1>,
++			 <PIN_PD20__TWCK1>;
++		bias-disable;
++	};
++
++	pinctrl_i2c1_gpio: i2c1_gpio {
++		pinmux = <PIN_PD19__GPIO>,
++			 <PIN_PD20__GPIO>;
++		bias-disable;
++	};
++
++	pinctrl_macb0_default: macb0_default {
++		pinmux = <PIN_PB14__GTXCK>,
++			 <PIN_PB15__GTXEN>,
++			 <PIN_PB16__GRXDV>,
++			 <PIN_PB17__GRXER>,
++			 <PIN_PB18__GRX0>,
++			 <PIN_PB19__GRX1>,
++			 <PIN_PB20__GTX0>,
++			 <PIN_PB21__GTX1>,
++			 <PIN_PB22__GMDC>,
++			 <PIN_PB23__GMDIO>;
++		bias-disable;
++	};
++
++	pinctrl_macb0_phy_irq: macb0_phy_irq {
++		pinmux = <PIN_PB24__GPIO>;
++		bias-disable;
++	};
++
++	pinctrl_qspi1_default: qspi1_default {
++		pinmux = <PIN_PB5__QSPI1_SCK>,
++			 <PIN_PB6__QSPI1_CS>,
++			 <PIN_PB7__QSPI1_IO0>,
++			 <PIN_PB8__QSPI1_IO1>,
++			 <PIN_PB9__QSPI1_IO2>,
++			 <PIN_PB10__QSPI1_IO3>;
++		bias-pull-up;
++	};
++};
++
+--- /dev/null
++++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts
+@@ -0,0 +1,270 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
++ *
++ * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
++ *
++ * Author: Nicolas Ferre <nicolas.ferre at microcihp.com>
++ */
++/dts-v1/;
++#include "at91-sama5d27_wlsom1.dtsi"
++#include <dt-bindings/input/input.h>
++
++/ {
++	model = "Microchip SAMA5D27 WLSOM1 EK";
++	compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
++
++	aliases {
++		serial0 = &uart0;	/* DBGU */
++		serial1 = &uart6;	/* BT */
++		serial2 = &uart5;	/* mikro BUS 2 */
++		serial3 = &uart3;	/* mikro BUS 1 */
++		i2c1	= &i2c1;
++	};
++
++	chosen {
++		stdout-path = "serial0:115200n8";
++	};
++
++	gpio_keys {
++		compatible = "gpio-keys";
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_key_gpio_default>;
++		status = "okay";
++
++		sw4 {
++			label = "USER BUTTON";
++			gpios = <&pioA PIN_PB2 GPIO_ACTIVE_LOW>;
++			linux,code = <KEY_PROG1>;
++			wakeup-source;
++		};
++	};
++
++	leds {
++		compatible = "gpio-leds";
++		pinctrl-names = "default";
++		pinctrl-0 = <&pinctrl_led_gpio_default>;
++		status = "okay";
++
++		red {
++			label = "red";
++			gpios = <&pioA PIN_PA6 GPIO_ACTIVE_HIGH>;
++		};
++
++		green {
++			label = "green";
++			gpios = <&pioA PIN_PA7 GPIO_ACTIVE_HIGH>;
++		};
++
++		blue {
++			label = "blue";
++			gpios = <&pioA PIN_PA8 GPIO_ACTIVE_HIGH>;
++			linux,default-trigger = "heartbeat";
++		};
++	};
++};
++
++&adc {
++	vddana-supply = <&vdd_3v3>;
++	vref-supply = <&vdd_3v3>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_adc_default>;
++	status = "okay";
++};
++
++&flx0 {
++	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
++	status = "okay";
++
++	uart5: serial at 200 {
++		pinctrl-0 = <&pinctrl_flx0_default>;
++		pinctrl-names = "default";
++		atmel,use-dma-rx;
++		atmel,use-dma-tx;
++		status = "okay";
++	};
++};
++
++&flx1 {
++	status = "okay";
++
++	uart6: serial at 200 {
++		atmel,use-dma-rx;
++		atmel,use-dma-tx;
++		status = "okay";
++	};
++};
++
++&macb0 {
++	status = "okay";
++};
++
++&pioA {
++	/*
++	 * There is no real pinmux for ADC, if the pin
++	 * is not requested by another peripheral then
++	 * the muxing is done when channel is enabled.
++	 * Requesting pins for ADC is GPIO is
++	 * encouraged to prevent conflicts and to
++	 * disable bias in order to be in the same
++	 * state when the pin is not muxed to the adc.
++	 */
++	pinctrl_adc_default: adc_default {
++		pinmux = <PIN_PD25__GPIO>,
++			 <PIN_PD26__GPIO>;
++		bias-disable;
++	};
++
++	pinctrl_flx0_default: flx0_usart_default {
++		pinmux = <PIN_PB28__FLEXCOM0_IO0>,
++			 <PIN_PB29__FLEXCOM0_IO1>;
++		bias-disable;
++	};
++
++	pinctrl_key_gpio_default: key_gpio_default {
++		pinmux = <PIN_PB2__GPIO>;
++		bias-pull-up;
++	};
++
++	pinctrl_led_gpio_default: led_gpio_default {
++		pinmux = <PIN_PA6__GPIO>,
++			 <PIN_PA7__GPIO>,
++			 <PIN_PA8__GPIO>;
++		bias-pull-down;
++	};
++
++	pinctrl_sdmmc0_default: sdmmc0_default {
++		cmd_data {
++			pinmux = <PIN_PA1__SDMMC0_CMD>,
++				 <PIN_PA2__SDMMC0_DAT0>,
++				 <PIN_PA3__SDMMC0_DAT1>,
++				 <PIN_PA4__SDMMC0_DAT2>,
++				 <PIN_PA5__SDMMC0_DAT3>;
++			bias-disable;
++		};
++
++		ck_cd_vddsel {
++			pinmux = <PIN_PA0__SDMMC0_CK>,
++				 <PIN_PA11__SDMMC0_VDDSEL>,
++				 <PIN_PA12__SDMMC0_WP>,
++				 <PIN_PA13__SDMMC0_CD>;
++			bias-disable;
++		};
++	};
++
++	pinctrl_uart0_default: uart0_default {
++		pinmux = <PIN_PB26__URXD0>,
++			 <PIN_PB27__UTXD0>;
++		bias-disable;
++	};
++
++	pinctrl_uart3_default: uart3_default {
++		pinmux = <PIN_PB11__URXD3>,
++			 <PIN_PB12__UTXD3>;
++		bias-disable;
++	};
++
++	pinctrl_pwm0_default: pwm0_default {
++		pinmux = <PIN_PA31__PWML0>,
++			 <PIN_PA30__PWMH0>;
++		bias-disable;
++	};
++
++	pinctrl_usb_default: usb_default {
++		pinmux = <PIN_PA10__GPIO>;
++		bias-disable;
++	};
++
++	pinctrl_usba_vbus: usba_vbus {
++		pinmux = <PIN_PA16__GPIO>;
++		bias-disable;
++	};
++};
++
++&pwm0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pwm0_default>;
++	status = "okay";
++};
++
++&qspi1 {
++	status = "okay";
++
++	qspi1_flash: spi_flash at 0 {
++		status = "okay";
++	};
++};
++
++&sdmmc0 {
++	bus-width = <4>;
++	mmc-ddr-3_3v;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_sdmmc0_default>;
++	status = "okay";
++};
++
++&shutdown_controller {
++	atmel,shdwc-debouncer = <976>;
++	atmel,wakeup-rtc-timer;
++
++	input at 0 {
++		reg = <0>;
++	};
++};
++
++&tcb0 {
++	timer0: timer at 0 {
++		compatible = "atmel,tcb-timer";
++		reg = <0>;
++	};
++
++	timer1: timer at 1 {
++		compatible = "atmel,tcb-timer";
++		reg = <1>;
++	};
++};
++
++&uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart0_default>;
++	atmel,use-dma-rx;
++	atmel,use-dma-tx;
++	status = "okay";
++};
++
++&uart3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart3_default>;
++	atmel,use-dma-rx;
++	atmel,use-dma-tx;
++	status = "okay";
++};
++
++&usb0 {
++	atmel,vbus-gpio = <&pioA PIN_PA16 GPIO_ACTIVE_HIGH>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usba_vbus>;
++	status = "okay";
++};
++
++&usb1 {
++	num-ports = <3>;
++	atmel,vbus-gpio = <0
++			   &pioA PIN_PA10 GPIO_ACTIVE_HIGH
++			   0
++			  >;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usb_default>;
++	status = "okay";
++};
++
++&usb2 {
++	phy_type = "hsic";
++	status = "okay";
++};
++
++&watchdog {
++	status = "okay";
++};
++
-- 
2.23.0




More information about the openwrt-devel mailing list