[PATCH 2/3] realtek: introduce common DTSI for ZyXEL GS1900-10HP and GS1900-8HP.

Stijn Segers foss at volatilesystems.org
Tue Jan 5 20:04:57 EST 2021


The ZyXEL GS1900-8HP v1, v2 and GS1900-10HP are all built on a similar
Realtek RTL8380M platform. Create a common DTSI in preparation for
GS1900-8HP support, and switch to the macros defined in rtl838x.dtsi.
Memory node is moved out of the rtl838.dtsi and into the device DTS as
well.

We also uppercase the vendor name like they carry it themselves (ZyXEL)
and like used elsewhere in the OpenWrt tree.

Signed-off-by: Stijn Segers <foss at volatilesystems.org>
---
 .../realtek/dts/rtl8380_zyxel_gs1900-10hp.dts | 233 +-----------------
 .../realtek/dts/rtl8380_zyxel_gs1900.dtsi     | 143 +++++++++++
 target/linux/realtek/dts/rtl838x.dtsi         |   5 -
 target/linux/realtek/image/Makefile           |   2 +-
 4 files changed, 153 insertions(+), 230 deletions(-)
 create mode 100644 target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi

diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
index 4458acee2e..0ecd8bd991 100644
--- a/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900-10hp.dts
@@ -1,54 +1,15 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 /dts-v1/;
 
-#include "rtl838x.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
+#include "rtl8380_zyxel_gs1900.dtsi"
 
 / {
 	compatible = "zyxel,gs1900-10hp", "realtek,rtl838x-soc";
-	model = "Zyxel GS1900-10HP Switch";
-
-	aliases {
-		led-boot = &led_sys;
-		led-failsafe = &led_sys;
-		led-running = &led_sys;
-		led-upgrade = &led_sys;
-	};
+	model = "ZyXEL GS1900-10HP Switch";
 
-	chosen {
-		bootargs = "console=ttyS0,115200";
-	};
-
-	gpio1: rtl8231-gpio {
-		status = "okay";
-
-		poe_enable {
-			gpio-hog;
-			gpios = <13 0>;
-			output-high;
-		};
-	};
-
-	keys {
-		compatible = "gpio-keys-polled";
-		poll-interval = <20>;
-
-		reset {
-			label = "reset";
-			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_RESTART>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		led_sys: sys {
-			label = "gs1900:green:sys";
-			gpios = <&gpio0 47 GPIO_ACTIVE_HIGH>;
-		};
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x8000000>;
 	};
 
 	/* i2c of the left SFP cage: port 9 */
@@ -91,192 +52,16 @@
 
 };
 
-&spi0 {
-	status = "okay";
-	flash at 0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition at 0 {
-				label = "u-boot";
-				reg = <0x0 0x40000>;
-				read-only;
-			};
-			partition at 40000 {
-				label = "u-boot-env";
-				reg = <0x40000 0x10000>;
-				read-only;
-			};
-			partition at 50000 {
-				label = "u-boot-env2";
-				reg = <0x50000 0x10000>;
-				read-only;
-			};
-			partition at 60000 {
-				label = "jffs";
-				reg = <0x60000 0x100000>;
-			};
-			partition at 160000 {
-				label = "jffs2";
-				reg = <0x160000 0x100000>;
-			};
-			partition at b260000 {
-				label = "firmware";
-				reg = <0x260000 0x6d0000>;
-				compatible = "denx,uimage";
-			};
-			partition at 930000 {
-				label = "runtime2";
-				reg = <0x930000 0x6d0000>;
-			};
-		};
-	};
-};
-
 &ethernet0 {
 	mdio: mdio-bus {
-		compatible = "realtek,rtl838x-mdio";
-		regmap = <&ethernet0>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		/* Internal phy */
-		phy8: ethernet-phy at 8 {
-			reg = <8>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-		};
-		phy9: ethernet-phy at 9 {
-			reg = <9>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-		};
-		phy10: ethernet-phy at 10 {
-			reg = <10>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-		};
-		phy11: ethernet-phy at 11 {
-			reg = <11>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-		};
-		phy12: ethernet-phy at 12 {
-			reg = <12>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-		};
-		phy13: ethernet-phy at 13 {
-			reg = <13>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-		};
-		phy14: ethernet-phy at 14 {
-			reg = <14>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-		};
-		phy15: ethernet-phy at 15 {
-			reg = <15>;
-			compatible = "ethernet-phy-ieee802.3-c22";
-		};
-		phy24: ethernet-phy at 24 {
-			compatible = "ethernet-phy-ieee802.3-c22";
-			reg = <24>;
-		};
-		phy26: ethernet-phy at 26 {
-			compatible = "ethernet-phy-ieee802.3-c22";
-			reg = <26>;
-		};
+		INTERNAL_PHY(24)
+		INTERNAL_PHY(26)
 	};
 };
 
 &switch0 {
 	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port at 0 {
-			reg = <8>;
-			label = "lan1";
-			phy-handle = <&phy8>;
-			phy-mode = "internal";
-		};
-		port at 1 {
-			reg = <9>;
-			label = "lan2";
-			phy-handle = <&phy9>;
-			phy-mode = "internal";
-		};
-		port at 2 {
-			reg = <10>;
-			label = "lan3";
-			phy-handle = <&phy10>;
-			phy-mode = "internal";
-		};
-		port at 3 {
-			reg = <11>;
-			label = "lan4";
-			phy-handle = <&phy11>;
-			phy-mode = "internal";
-		};
-		port at 4 {
-			reg = <12>;
-			label = "lan5";
-			phy-handle = <&phy12>;
-			phy-mode = "internal";
-		};
-		port at 5 {
-			reg = <13>;
-			label = "lan6";
-			phy-handle = <&phy13>;
-			phy-mode = "internal";
-		};
-		port at 6 {
-			reg = <14>;
-			label = "lan7";
-			phy-handle = <&phy14>;
-			phy-mode = "internal";
-		};
-		port at 7 {
-			reg = <15>;
-			label = "lan8";
-			phy-handle = <&phy15>;
-			phy-mode = "internal";
-		};
-		port at 24 {
-			reg = <24>;
-			label = "lan9";
-			phy-mode = "rgmii-id";
-			phy-handle = <&phy24>;
-			sfp = <&sfp0>;
-
-			fixed-link {
-				speed = <1000>;
-				full-duplex;
-				pause;
-			};
-		};
-		port at 26 {
-			reg = <26>;
-			label = "lan10";
-			phy-mode = "rgmii-id";
-			phy-handle = <&phy26>;
-			sfp = <&sfp1>;
-
-			fixed-link {
-				speed = <1000>;
-				full-duplex;
-				pause;
-			};
-		};
-		port at 28 {
-			ethernet = <&ethernet0>;
-			reg = <28>;
-			phy-mode = "internal";
-			fixed-link {
-				speed = <1000>;
-				full-duplex;
-			};
-		};
+		SWITCH_SFP_PORT(24, 9, rgmii-id)
+		SWITCH_SFP_PORT(26, 10, rgmii-id)
 	};
 };
diff --git a/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
new file mode 100644
index 0000000000..515081008b
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/dts-v1/;
+
+#include "rtl838x.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	aliases {
+		led-boot = &led_sys;
+		led-failsafe = &led_sys;
+		led-running = &led_sys;
+		led-upgrade = &led_sys;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	gpio1: rtl8231-gpio {
+		status = "okay";
+
+		poe_enable {
+			gpio-hog;
+			gpios = <13 0>;
+			output-high;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <20>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_sys: sys {
+			label = "gs1900:green:sys";
+			gpios = <&gpio0 47 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+};
+
+&spi0 {
+	status = "okay";
+	flash at 0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition at 0 {
+				label = "u-boot";
+				reg = <0x0 0x40000>;
+				read-only;
+			};
+			partition at 40000 {
+				label = "u-boot-env";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+			partition at 50000 {
+				label = "u-boot-env2";
+				reg = <0x50000 0x10000>;
+				read-only;
+			};
+			partition at 60000 {
+				label = "jffs";
+				reg = <0x60000 0x100000>;
+			};
+			partition at 160000 {
+				label = "jffs2";
+				reg = <0x160000 0x100000>;
+			};
+			partition at b260000 {
+				label = "firmware";
+				reg = <0x260000 0x6d0000>;
+				compatible = "denx,uimage";
+			};
+			partition at 930000 {
+				label = "runtime2";
+				reg = <0x930000 0x6d0000>;
+			};
+		};
+	};
+};
+
+&ethernet0 {
+	mdio: mdio-bus {
+		compatible = "realtek,rtl838x-mdio";
+		regmap = <&ethernet0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		INTERNAL_PHY(8)
+		INTERNAL_PHY(9)
+		INTERNAL_PHY(10)
+		INTERNAL_PHY(11)
+		INTERNAL_PHY(12)
+		INTERNAL_PHY(13)
+		INTERNAL_PHY(14)
+		INTERNAL_PHY(15)
+	};
+};
+
+&switch0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		SWITCH_PORT(8, 1, internal)
+		SWITCH_PORT(9, 2, internal)
+		SWITCH_PORT(10, 3, internal)
+		SWITCH_PORT(11, 4, internal)
+		SWITCH_PORT(12, 5, internal)
+		SWITCH_PORT(13, 6, internal)
+		SWITCH_PORT(14, 7, internal)
+		SWITCH_PORT(15, 8, internal)
+
+		port at 28 {
+			ethernet = <&ethernet0>;
+			reg = <28>;
+			phy-mode = "internal";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+};
diff --git a/target/linux/realtek/dts/rtl838x.dtsi b/target/linux/realtek/dts/rtl838x.dtsi
index 15d518578b..36d8847a15 100644
--- a/target/linux/realtek/dts/rtl838x.dtsi
+++ b/target/linux/realtek/dts/rtl838x.dtsi
@@ -64,11 +64,6 @@
 		};
 	};
 
-	memory at 0 {
-		device_type = "memory";
-		reg = <0x0 0x8000000>;
-	};
-
 	chosen {
 		bootargs = "console=ttyS0,38400";
 	};
diff --git a/target/linux/realtek/image/Makefile b/target/linux/realtek/image/Makefile
index 85b30aae1e..765e516a0a 100644
--- a/target/linux/realtek/image/Makefile
+++ b/target/linux/realtek/image/Makefile
@@ -68,7 +68,7 @@ TARGET_DEVICES += netgear_gs110tpp-v1
 define Device/zyxel_gs1900-10hp
   SOC := rtl8380
   IMAGE_SIZE := 6976k
-  DEVICE_VENDOR := Zyxel
+  DEVICE_VENDOR := ZyXEL
   DEVICE_MODEL := GS1900-10HP
 endef
 TARGET_DEVICES += zyxel_gs1900-10hp
-- 
2.20.1




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