[PATCH] realtek: update watchdog timer patch
Sander Vanheule
sander at svanheule.net
Wed Dec 1 13:08:23 PST 2021
The Realtek Otto watchdog timer driver was accepted upstream, and is
queued for 5.17. Update the patch's file name, and replace by the final
version.
Signed-off-by: Sander Vanheule <sander at svanheule.net>
---
...dog-add-realtek-otto-watchdog-timer.patch} | 82 +++++++++++++------
1 file changed, 57 insertions(+), 25 deletions(-)
rename target/linux/realtek/patches-5.10/{100-watchdog-add-realtek-otto-watchdog-timer.patch => 008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch} (86%)
diff --git a/target/linux/realtek/patches-5.10/100-watchdog-add-realtek-otto-watchdog-timer.patch b/target/linux/realtek/patches-5.10/008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch
similarity index 86%
rename from target/linux/realtek/patches-5.10/100-watchdog-add-realtek-otto-watchdog-timer.patch
rename to target/linux/realtek/patches-5.10/008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch
index fae478a6246a..735ea445313f 100644
--- a/target/linux/realtek/patches-5.10/100-watchdog-add-realtek-otto-watchdog-timer.patch
+++ b/target/linux/realtek/patches-5.10/008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch
@@ -1,10 +1,7 @@
-From 2dbf0c6e0eebf523008c15794434d2d1a9b1260e Mon Sep 17 00:00:00 2001
-Message-Id: <2dbf0c6e0eebf523008c15794434d2d1a9b1260e.1636018117.git.sander at svanheule.net>
-In-Reply-To: <cover.1636018117.git.sander at svanheule.net>
-References: <cover.1636018117.git.sander at svanheule.net>
+From 293903b9dfe43520f01374dc1661be11d6838c49 Mon Sep 17 00:00:00 2001
From: Sander Vanheule <sander at svanheule.net>
-Date: Sun, 3 Oct 2021 09:25:27 +0200
-Subject: [PATCH v3 2/2] watchdog: Add Realtek Otto watchdog timer
+Date: Thu, 18 Nov 2021 17:29:52 +0100
+Subject: watchdog: Add Realtek Otto watchdog timer
Realtek MIPS SoCs (platform name Otto) have a watchdog timer with
pretimeout notifitication support. The WDT can (partially) hard reset,
@@ -22,17 +19,22 @@ supported platforms. This means that the phase2 interrupt will only fire
at the same time as reset, so implementing phase2 is of little use.
Signed-off-by: Sander Vanheule <sander at svanheule.net>
+Reviewed-by: Guenter Roeck <linux at roeck-us.net>
+Link: https://lore.kernel.org/r/6d060bccbdcc709cfa79203485db85aad3c3beb5.1637252610.git.sander@svanheule.net
+Signed-off-by: Guenter Roeck <linux at roeck-us.net>
---
MAINTAINERS | 7 +
- drivers/watchdog/Kconfig | 13 +
+ drivers/watchdog/Kconfig | 13 ++
drivers/watchdog/Makefile | 1 +
- drivers/watchdog/realtek_otto_wdt.c | 361 ++++++++++++++++++++++++++++
- 4 files changed, 382 insertions(+)
+ drivers/watchdog/realtek_otto_wdt.c | 384 ++++++++++++++++++++++++++++++++++++
+ 4 files changed, 405 insertions(+)
create mode 100644 drivers/watchdog/realtek_otto_wdt.c
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 7a2345ce85213..2e255902dd906 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -14815,6 +14815,13 @@ S: Maintained
+@@ -16122,6 +16122,13 @@ S: Maintained
F: include/sound/rt*.h
F: sound/soc/codecs/rt*
@@ -46,9 +48,11 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
REALTEK RTL83xx SMI DSA ROUTER CHIPS
M: Linus Walleij <linus.walleij at linaro.org>
S: Maintained
+diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
+index 73084e008c2be..bac8901072e23 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
-@@ -995,6 +995,19 @@ config RTD119X_WATCHDOG
+@@ -941,6 +941,19 @@ config RTD119X_WATCHDOG
Say Y here to include support for the watchdog timer in
Realtek RTD1295 SoCs.
@@ -68,9 +72,11 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
config SPRD_WATCHDOG
tristate "Spreadtrum watchdog support"
depends on ARCH_SPRD || COMPILE_TEST
+diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
+index b01007c0396ce..92d8d8530ac6b 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
-@@ -174,6 +174,7 @@ obj-$(CONFIG_IMGPDC_WDT) += imgpdc_wdt.o
+@@ -169,6 +169,7 @@ obj-$(CONFIG_IMGPDC_WDT) += imgpdc_wdt.o
obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o
obj-$(CONFIG_PIC32_WDT) += pic32-wdt.o
obj-$(CONFIG_PIC32_DMT) += pic32-dmt.o
@@ -78,9 +84,12 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
# PARISC Architecture
+diff --git a/drivers/watchdog/realtek_otto_wdt.c b/drivers/watchdog/realtek_otto_wdt.c
+new file mode 100644
+index 0000000000000..60058a0c3ec4d
--- /dev/null
+++ b/drivers/watchdog/realtek_otto_wdt.c
-@@ -0,0 +1,361 @@
+@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+/*
@@ -150,7 +159,7 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
+ struct watchdog_device wdev;
+ struct device *dev;
+ void __iomem *base;
-+ struct clk *clk;
++ unsigned int clk_rate_khz;
+ int irq_phase1;
+};
+
@@ -189,12 +198,7 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
+
+static int otto_wdt_tick_ms(struct otto_wdt_ctrl *ctrl, int prescale)
+{
-+ unsigned int rate_khz = clk_get_rate(ctrl->clk) / 1000;
-+
-+ if (!rate_khz)
-+ return 0;
-+
-+ return DIV_ROUND_CLOSEST(1 << (25 + prescale), rate_khz);
++ return DIV_ROUND_CLOSEST(1 << (25 + prescale), ctrl->clk_rate_khz);
+}
+
+/*
@@ -323,6 +327,34 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
+ WDIOF_PRETIMEOUT,
+};
+
++static void otto_wdt_clock_action(void *data)
++{
++ clk_disable_unprepare(data);
++}
++
++static int otto_wdt_probe_clk(struct otto_wdt_ctrl *ctrl)
++{
++ struct clk *clk = devm_clk_get(ctrl->dev, NULL);
++ int ret;
++
++ if (IS_ERR(clk))
++ return dev_err_probe(ctrl->dev, PTR_ERR(clk), "Failed to get clock\n");
++
++ ret = clk_prepare_enable(clk);
++ if (ret)
++ return dev_err_probe(ctrl->dev, ret, "Failed to enable clock\n");
++
++ ret = devm_add_action_or_reset(ctrl->dev, otto_wdt_clock_action, clk);
++ if (ret)
++ return ret;
++
++ ctrl->clk_rate_khz = clk_get_rate(clk) / 1000;
++ if (ctrl->clk_rate_khz == 0)
++ return dev_err_probe(ctrl->dev, -ENXIO, "Failed to get clock rate\n");
++
++ return 0;
++}
++
+static int otto_wdt_probe_reset_mode(struct otto_wdt_ctrl *ctrl)
+{
+ static const char *mode_property = "realtek,reset-mode";
@@ -380,13 +412,13 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
+ ctrl->base + OTTO_WDT_REG_INTR);
+ iowrite32(OTTO_WDT_CTRL_DEFAULT, ctrl->base + OTTO_WDT_REG_CTRL);
+
-+ ctrl->clk = devm_clk_get(dev, NULL);
-+ if (IS_ERR(ctrl->clk))
-+ return dev_err_probe(dev, PTR_ERR(ctrl->clk), "Failed to get clock\n");
++ ret = otto_wdt_probe_clk(ctrl);
++ if (ret)
++ return ret;
+
+ ctrl->irq_phase1 = platform_get_irq_byname(pdev, "phase1");
+ if (ctrl->irq_phase1 < 0)
-+ return dev_err_probe(dev, ctrl->irq_phase1, "phase1 IRQ not found\n");
++ return ctrl->irq_phase1;
+
+ ret = devm_request_irq(dev, ctrl->irq_phase1, otto_wdt_phase1_isr, 0,
+ "realtek-otto-wdt", ctrl);
@@ -403,7 +435,7 @@ Signed-off-by: Sander Vanheule <sander at svanheule.net>
+
+ /*
+ * Since pretimeout cannot be disabled, min. timeout is twice the
-+ * subsystem resolution. max. timeout is ca. 43s at a bus clock of 200MHz.
++ * subsystem resolution. Max. timeout is ca. 43s at a bus clock of 200MHz.
+ */
+ ctrl->wdev.min_timeout = 2;
+ max_tick_ms = otto_wdt_tick_ms(ctrl, OTTO_WDT_PRESCALE_MAX);
--
2.33.1
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