[OpenWrt-Devel] [PATCH 2/2] ramips: fix and tidy up DTS for D-Link DIR-810L

Adrian Schmutzler mail at adrianschmutzler.de
Tue Mar 3 13:14:34 EST 2020


Hi,

> -----Original Message-----
> From: Roger Pueyo Centelles | Guifi.net [mailto:roger.pueyo at guifi.net]
> Sent: Montag, 2. März 2020 15:59
> To: Adrian Schmutzler <freifunk at adrianschmutzler.de>; openwrt-
> devel at lists.openwrt.org
> Subject: Re: [OpenWrt-Devel] [PATCH 2/2] ramips: fix and tidy up DTS for D-
> Link DIR-810L
> 
> Ah, sorry, I also tested the spi-max-frequency.
> 
> The device reports a mx25l6405d flash chip. I tried all the maximum values in
> the devices' datasheet (Table 10. AC CHARACTERISTICS). All of them worked
> with and without "m25p,fast-read":

thanks for providing this large test series.

> 
> # 10 MHz
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    1m 33.00s user    0m
> 0.01s sys    1m 7.56s
> 
> # 25 MHz
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 34.42s user    0m
> 0.02s sys    0m 23.58s
> 
> # 25 MHz, fast read
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 34.45s user    0m
> 0.02s sys    0m 23.59s
> 
> # 33 MHz
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 34.39s user    0m
> 0.00s sys    0m 23.60s
> 
> # 33 MHz, fast read
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 34.46s user    0m
> 0.01s sys    0m 23.62s
> 
> # 50 MHz
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 26.81s user    0m
> 0.01s sys    0m 18.25s
> 
> # 50 MHz, fast read
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 26.84s user    0m
> 0.00s sys    0m 18.25s
> 
> # 66 MHz
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 26.80s user    0m
> 0.01s sys    0m 18.23s
> 
> # 66 MHz, fast read
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 26.80s user    0m
> 0.02s sys    0m 18.23s
> 
> # 86 MHz
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 26.84s user    0m
> 0.01s sys    0m 18.24s
> 
> # 86 MHz, fast read
> root at OpenWrt:~# time cat /dev/mtd* > /dev/null real    0m 26.80s user    0m
> 0.02s sys    0m 18.23s
> 
> It seems that fast read has no effect --or is always enabled, regardless of the
> DTS--. I also went for 100 MHz and the device failed to boot (both with and
> without fast read).
> 
> You can safely use 33 MHz. I don't know, however, it 50 MHz + fast read is

Why 33 MHz and not 50 MHz, where the duration drops again? I do not get you argumentation here ...

Best

Adrian

> actually working or something else is hindering the max. frequency from
> being achieved.
> 
> Roger
> 
> El 28/2/20 a les 13:33, Roger Pueyo Centelles | Guifi.net ha escrit:
> > Hi Adrian,
> >
> > I tested the patches on the device. I sysupgraded from the current
> > master and everything seems OK.
> >
> > - Partitions
> >
> > root at OpenWrt:~# cat /proc/mtd
> > dev:    size   erasesize  name
> > mtd0: 00030000 00001000 "u-boot"
> > mtd1: 00010000 00001000 "u-boot-env"
> > mtd2: 00010000 00001000 "factory"
> > mtd3: 00010000 00001000 "factory5g"
> > mtd4: 00010000 00001000 "Wolf_Config"
> > mtd5: 00080000 00001000 "MyDlink"
> > mtd6: 00080000 00001000 "Jffs2"
> > mtd7: 00690000 00001000 "firmware"
> > mtd8: 00198a90 00001000 "kernel"
> > mtd9: 004f7570 00001000 "rootfs"
> > mtd10: 001d4000 00001000 "rootfs_data"
> >
> > - Button codes OK both
> >
> > - No missing functionalities
> >
> > I noticed, however, that the green "Internet" LED blinks to the LAN4
> > port, while -I guess- it should blink to the INTERNET (wan/eth0.2) port.
> > But this was already happening before, it's not related to your patch.
> >
> > Roger
> >
> > El 27/2/20 a les 14:46, Adrian Schmutzler ha escrit:
> >> This patch addresses several issues for D-Link DIR-810L:
> >>
> >> - add correct button codes
> >> - harmonize button node names
> >> - use generic flash at 0
> >> - remove unused pin groups from state_default
> >> - improve sorting of properties
> >>
> >> The patch is only build-tested.
> >>
> >> Signed-off-by: Adrian Schmutzler <freifunk at adrianschmutzler.de>
> >>
> >> ---
> >>
> >> If somebody owns this device, I'd be delighted about a test of both
> >> patches in general as well as if somebody would test if higher SPI
> >> frequency is possible.
> >>
> >> ---
> >>  .../ramips/dts/mt7620a_dlink_dir-810l.dts      | 18 ++++++++++--------
> >>  1 file changed, 10 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts
> >> b/target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts
> >> index 0b1ca26ba4..514e9cc354 100644
> >> --- a/target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts
> >> +++ b/target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts
> >> @@ -23,20 +23,20 @@
> >>  		reset {
> >>  			label = "reset";
> >>  			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
> >> -			linux,code = <BTN_0>;
> >> +			linux,code = <KEY_RESTART>;
> >>  		};
> >>
> >>  		wps {
> >>  			label = "wps";
> >>  			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
> >> -			linux,code = <BTN_0>;
> >> +			linux,code = <KEY_WPS_BUTTON>;
> >>  		};
> >>  	};
> >>
> >>  	leds {
> >>  		compatible = "gpio-leds";
> >>
> >> -		led_power_green: power {
> >> +		led_power_green: power_green {
> >>  			label = "dir-810l:green:power";
> >>  			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
> >>  		};
> >> @@ -46,7 +46,7 @@
> >>  			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
> >>  		};
> >>
> >> -		power2 {
> >> +		power_orange {
> >>  			label = "dir-810l:orange:power";
> >>  			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
> >>  		};
> >> @@ -56,7 +56,7 @@
> >>  &spi0 {
> >>  	status = "okay";
> >>
> >> -	m25p80 at 0 {
> >> +	flash at 0 {
> >>  		compatible = "jedec,spi-nor";
> >>  		reg = <0>;
> >>  		spi-max-frequency = <10000000>;
> >> @@ -119,7 +119,7 @@
> >>
> >>  &state_default {
> >>  	gpio {
> >> -		ralink,group = "mdio", "rgmii1", "i2c", "wled", "uartf";
> >> +		ralink,group = "i2c", "uartf";
> >>  		ralink,function = "gpio";
> >>  	};
> >>  };
> >> @@ -130,9 +130,10 @@
> >>  };
> >>
> >>  &gsw {
> >> -	mediatek,port4 = "ephy";
> >>  	pinctrl-names = "default";
> >>  	pinctrl-0 = <&ephy_pins>;
> >> +
> >> +	mediatek,port4 = "ephy";
> >>  };
> >>
> >>  &pcie {
> >> @@ -140,9 +141,10 @@
> >>  };
> >>
> >>  &wmac {
> >> -	ralink,mtd-eeprom = <&factory 0x0>;
> >>  	pinctrl-names = "default";
> >>  	pinctrl-0 = <&pa_pins>;
> >> +
> >> +	ralink,mtd-eeprom = <&factory 0x0>;
> >>  	mtd-mac-address = <&factory 0x28>;
> >>  };
> >>



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