[OpenWrt-Devel] [PATCH] mediatek: mt7623: remove left-over fragments of mt7623a-rfb-emmc
Adrian Schmutzler
freifunk at adrianschmutzler.de
Thu Jan 30 12:59:35 EST 2020
The image creation for the mt7623a-rfb-emmc has been removed during
a patch refresh without specific comment. The corresponding base-files
entries and DTS patches for 4.14 are still there.
Since mt7623 is pretty dead and nobody has missed this device, let's
just remove the rest.
Fixes: 050da2107a7e ("mediatek: backport upstream mediatek patches")
Signed-off-by: Adrian Schmutzler <freifunk at adrianschmutzler.de>
Acked-by: John Crispin <john at phrozen.org>
---
As discussed with John, this is a replacement for the patch
[OpenWrt-Devel,RFC,RFT,2/2] mediatek: mt7623: add back images for mt7623a-rfb-emmc
Just sending it here for documentation.
---
.../mt7623/base-files/etc/board.d/02_network | 4 -
.../mediatek/patches-4.14/0064-dts.patch | 462 ------------------
2 files changed, 466 deletions(-)
diff --git a/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network b/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
index 07fd63fba7..391b1ddc07 100755
--- a/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network
@@ -9,10 +9,6 @@ mediatek_setup_interfaces()
local board="$1"
case $board in
- mediatek,mt7623a-rfb-emmc)
- ucidef_set_interface_lan "lan0 lan1 lan2 lan3"
- ucidef_set_interface_wan eth1
- ;;
bananapi,bpi-r2|\
unielec,u7623-02-emmc-512m)
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "wan"
diff --git a/target/linux/mediatek/patches-4.14/0064-dts.patch b/target/linux/mediatek/patches-4.14/0064-dts.patch
index a2f5000d4d..ec9adfbb48 100644
--- a/target/linux/mediatek/patches-4.14/0064-dts.patch
+++ b/target/linux/mediatek/patches-4.14/0064-dts.patch
@@ -115,468 +115,6 @@
&i2c0 {
pinctrl-names = "default";
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -1061,6 +1061,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
- mt6580-evbp1.dtb \
- mt6589-aquaris5.dtb \
- mt6592-evb.dtb \
-+ mt7623a-rfb-emmc.dtb \
- mt7623n-rfb-nand.dtb \
- mt7623n-bananapi-bpi-r2.dtb \
- mt8127-moose.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/mt7623a-rfb-emmc.dts
-@@ -0,0 +1,449 @@
-+/*
-+ * Copyright 2017 Sean Wang <sean.wang at mediatek.com>
-+ *
-+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+ */
-+
-+/dts-v1/;
-+#include <dt-bindings/input/input.h>
-+#include "mt7623.dtsi"
-+#include "mt6323.dtsi"
-+
-+/ {
-+ model = "MediaTek MT7623N NAND reference board";
-+ compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
-+
-+ aliases {
-+ serial2 = &uart2;
-+ };
-+
-+ chosen {
-+ bootargs = "earlyprintk block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool) rootfstype=squashfs,jffs2";
-+
-+ stdout-path = "serial2:115200n8";
-+ };
-+
-+ memory {
-+ reg = <0 0x80000000 0 0x20000000>;
-+ };
-+
-+ cpus {
-+ cpu at 0 {
-+ proc-supply = <&mt6323_vproc_reg>;
-+ };
-+
-+ cpu at 1 {
-+ proc-supply = <&mt6323_vproc_reg>;
-+ };
-+
-+ cpu at 2 {
-+ proc-supply = <&mt6323_vproc_reg>;
-+ };
-+
-+ cpu at 3 {
-+ proc-supply = <&mt6323_vproc_reg>;
-+ };
-+ };
-+
-+ memory at 80000000 {
-+ reg = <0 0x80000000 0 0x40000000>;
-+ };
-+
-+ mt7530: switch at 0 {
-+ compatible = "mediatek,mt7530";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+};
-+
-+&crypto {
-+ status = "okay";
-+};
-+
-+ð {
-+ status = "okay";
-+
-+ gmac0: mac at 0 {
-+ compatible = "mediatek,eth-mac";
-+ reg = <0>;
-+ phy-mode = "trgmii";
-+
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
-+ pause;
-+ };
-+ };
-+
-+ gmac1: mac at 1 {
-+ compatible = "mediatek,eth-mac";
-+ reg = <1>;
-+ phy-mode = "rgmiii-rxid";
-+ phy-handle = <&phy5>;
-+ };
-+
-+ mdio: mdio-bus {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ phy5: ethernet-phy at 5 {
-+ reg = <5>;
-+ phy-mode = "rgmii-rxid";
-+ };
-+ };
-+};
-+
-+&mt7530 {
-+ compatible = "mediatek,mt7530";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+ pinctrl-names = "default";
-+ mediatek,mcm;
-+ resets = <ðsys 2>;
-+ reset-names = "mcm";
-+ core-supply = <&mt6323_vpa_reg>;
-+ io-supply = <&mt6323_vemc3v3_reg>;
-+
-+ dsa,mii-bus = <&mdio>;
-+
-+ ports {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+
-+ port at 0 {
-+ reg = <0>;
-+ label = "lan0";
-+ cpu = <&cpu_port0>;
-+ };
-+
-+ port at 1 {
-+ reg = <1>;
-+ label = "lan1";
-+ cpu = <&cpu_port0>;
-+ };
-+
-+ port at 2 {
-+ reg = <2>;
-+ label = "lan2";
-+ cpu = <&cpu_port0>;
-+ };
-+
-+ port at 3 {
-+ reg = <3>;
-+ label = "lan3";
-+ cpu = <&cpu_port0>;
-+ };
-+
-+ cpu_port0: port at 6 {
-+ reg = <6>;
-+ label = "cpu";
-+ ethernet = <&gmac0>;
-+ phy-mode = "trgmii";
-+
-+ fixed-link {
-+ speed = <1000>;
-+ full-duplex;
-+ };
-+ };
-+ };
-+};
-+
-+&i2c0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c0_pins_a>;
-+ status = "okay";
-+};
-+
-+&i2c1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c1_pins_a>;
-+ status = "okay";
-+};
-+
-+&mmc0 {
-+ pinctrl-names = "default", "state_uhs";
-+ pinctrl-0 = <&mmc0_pins_default>;
-+ pinctrl-1 = <&mmc0_pins_uhs>;
-+ status = "okay";
-+ bus-width = <8>;
-+ max-frequency = <50000000>;
-+ cap-mmc-highspeed;
-+ vmmc-supply = <&mt6323_vemc3v3_reg>;
-+ vqmmc-supply = <&mt6323_vio18_reg>;
-+ non-removable;
-+};
-+
-+&mmc1 {
-+ pinctrl-names = "default", "state_uhs";
-+ pinctrl-0 = <&mmc1_pins_default>;
-+ pinctrl-1 = <&mmc1_pins_uhs>;
-+ status = "okay";
-+ bus-width = <4>;
-+ max-frequency = <50000000>;
-+ cap-sd-highspeed;
-+ cd-gpios = <&pio 261 0>;
-+ vmmc-supply = <&mt6323_vmch_reg>;
-+ vqmmc-supply = <&mt6323_vio18_reg>;
-+};
-+
-+&pio {
-+ cir_pins_a:cir at 0 {
-+ pins_cir {
-+ pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
-+ bias-disable;
-+ };
-+ };
-+
-+ i2c0_pins_a: i2c at 0 {
-+ pins_i2c0 {
-+ pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
-+ <MT7623_PIN_76_SCL0_FUNC_SCL0>;
-+ bias-disable;
-+ };
-+ };
-+
-+ i2c1_pins_a: i2c at 1 {
-+ pin_i2c1 {
-+ pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
-+ <MT7623_PIN_58_SCL1_FUNC_SCL1>;
-+ bias-disable;
-+ };
-+ };
-+
-+ i2s0_pins_a: i2s at 0 {
-+ pin_i2s0 {
-+ pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
-+ <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
-+ <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
-+ <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
-+ <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
-+ drive-strength = <MTK_DRIVE_12mA>;
-+ bias-pull-down;
-+ };
-+ };
-+
-+ i2s1_pins_a: i2s at 1 {
-+ pin_i2s1 {
-+ pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
-+ <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
-+ <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
-+ <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
-+ <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
-+ drive-strength = <MTK_DRIVE_12mA>;
-+ bias-pull-down;
-+ };
-+ };
-+
-+ mmc0_pins_default: mmc0default {
-+ pins_cmd_dat {
-+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
-+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
-+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
-+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
-+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
-+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
-+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
-+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
-+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
-+ input-enable;
-+ bias-pull-up;
-+ };
-+
-+ pins_clk {
-+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
-+ bias-pull-down;
-+ };
-+
-+ pins_rst {
-+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
-+ bias-pull-up;
-+ };
-+ };
-+
-+ mmc0_pins_uhs: mmc0 {
-+ pins_cmd_dat {
-+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
-+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
-+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
-+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
-+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
-+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
-+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
-+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
-+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
-+ input-enable;
-+ drive-strength = <MTK_DRIVE_2mA>;
-+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
-+ };
-+
-+ pins_clk {
-+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
-+ drive-strength = <MTK_DRIVE_2mA>;
-+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
-+ };
-+
-+ pins_rst {
-+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
-+ bias-pull-up;
-+ };
-+ };
-+
-+ mmc1_pins_default: mmc1default {
-+ pins_cmd_dat {
-+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
-+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
-+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
-+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
-+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
-+ input-enable;
-+ drive-strength = <MTK_DRIVE_4mA>;
-+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
-+ };
-+
-+ pins_clk {
-+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
-+ bias-pull-down;
-+ drive-strength = <MTK_DRIVE_4mA>;
-+ };
-+
-+ pins_wp {
-+ pinmux = <MT7623_PIN_29_EINT7_FUNC_MSDC1_WP>;
-+ input-enable;
-+ bias-pull-up;
-+ };
-+
-+ pins_insert {
-+ pinmux = <MT7623_PIN_261_MSDC1_INS_FUNC_GPIO261>;
-+ bias-pull-up;
-+ };
-+ };
-+
-+ mmc1_pins_uhs: mmc1 {
-+ pins_cmd_dat {
-+ pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
-+ <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
-+ <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
-+ <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
-+ <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
-+ input-enable;
-+ drive-strength = <MTK_DRIVE_4mA>;
-+ bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
-+ };
-+
-+ pins_clk {
-+ pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
-+ drive-strength = <MTK_DRIVE_4mA>;
-+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
-+ };
-+ };
-+
-+ pwm_pins_a: pwm at 0 {
-+ pins_pwm {
-+ pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
-+ <MT7623_PIN_204_PWM1_FUNC_PWM1>,
-+ <MT7623_PIN_205_PWM2_FUNC_PWM2>,
-+ <MT7623_PIN_206_PWM3_FUNC_PWM3>,
-+ <MT7623_PIN_207_PWM4_FUNC_PWM4>;
-+ };
-+ };
-+
-+ spi0_pins_a: spi at 0 {
-+ pins_spi {
-+ pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
-+ <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
-+ <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
-+ <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
-+ bias-disable;
-+ };
-+ };
-+
-+ uart0_pins_a: uart at 0 {
-+ pins_dat {
-+ pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
-+ <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
-+ };
-+ };
-+
-+ uart1_pins_a: uart at 1 {
-+ pins_dat {
-+ pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
-+ <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
-+ };
-+ };
-+};
-+
-+&pwm {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pwm_pins_a>;
-+ status = "okay";
-+};
-+
-+&pwrap {
-+ mt6323 {
-+ mt6323led: led {
-+ compatible = "mediatek,mt6323-led";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ led at 0 {
-+ reg = <0>;
-+ label = "bpi-r2:isink:green";
-+ default-state = "off";
-+ };
-+
-+ led at 1 {
-+ reg = <1>;
-+ label = "bpi-r2:isink:red";
-+ default-state = "off";
-+ };
-+
-+ led at 2 {
-+ reg = <2>;
-+ label = "bpi-r2:isink:blue";
-+ default-state = "off";
-+ };
-+ };
-+ };
-+};
-+
-+&spi0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&spi0_pins_a>;
-+ status = "okay";
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins_a>;
-+ status = "disabled";
-+};
-+
-+&uart1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart1_pins_a>;
-+ status = "disabled";
-+};
-+
-+&uart2 {
-+ status = "okay";
-+};
-+
-+&usb1 {
-+ vusb33-supply = <&mt6323_vusb_reg>;
-+ status = "okay";
-+};
-+
-+&usb2 {
-+ vusb33-supply = <&mt6323_vusb_reg>;
-+ status = "okay";
-+};
-+
-+&u3phy1 {
-+ status = "okay";
-+};
-+
-+&u3phy2 {
-+ status = "okay";
-+};
-+
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -326,6 +326,7 @@
--
2.20.1
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