[OpenWrt-Devel] ramips/mt7621 after 5.4 switch

Andre Valentin avalentin at marcant.net
Fri Apr 10 08:28:49 EDT 2020


Hi Sergio

Am 10.04.20 um 13:36 schrieb Sergio Paracuellos:
>> cat /proc/interrupts new:
>>            CPU0       CPU1       CPU2       CPU3
>>   8:      75188      75268      75341      75246  MIPS GIC Local   1  timer
>>   9:      24413          0          0          0  MIPS GIC  63  IPI call
>>  10:          0       4442          0          0  MIPS GIC  64  IPI call
>>  11:          0          0      33324          0  MIPS GIC  65  IPI call
>>  12:          0          0          0       4574  MIPS GIC  66  IPI call
>>  13:       3424          0          0          0  MIPS GIC  67  IPI resched
>>  14:          0       4124          0          0  MIPS GIC  68  IPI resched
>>  15:          0          0       3974          0  MIPS GIC  69  IPI resched
>>  16:          0          0          0       4150  MIPS GIC  70  IPI resched
>>  17:          0          0          0          0  MIPS GIC  19  1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
>>  19:        829          0          0          0  MIPS GIC  33  ttyS0
>>  20:          0          0          0          0  MIPS GIC  29  xhci-hcd:usb1
>>  21:        817          0          0          0  MIPS GIC  10  1e100000.ethernet
>>  23:          0          0          0          0  MIPS GIC  11  mt7615e
>> ERR:          1
>>
>>
>> cat /proc/interrupts old:
>>
>>            CPU0       CPU1       CPU2       CPU3
>>   8:      25513      25556      25674      25681  MIPS GIC Local   1  timer
>>   9:      23603          0          0          0  MIPS GIC  63  IPI call
>>  10:          0       4383          0          0  MIPS GIC  64  IPI call
>>  11:          0          0      32117          0  MIPS GIC  65  IPI call
>>  12:          0          0          0       4189  MIPS GIC  66  IPI call
>>  13:       3428          0          0          0  MIPS GIC  67  IPI resched
>>  14:          0       4144          0          0  MIPS GIC  68  IPI resched
>>  15:          0          0       3812          0  MIPS GIC  69  IPI resched
>>  16:          0          0          0       3769  MIPS GIC  70  IPI resched
>>  17:          0          0          0          0  MIPS GIC  19  1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
>>  19:       1022          0          0          0  MIPS GIC  33  ttyS0
>>  20:          0          0          0          0  MIPS GIC  29  xhci-hcd:usb1
>>  21:        269          0          0          0  MIPS GIC  10  1e100000.ethernet
>>  24:       1131          0          0          0  MIPS GIC  31  mt7615e
>> ERR:          0
>> => Interesting, different interrupts.
> 
> That's weird. Should be the same, AFAICT.
> Needs some investigation but looks like you are not getting interrupts
> at all according to these traces...
> 
> Looking into my gnubee I got also 23, 24 and 25.
> 
> # cat /proc/interrupts
>            CPU0       CPU1       CPU2       CPU3
>   7:          0          0          0          0      MIPS   7  timer
>   8:       3537       3346       3296       3351  MIPS GIC Local   1  timer
>   9:       3025          0          0          0  MIPS GIC  63  IPI call
>  10:          0       1209          0          0  MIPS GIC  64  IPI call
>  11:          0          0       2805          0  MIPS GIC  65  IPI call
>  12:          0          0          0       1200  MIPS GIC  66  IPI call
>  13:       1428          0          0          0  MIPS GIC  67  IPI resched
>  14:          0       4136          0          0  MIPS GIC  68  IPI resched
>  15:          0          0        872          0  MIPS GIC  69  IPI resched
>  16:          0          0          0        666  MIPS GIC  70  IPI resched
>  17:          0          0          0          0  MIPS GIC  19
> 1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
>  18:        138          0          0          0  MIPS GIC  33  ttyS0
>  19:          0          0          0          0  MIPS GIC  27  1e130000.sdhci
>  20:         26          0          0          0  MIPS GIC  29  xhci-hcd:usb1
>  21:          7          0          0          0  MIPS GIC  10
> 1e100000.ethernet
>  23:          0          0          0          0  MIPS GIC  11
> ahci[0000:01:00.0]
>  24:          0          0          0          0  MIPS GIC  31
> ahci[0000:02:00.0]
>  25:        279          0          0          0  MIPS GIC  32
> ahci[0000:03:00.0]
>  26:          0          0          0          0  1e000600.gpio  18  reset
> ERR:          0
> 
> 
>>
>> Diff DTS old to new driver:
>> diff --git b/target/linux/ramips/dts/mt7621.dtsi a/target/linux/ramips/dts/mt7621.dtsi
>> index 0bf1069b5c..63befa1fdc 100644
>> --- b/target/linux/ramips/dts/mt7621.dtsi
>> +++ a/target/linux/ramips/dts/mt7621.dtsi
>> @@ -557,9 +550,10 @@
>>
>>         pcie: pcie at 1e140000 {
>>                 compatible = "mediatek,mt7621-pci";
>> -               reg = <0x1e140000 0x100
>> -                       0x1e142000 0x100>;
>> -
>> +               reg = <0x1e140000 0x100     /* host-pci bridge registers */
>> +                       0x1e142000 0x100    /* pcie port 0 RC control registers */
>> +                       0x1e143000 0x100    /* pcie port 1 RC control registers */
>> +                       0x1e144000 0x100>;  /* pcie port 2 RC control registers */
>>                 #address-cells = <3>;
>>                 #size-cells = <2>;
>>
>> @@ -574,10 +568,11 @@
>>                         0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
>>                 >;
>>
>> -               interrupt-parent = <&gic>;
>> -               interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
>> -                               GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
>> -                               GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
>> +               #interrupt-cells = <1>;
>> +               interrupt-map-mask = <0xF0000 0 0 1>;
>> +               interrupt-map = <0x10000 0 0 1 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <0x20000 0 0 1 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>,
>> +                               <0x30000 0 0 1 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
>>
>>                 status = "disabled";
> 
> New driver uses common:
> 
> host->map_irq = of_irq_parse_and_map_pci;
> host->swizzle_irq = pci_common_swizzle;
> 
> instead of pcibios_map_irq stuff... Because you are only using slot 1
> maybe if slot 0 is not in use we have to map the irq in slot 0 into
> the slot 1...
> 
> Does these changes makes the job for you? 
No, it does not work. Again I get this:
root at OpenWrt:/# cat /proc/interrupts
           CPU0       CPU1       CPU2       CPU3
  8:      10317      10061      10366      10342  MIPS GIC Local   1  timer
  9:      10946          0          0          0  MIPS GIC  63  IPI call
 10:          0       1973          0          0  MIPS GIC  64  IPI call
 11:          0          0      24992          0  MIPS GIC  65  IPI call
 12:          0          0          0       2087  MIPS GIC  66  IPI call
 13:       1795          0          0          0  MIPS GIC  67  IPI resched
 14:          0       2072          0          0  MIPS GIC  68  IPI resched
 15:          0          0       1883          0  MIPS GIC  69  IPI resched
 16:          0          0          0       1920  MIPS GIC  70  IPI resched
 17:          0          0          0          0  MIPS GIC  19  1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
 19:        149          0          0          0  MIPS GIC  33  ttyS0
 20:          0          0          0          0  MIPS GIC  29  xhci-hcd:usb1
 21:         10          0          0          0  MIPS GIC  10  1e100000.ethernet
 23:          0          0          0          0  MIPS GIC  11  mt7615e
ERR:          1

Shouldn't at least be something about pci interrupts here?
root at OpenWrt:/sys/kernel/debug/pinctrl/pinctrl-rt2880-pinmux# cat *
GPIO ranges handled:
registered pin groups:
group: uart1
pin 1 (io1)
pin 2 (io2)

group: i2c
pin 3 (io3)
pin 4 (io4)

group: uart3
pin 5 (io5)
pin 6 (io6)
pin 7 (io7)
pin 8 (io8)

group: uart2
pin 9 (io9)
pin 10 (io10)
pin 11 (io11)
pin 12 (io12)

group: jtag
pin 13 (io13)
pin 14 (io14)
pin 15 (io15)
pin 16 (io16)
pin 17 (io17)

group: wdt
pin 18 (io18)

group: pcie
pin 19 (io19)

group: mdio
pin 20 (io20)
pin 21 (io21)

group: rgmii2
pin 22 (io22)
pin 23 (io23)
pin 24 (io24)
pin 25 (io25)
pin 26 (io26)
pin 27 (io27)
pin 28 (io28)
pin 29 (io29)
pin 30 (io30)
pin 31 (io31)
pin 32 (io32)
pin 33 (io33)

group: spi
pin 34 (io34)
pin 35 (io35)
pin 36 (io36)
pin 37 (io37)
pin 38 (io38)
pin 39 (io39)
pin 40 (io40)

group: sdhci
pin 41 (io41)
pin 42 (io42)
pin 43 (io43)
pin 44 (io44)
pin 45 (io45)
pin 46 (io46)
pin 47 (io47)
pin 48 (io48)

group: rgmii1
pin 49 (io49)
pin 50 (io50)
pin 51 (io51)
pin 52 (io52)
pin 53 (io53)
pin 54 (io54)
pin 55 (io55)
pin 56 (io56)
pin 57 (io57)
pin 58 (io58)
pin 59 (io59)
pin 60 (io60)

function: gpio, groups = [ uart1 i2c uart3 uart2 jtag wdt pcie mdio rgmii2 spi sdhci rgmii1 ]
function: uart1, groups = [ uart1 ]
function: i2c, groups = [ i2c ]
function: uart3, groups = [ uart3 ]
function: i2s, groups = [ uart3 ]
function: spdif3, groups = [ uart3 ]
function: uart2, groups = [ uart2 ]
function: pcm, groups = [ uart2 ]
function: spdif2, groups = [ uart2 ]
function: jtag, groups = [ jtag ]
function: wdt rst, groups = [ wdt ]
function: wdt refclk, groups = [ wdt ]
function: pcie rst, groups = [ pcie ]
function: pcie refclk, groups = [ pcie ]
function: mdio, groups = [ mdio ]
function: rgmii2, groups = [ rgmii2 ]
function: spi, groups = [ spi ]
function: nand1, groups = [ spi ]
function: sdhci, groups = [ sdhci ]
function: nand2, groups = [ sdhci ]
function: rgmii1, groups = [ rgmii1 ]
Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
pin 0 (io0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 1 (io1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 2 (io2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 3 (io3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 4 (io4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 5 (io5): pinctrl (GPIO UNCLAIMED) function gpio group uart3
pin 6 (io6): pinctrl (GPIO UNCLAIMED) function gpio group uart3
pin 7 (io7): pinctrl (GPIO UNCLAIMED) function gpio group uart3
pin 8 (io8): pinctrl (GPIO UNCLAIMED) function gpio group uart3
pin 9 (io9): pinctrl (GPIO UNCLAIMED) function gpio group uart2
pin 10 (io10): pinctrl (GPIO UNCLAIMED) function gpio group uart2
pin 11 (io11): pinctrl (GPIO UNCLAIMED) function gpio group uart2
pin 12 (io12): pinctrl (GPIO UNCLAIMED) function gpio group uart2
pin 13 (io13): pinctrl (GPIO UNCLAIMED) function gpio group jtag
pin 14 (io14): pinctrl (GPIO UNCLAIMED) function gpio group jtag
pin 15 (io15): pinctrl (GPIO UNCLAIMED) function gpio group jtag
pin 16 (io16): pinctrl (GPIO UNCLAIMED) function gpio group jtag
pin 17 (io17): pinctrl (GPIO UNCLAIMED) function gpio group jtag
pin 18 (io18): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 19 (io19): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 20 (io20): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 21 (io21): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 22 (io22): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 23 (io23): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 24 (io24): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 25 (io25): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 26 (io26): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 27 (io27): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 28 (io28): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 29 (io29): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 30 (io30): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 31 (io31): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 32 (io32): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 33 (io33): pinctrl (GPIO UNCLAIMED) function gpio group rgmii2
pin 34 (io34): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 35 (io35): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 36 (io36): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 37 (io37): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 38 (io38): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 39 (io39): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 40 (io40): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 41 (io41): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 42 (io42): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 43 (io43): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 44 (io44): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 45 (io45): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 46 (io46): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 47 (io47): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 48 (io48): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 49 (io49): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 50 (io50): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 51 (io51): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 52 (io52): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 53 (io53): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 54 (io54): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 55 (io55): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 56 (io56): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 57 (io57): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 58 (io58): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 59 (io59): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 60 (io60): (MUX UNCLAIMED) (GPIO UNCLAIMED)
registered pins: 61
pin 0 (io0)
pin 1 (io1)
pin 2 (io2)
pin 3 (io3)
pin 4 (io4)
pin 5 (io5)
pin 6 (io6)
pin 7 (io7)
pin 8 (io8)
pin 9 (io9)
pin 10 (io10)
pin 11 (io11)
pin 12 (io12)
pin 13 (io13)
pin 14 (io14)
pin 15 (io15)
pin 16 (io16)
pin 17 (io17)
pin 18 (io18)
pin 19 (io19)
pin 20 (io20)
pin 21 (io21)
pin 22 (io22)
pin 23 (io23)
pin 24 (io24)
pin 25 (io25)
pin 26 (io26)
pin 27 (io27)
pin 28 (io28)
pin 29 (io29)
pin 30 (io30)
pin 31 (io31)
pin 32 (io32)
pin 33 (io33)
pin 34 (io34)
pin 35 (io35)
pin 36 (io36)
pin 37 (io37)
pin 38 (io38)
pin 39 (io39)
pin 40 (io40)
pin 41 (io41)
pin 42 (io42)
pin 43 (io43)
pin 44 (io44)
pin 45 (io45)
pin 46 (io46)
pin 47 (io47)
pin 48 (io48)
pin 49 (io49)
pin 50 (io50)
pin 51 (io51)
pin 52 (io52)
pin 53 (io53)
pin 54 (io54)
pin 55 (io55)
pin 56 (io56)
pin 57 (io57)
pin 58 (io58)
pin 59 (io59)
pin 60 (io60)


Puh, not easy.
I do not know how to thank you four your effort!

Kind regards,

André



>diff --git
> a/drivers/staging/mt7621-pci/pci-mt7621.c
> b/drivers/staging/mt7621-pci/pci-mt7621.c
> index b9d460a9c041..11c46f955745 100644
> --- a/drivers/staging/mt7621-pci/pci-mt7621.c
> +++ b/drivers/staging/mt7621-pci/pci-mt7621.c
> @@ -122,6 +122,7 @@ struct mt7621_pcie_port {
>   * @ports: pointer to PCIe port information
>   * @resets_inverted: depends on chip revision
>   * reset lines are inverted.
> + * @link_status: link status of pcie device.
>   */
>  struct mt7621_pcie {
>         void __iomem *base;
> @@ -136,6 +137,7 @@ struct mt7621_pcie {
>         unsigned long io_map_base;
>         struct list_head ports;
>         bool resets_inverted;
> +       u32 link_status;
>  };
> 
>  static inline u32 pcie_read(struct mt7621_pcie *pcie, u32 reg)
> @@ -279,6 +281,24 @@ static void setup_cm_memory_region(struct
> mt7621_pcie *pcie)
>         }
>  }
> 
> +static int mt7621_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
> +{
> +       struct mt7621_pcie *pcie = pdev->bus->sysdata;
> +       int irq_map[PCIE_P2P_MAX];
> +       int n, i;
> +
> +       /* Assign IRQs */
> +       n = 0;
> +       for (i = 0; i < PCIE_P2P_MAX; i++)
> +               if (pcie->link_status & BIT(i))
> +                       irq_map[n++] = of_irq_parse_and_map_pci(pdev,
> slot, pin);
> +
> +       for (i = n; i < PCIE_P2P_MAX; i++)
> +               irq_map[i] = -1;
> +
> +       return irq_map[slot];
> +}
> +
>  static int mt7621_pci_parse_request_of_pci_ranges(struct mt7621_pcie *pcie)
>  {
>         struct device *dev = pcie->dev;
> @@ -583,29 +603,29 @@ static void mt7621_pcie_enable_ports(struct
> mt7621_pcie *pcie)
> 
>  static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie)
>  {
> -       u32 pcie_link_status = 0;
>         u32 n;
>         int i;
>         u32 p2p_br_devnum[PCIE_P2P_MAX];
>         struct mt7621_pcie_port *port;
> 
> +       pcie->link_status = 0;
>         list_for_each_entry(port, &pcie->ports, list) {
>                 u32 slot = port->slot;
> 
>                 if (port->enabled)
> -                       pcie_link_status |= BIT(slot);
> +                       pcie->link_status |= BIT(slot);
>         }
> 
> -       if (pcie_link_status == 0)
> +       if (pcie->link_status == 0)
>                 return -1;
> 
>         n = 0;
> 
> 
> 
>>
>> @@ -585,32 +580,45 @@
>>                 reset-names = "pcie0", "pcie1", "pcie2";
>>                 clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
>>                 clock-names = "pcie0", "pcie1", "pcie2";
>> +               phys = <&pcie0_phy 1>, <&pcie2_phy 0>;
>> +               phy-names = "pcie-phy0", "pcie-phy2";
>> +
>> +               reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
>>
>>                 pcie0: pcie at 0,0 {
>>                         reg = <0x0000 0 0 0 0>;
>> -
>>                         #address-cells = <3>;
>>                         #size-cells = <2>;
>> -
>>                         ranges;
>> +                       bus-range = <0x00 0xff>;
>>                 };
>>
>>                 pcie1: pcie at 1,0 {
>>                         reg = <0x0800 0 0 0 0>;
>> -
>>                         #address-cells = <3>;
>>                         #size-cells = <2>;
>> -
>>                         ranges;
>> +                       bus-range = <0x00 0xff>;
>>                 };
>>
>>                 pcie2: pcie at 2,0 {
>>                         reg = <0x1000 0 0 0 0>;
>> -
>>                         #address-cells = <3>;
>>                         #size-cells = <2>;
>> -
>>                         ranges;
>> +                       bus-range = <0x00 0xff>;
>>                 };
>>         };
>> +
>> +       pcie0_phy: pcie-phy at 1e149000 {
>> +               compatible = "mediatek,mt7621-pci-phy";
>> +               reg = <0x1e149000 0x0700>;
>> +               #phy-cells = <1>;
>> +       };
>> +
>> +       pcie2_phy: pcie-phy at 1e14a000 {
>> +               compatible = "mediatek,mt7621-pci-phy";
>> +               reg = <0x1e14a000 0x0700>;
>> +               #phy-cells = <1>;
>> +       };
>>  };
>>
>> Why are the interupts mapped a different way? I do not understand that.
>>
>> Kind regards,
>>
>> André
> 
> Best regards,
>     Sergio Paracuellos
> 

 


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