[OpenWrt-Devel] [PATCH 3/3] kernel: rtl8367b: initial support for Realtek switch rtl8367s

Vincent Wiemann vincent.wiemann at ironai.com
Sat Aug 17 14:07:53 EDT 2019



On 15.08.19 10:28, Serge Vasilugin wrote:
> From driver point of view no differance between rtl8367b and rtl8367s
> if it connected through EXT2 (rgmii only).
> So this trivial patch add some identification and initialization only.
> SGMII/HSGMII mode for EXT1 is not implemented for the sake of patch clairity.
> It may be simple but without test device...
> 
> Signed-off-by: Serge Vasilugin <vasilugin at yandex.ru>
> 
> --- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c
> +++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c
> @@ -588,6 +588,20 @@
>      {0x133E, 0x000E}, {0x133F, 0x0010},
>  };
> 
> +static const struct rtl8367b_initval rtl8367c_initvals0[] = {
> +    {0x13c2, 0x0000}, {0x0018, 0x0f00}, {0x0038, 0x0f00}, {0x0058, 0x0f00},
> +    {0x0078, 0x0f00}, {0x0098, 0x0f00}, {0x1d15, 0x0a69}, {0x2000, 0x1340},
> +    {0x2020, 0x1340}, {0x2040, 0x1340}, {0x2060, 0x1340}, {0x2080, 0x1340},
> +    {0x13eb, 0x15bb}, {0x1303, 0x06d6}, {0x1304, 0x0700}, {0x13E2, 0x003F},
> +    {0x13F9, 0x0090}, {0x121e, 0x03CA}, {0x1233, 0x0352}, {0x1237, 0x00a0},
> +    {0x123a, 0x0030}, {0x1239, 0x0084}, {0x0301, 0x1000}, {0x1349, 0x001F},
> +    {0x18e0, 0x4004}, {0x122b, 0x641c}, {0x1305, 0xc000}, {0x1200, 0x7fcb},
> +    {0x0884, 0x0003}, {0x06eb, 0x0001}, {0x00cf, 0xffff}, {0x00d0, 0x0007},
> +    {0x00ce, 0x48b0}, {0x00ce, 0x48b0}, {0x0398, 0xffff}, {0x0399, 0x0007},
> +    {0x0300, 0x0001}, {0x03fa, 0x0007}, {0x08c8, 0x00c0}, {0x0a30, 0x020e},
> +    {0x0800, 0x0000}, {0x0802, 0x0000}, {0x09da, 0x0017}, {0x1d32, 0x0002},
> +};
> +
>  static int rtl8367b_write_initvals(struct rtl8366_smi *smi,
>                    const struct rtl8367b_initval *initvals,
>                    int count)
> @@ -699,31 +713,38 @@
>  static int rtl8367b_init_regs(struct rtl8366_smi *smi)
>  {
>      const struct rtl8367b_initval *initvals;
> +    u32 chip_num;
>      u32 chip_ver;
>      u32 rlvid;
>      int count;
>      int err;
> 
>      REG_WR(smi, RTL8367B_RTL_MAGIC_ID_REG, RTL8367B_RTL_MAGIC_ID_VAL);
> +    REG_RD(smi, RTL8367B_CHIP_NUMBER_REG, &chip_num);
>      REG_RD(smi, RTL8367B_CHIP_VER_REG, &chip_ver);
> -
>      rlvid = (chip_ver >> RTL8367B_CHIP_VER_RLVID_SHIFT) &
>          RTL8367B_CHIP_VER_RLVID_MASK;
> 
> -    switch (rlvid) {
> -    case 0:
> -        initvals = rtl8367r_vb_initvals_0;
> -        count = ARRAY_SIZE(rtl8367r_vb_initvals_0);
> +    if( chip_num == 0x6367 || chip_num == 0x0597 || chip_num == 0x0276) {

Add space after "if" and remove space after "("

> +        initvals = rtl8367c_initvals0;
> +        count = ARRAY_SIZE(rtl8367c_initvals0);
> +    } else {
> +        printk("check chip_num=0x%x ver=0x%x...\n", chip_num, chip_ver);

Use dev_info instead of printk and say "checking" instead of "check"

> +        switch (rlvid) {
> +        case 0:
> +            initvals = rtl8367r_vb_initvals_0;
> +            count = ARRAY_SIZE(rtl8367r_vb_initvals_0);
>          break;

Wrong indentation for break

> 
> -    case 1:
> -        initvals = rtl8367r_vb_initvals_1;
> -        count = ARRAY_SIZE(rtl8367r_vb_initvals_1);
> +        case 1:
> +            initvals = rtl8367r_vb_initvals_1;
> +            count = ARRAY_SIZE(rtl8367r_vb_initvals_1);
>          break;

Wrong indentation for break

> 
> -    default:
> -        dev_err(smi->parent, "unknow rlvid %u\n", rlvid);
> -        return -ENODEV;
> +        default:
> +            dev_err(smi->parent, "unknow rlvid %u\n", rlvid);
> +            return -ENODEV;
> +        }
>      }
> 
>      /* TODO: disable RLTP */
> @@ -983,6 +1004,17 @@
>              RTL8367B_PORT_MISC_CFG_EGRESS_MODE_ORIGINAL <<
>                  RTL8367B_PORT_MISC_CFG_EGRESS_MODE_SHIFT);
> 
> +    /*
> +     * Enable for each phy port.
> +     */
> +    for (i = 0; i < 5; i++) {
> +        int data;
> +        rtl8367b_read_phy_reg(smi, i, 0, &data);
> +        data &= 0xF7FF;
> +        data |= 0x200;
> +        rtl8367b_write_phy_reg(smi, i, 0, data);
> +    }
> +
>      return 0;
>  }
> 
> @@ -1501,20 +1533,26 @@
>              "chip mode");
>          return ret;
>      }
> -
> -    switch (chip_ver) {
> -    case 0x1000:
> -        chip_name = "8367RB";
> -        break;
> -    case 0x1010:
> -        chip_name = "8367R-VB";
> -        break;
> -    default:
> -        dev_err(smi->parent,
> -            "unknown chip num:%04x ver:%04x, mode:%04x\n",
> -            chip_num, chip_ver, chip_mode);
> -        return -ENODEV;
> -    }
> +    if(chip_num == 0x6367 || chip_num == 0x0597 || chip_num == 0x0276) {

Space missing after "if"

> +        chip_name = "8367C";
> +    } else

Remove newline after "else" and lower indentation of switch statement by one level for better readability

> +        switch (chip_ver) {
> +        case 0x1000:
> +            chip_name = "8367RB";
> +            break;
> +        case 0x1010:
> +            chip_name = "8367R-VB";
> +            break;
> +        case 0x0070: /* just hint - with wrong phy_id always read 0x0070 */
> +            dev_err(smi->parent,
> +                "wrong switch address %d (0 or 29)?\n", smi->phy_id);
> +            /* fall through */
> +        default:
> +            dev_err(smi->parent,
> +                "unknown chip num:%04x ver:%04x, mode:%04x\n",
> +                chip_num, chip_ver, chip_mode);
> +            return -ENODEV;
> +        }
> 
>      dev_info(smi->parent, "RTL%s chip found\n", chip_name);
> 
> 
> ---
> serge
> 
> _______________________________________________
> openwrt-devel mailing list
> openwrt-devel at lists.openwrt.org
> https://lists.openwrt.org/mailman/listinfo/openwrt-devel
> 

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