[OpenWrt-Devel] [PATCH] brcm2708: patch file for 4.14 kernel
Christo Nedev
christo.nedev at gmail.com
Sat May 19 12:46:52 EDT 2018
Signed-off-by: Christo Nedev <christo.nedev at gmail.com>
---
.../950-0001-brcm2708-raspberry-pi.patch | 19960 +++++++++++++++++++
1 file changed, 19960 insertions(+)
create mode 100644 target/linux/brcm2708/patches-4.14/950-0001-brcm2708-raspberry-pi.patch
diff --git a/target/linux/brcm2708/patches-4.14/950-0001-brcm2708-raspberry-pi.patch b/target/linux/brcm2708/patches-4.14/950-0001-brcm2708-raspberry-pi.patch
new file mode 100644
index 0000000000..785178e1cb
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.14/950-0001-brcm2708-raspberry-pi.patch
@@ -0,0 +1,19960 @@
+--- a/arch/arm64/boot/dts/broadcom/Makefile
++++ b/arch/arm64/boot/dts/broadcom/Makefile
+@@ -1,7 +1,17 @@
+ # SPDX-License-Identifier: GPL-2.0
++# Enable fixups to support overlays on BCM2835 platforms
++
++ifeq ($(CONFIG_ARCH_BCM2835),y)
++DTC_FLAGS ?= -@ -H epapr
++endif
++
+ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb
++dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
++dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
++dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
++
++dts-dirs += ../overlays
+
+-dts-dirs += northstar2
+ dts-dirs += stingray
+ always := $(dtb-y)
+ subdir-y := $(dts-dirs)
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
+@@ -0,0 +1,3 @@
++#define RPI364
++
++#include "../../../../arm/boot/dts/bcm2710-rpi-3-b-plus.dts"
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
+@@ -0,0 +1,3 @@
++#define RPI364
++
++#include "../../../../arm/boot/dts/bcm2710-rpi-3-b.dts"
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -1,6 +1,16 @@
+ # SPDX-License-Identifier: GPL-2.0
+ ifeq ($(CONFIG_OF),y)
+
++dtb-$(CONFIG_ARCH_BCM2835) += \
++ bcm2708-rpi-b.dtb \
++ bcm2708-rpi-b-plus.dtb \
++ bcm2708-rpi-cm.dtb \
++ bcm2708-rpi-0-w.dtb \
++ bcm2709-rpi-2-b.dtb \
++ bcm2710-rpi-3-b.dtb \
++ bcm2710-rpi-3-b-plus.dtb \
++ bcm2710-rpi-cm3.dtb
++
+ dtb-$(CONFIG_ARCH_ALPINE) += \
+ alpine-db.dtb
+ dtb-$(CONFIG_MACH_ARTPEC6) += \
+@@ -1069,10 +1079,21 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dt
+ dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \
+ aspeed-bmc-opp-romulus.dtb \
+ aspeed-ast2500-evb.dtb
++
++targets += dtbs dtbs_install
++targets += $(dtb-y)
++
+ endif
+
+ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
++subdir-y := overlays
+ clean-files := *.dtb
++
++# Enable fixups to support overlays on BCM2835 platforms
++ifeq ($(CONFIG_ARCH_BCM2835),y)
++ DTC_FLAGS ?= -@ -H epapr
++ dts-dirs += overlays
++endif
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts
+@@ -0,0 +1,166 @@
++/dts-v1/;
++
++#include "bcm2708.dtsi"
++
++/ {
++ compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
++ model = "Raspberry Pi Zero W";
++
++ chosen {
++ bootargs = "8250.nr_uarts=1";
++ };
++
++ aliases {
++ serial0 = &uart1;
++ serial1 = &uart0;
++ };
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ sdio_pins: sdio_pins {
++ brcm,pins = <34 35 36 37 38 39>;
++ brcm,function = <7>; /* ALT3 = SD1 */
++ brcm,pull = <0 2 2 2 2 2>;
++ };
++
++ bt_pins: bt_pins {
++ brcm,pins = <43>;
++ brcm,function = <4>; /* alt0:GPCLK2 */
++ brcm,pull = <0>; /* none */
++ };
++
++ uart0_pins: uart0_pins {
++ brcm,pins = <30 31 32 33>;
++ brcm,function = <7>; /* alt3=UART0 */
++ brcm,pull = <2 0 0 2>; /* up none none up */
++ };
++
++ uart1_pins: uart1_pins {
++ brcm,pins;
++ brcm,function;
++ brcm,pull;
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <>;
++ brcm,function = <>;
++ };
++};
++
++&mmc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdio_pins>;
++ non-removable;
++ bus-width = <4>;
++ status = "okay";
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins &bt_pins>;
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>;
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev at 0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev at 1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ #sound-dai-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&random {
++ status = "okay";
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&gpio 47 0>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
+@@ -0,0 +1,122 @@
++/dts-v1/;
++
++#include "bcm2708.dtsi"
++#include "bcm283x-rpi-smsc9514.dtsi"
++
++/ {
++ model = "Raspberry Pi Model B+";
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 45>;
++ brcm,function = <4>;
++ };
++};
++
++&uart0 {
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev at 0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev at 1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&gpio 47 0>;
++ };
++
++ pwr_led: pwr {
++ label = "led1";
++ linux,default-trigger = "input";
++ gpios = <&gpio 35 0>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++
++ pwr_led_gpio = <&pwr_led>,"gpios:4";
++ pwr_led_activelow = <&pwr_led>,"gpios:8";
++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
+@@ -0,0 +1,112 @@
++/dts-v1/;
++
++#include "bcm2708.dtsi"
++#include "bcm283x-rpi-smsc9512.dtsi"
++
++/ {
++ model = "Raspberry Pi Model B";
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <28 29 30 31>;
++ brcm,function = <6>; /* alt2 */
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 45>;
++ brcm,function = <4>;
++ };
++};
++
++&uart0 {
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev at 0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev at 1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&gpio 16 1>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
+@@ -0,0 +1,95 @@
++/dts-v1/;
++
++#include "bcm2708-rpi-cm.dtsi"
++
++/ {
++ model = "Raspberry Pi Compute Module";
++};
++
++&uart0 {
++ status = "okay";
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins;
++ brcm,function;
++ };
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev at 0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev at 1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
+@@ -0,0 +1,17 @@
++#include "bcm2708.dtsi"
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&gpio 47 0>;
++ };
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi
+@@ -0,0 +1,162 @@
++/* Downstream version of bcm2835-rpi.dtsi */
++
++#include <dt-bindings/power/raspberrypi-power.h>
++
++/ {
++ memory {
++ device_type = "memory";
++ reg = <0x0 0x0>;
++ };
++
++ aliases {
++ audio = &audio;
++ aux = &aux;
++ sound = &sound;
++ soc = &soc;
++ dma = &dma;
++ intc = &intc;
++ watchdog = &watchdog;
++ random = &random;
++ mailbox = &mailbox;
++ gpio = &gpio;
++ uart0 = &uart0;
++ sdhost = &sdhost;
++ mmc0 = &sdhost;
++ i2s = &i2s;
++ spi0 = &spi0;
++ i2c0 = &i2c0;
++ uart1 = &uart1;
++ spi1 = &spi1;
++ spi2 = &spi2;
++ mmc = &mmc;
++ mmc1 = &mmc;
++ i2c1 = &i2c1;
++ i2c2 = &i2c2;
++ usb = &usb;
++ leds = &leds;
++ fb = &fb;
++ vchiq = &vchiq;
++ thermal = &thermal;
++ axiperf = &axiperf;
++ };
++
++ leds: leds {
++ compatible = "gpio-leds";
++ };
++
++ soc {
++ gpiomem {
++ compatible = "brcm,bcm2835-gpiomem";
++ reg = <0x7e200000 0x1000>;
++ };
++
++ firmware: firmware {
++ compatible = "raspberrypi,bcm2835-firmware";
++ mboxes = <&mailbox>;
++ };
++
++ power: power {
++ compatible = "raspberrypi,bcm2835-power";
++ firmware = <&firmware>;
++ #power-domain-cells = <1>;
++ };
++
++ fb: fb {
++ compatible = "brcm,bcm2708-fb";
++ firmware = <&firmware>;
++ status = "disabled";
++ };
++
++ vchiq: vchiq {
++ compatible = "brcm,bcm2835-vchiq";
++ reg = <0x7e00b840 0xf>;
++ interrupts = <0 2>;
++ cache-line-size = <32>;
++ firmware = <&firmware>;
++ };
++
++ vcsm: vcsm {
++ compatible = "raspberrypi,bcm2835-vcsm";
++ firmware = <&firmware>;
++ status = "okay";
++ };
++
++ /* Onboard audio */
++ audio: audio {
++ compatible = "brcm,bcm2835-audio";
++ brcm,pwm-channels = <8>;
++ status = "disabled";
++ };
++
++ /* External sound card */
++ sound: sound {
++ status = "disabled";
++ };
++ };
++
++ __overrides__ {
++ cache_line_size = <&vchiq>, "cache-line-size:0";
++
++ uart0 = <&uart0>,"status";
++ uart1 = <&uart1>,"status";
++ i2s = <&i2s>,"status";
++ spi = <&spi0>,"status";
++ i2c0 = <&i2c0>,"status";
++ i2c1 = <&i2c1>,"status";
++ i2c2_iknowwhatimdoing = <&i2c2>,"status";
++ i2c0_baudrate = <&i2c0>,"clock-frequency:0";
++ i2c1_baudrate = <&i2c1>,"clock-frequency:0";
++ i2c2_baudrate = <&i2c2>,"clock-frequency:0";
++
++ audio = <&audio>,"status";
++ watchdog = <&watchdog>,"status";
++ random = <&random>,"status";
++ sd_overclock = <&sdhost>,"brcm,overclock-50:0";
++ sd_force_pio = <&sdhost>,"brcm,force-pio?";
++ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
++ sd_debug = <&sdhost>,"brcm,debug";
++ sdio_overclock = <&mmc>,"brcm,overclock-50:0";
++ axiperf = <&axiperf>,"status";
++ };
++};
++
++&dma {
++ brcm,dma-channel-mask = <0x7f34>;
++};
++
++&hdmi {
++ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
++};
++
++&usb {
++ power-domains = <&power RPI_POWER_DOMAIN_USB>;
++};
++
++&clocks {
++ firmware = <&firmware>;
++};
++
++sdhost_pins: &sdhost_gpio48 {
++ /* Add alias */
++};
++
++&sdhost {
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdhost_gpio48>;
++ bus-width = <4>;
++ brcm,overclock-50 = <0>;
++ brcm,pio-limit = <1>;
++ status = "okay";
++};
++
++&fb {
++ status = "okay";
++};
++
++&cpu_thermal {
++ /delete-node/ trips;
++};
++
++&vec {
++ status = "disabled";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2708.dtsi
+@@ -0,0 +1,11 @@
++#include "bcm2835.dtsi"
++#include "bcm270x.dtsi"
++#include "bcm2708-rpi.dtsi"
++
++/ {
++ /delete-node/ cpus;
++
++ __overrides__ {
++ arm_freq;
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
+@@ -0,0 +1,123 @@
++/dts-v1/;
++
++#include "bcm2709.dtsi"
++#include "bcm283x-rpi-smsc9514.dtsi"
++
++/ {
++ compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
++ model = "Raspberry Pi 2 Model B";
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 45>;
++ brcm,function = <4>;
++ };
++};
++
++&uart0 {
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev at 0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev at 1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&gpio 47 0>;
++ };
++
++ pwr_led: pwr {
++ label = "led1";
++ linux,default-trigger = "input";
++ gpios = <&gpio 35 0>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++
++ pwr_led_gpio = <&pwr_led>,"gpios:4";
++ pwr_led_activelow = <&pwr_led>,"gpios:8";
++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2709.dtsi
+@@ -0,0 +1,19 @@
++#include "bcm2836.dtsi"
++#include "bcm270x.dtsi"
++#include "bcm2708-rpi.dtsi"
++
++/ {
++ soc {
++ ranges = <0x7e000000 0x3f000000 0x01000000>,
++ <0x40000000 0x40000000 0x00040000>;
++
++ /delete-node/ timer at 7e003000;
++ };
++
++ __overrides__ {
++ arm_freq = <&v7_cpu0>, "clock-frequency:0",
++ <&v7_cpu1>, "clock-frequency:0",
++ <&v7_cpu2>, "clock-frequency:0",
++ <&v7_cpu3>, "clock-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm270x.dtsi
+@@ -0,0 +1,175 @@
++/* Downstream bcm283x.dtsi diff */
++#include <dt-bindings/power/raspberrypi-power.h>
++
++/ {
++ chosen {
++ bootargs = "";
++ /delete-property/ stdout-path;
++ };
++
++ soc: soc {
++
++ watchdog: watchdog at 7e100000 {
++ /* Add alias */
++ };
++
++ random: rng at 7e104000 {
++ /* Add alias */
++ };
++
++ gpio at 7e200000 { /* gpio */
++ interrupts = <2 17>, <2 18>;
++ };
++
++ serial at 7e201000 { /* uart0 */
++ /* Enable CTS bug workaround */
++ cts-event-workaround;
++ };
++
++ i2s at 7e203000 { /* i2s */
++ #sound-dai-cells = <0>;
++ reg = <0x7e203000 0x24>;
++ clocks = <&clocks BCM2835_CLOCK_PCM>;
++ };
++
++ spi0: spi at 7e204000 {
++ /* Add alias */
++ dmas = <&dma 6>, <&dma 7>;
++ dma-names = "tx", "rx";
++ };
++
++ pixelvalve0: pixelvalve at 7e206000 {
++ /* Add alias */
++ status = "disabled";
++ };
++
++ pixelvalve1: pixelvalve at 7e207000 {
++ /* Add alias */
++ status = "disabled";
++ };
++
++ dpi: dpi at 7e208000 {
++ compatible = "brcm,bcm2835-dpi";
++ reg = <0x7e208000 0x8c>;
++ clocks = <&clocks BCM2835_CLOCK_VPU>,
++ <&clocks BCM2835_CLOCK_DPI>;
++ clock-names = "core", "pixel";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ /delete-node/ sdhci at 7e300000;
++
++ mmc: mmc at 7e300000 {
++ compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
++ reg = <0x7e300000 0x100>;
++ interrupts = <2 30>;
++ clocks = <&clocks BCM2835_CLOCK_EMMC>;
++ dmas = <&dma 11>;
++ dma-names = "rx-tx";
++ brcm,overclock-50 = <0>;
++ status = "disabled";
++ };
++
++ hvs: hvs at 7e400000 {
++ /* Add alias */
++ status = "disabled";
++ };
++
++ firmwarekms: firmwarekms at 7e600000 {
++ compatible = "raspberrypi,rpi-firmware-kms";
++ /* SMI interrupt reg */
++ reg = <0x7e600000 0x100>;
++ interrupts = <2 16>;
++ brcm,firmware = <&firmware>;
++ status = "disabled";
++ };
++
++ smi: smi at 7e600000 {
++ compatible = "brcm,bcm2835-smi";
++ reg = <0x7e600000 0x100>;
++ interrupts = <2 16>;
++ clocks = <&clocks BCM2835_CLOCK_SMI>;
++ assigned-clocks = <&clocks BCM2835_CLOCK_SMI>;
++ assigned-clock-rates = <125000000>;
++ dmas = <&dma 4>;
++ dma-names = "rx-tx";
++ status = "disabled";
++ };
++
++ pixelvalve2: pixelvalve at 7e807000 {
++ /* Add alias */
++ status = "disabled";
++ };
++
++ hdmi at 7e902000 { /* hdmi */
++ status = "disabled";
++ };
++
++ usb at 7e980000 { /* usb */
++ compatible = "brcm,bcm2708-usb";
++ reg = <0x7e980000 0x10000>,
++ <0x7e006000 0x1000>;
++ interrupts = <2 0>,
++ <1 9>;
++ };
++
++ v3d at 7ec00000 { /* vd3 */
++ compatible = "brcm,vc4-v3d";
++ power-domains = <&power RPI_POWER_DOMAIN_V3D>;
++ status = "disabled";
++ };
++
++ axiperf: axiperf {
++ compatible = "brcm,bcm2835-axiperf";
++ reg = <0x7e009800 0x100>,
++ <0x7ee08000 0x100>;
++ firmware = <&firmware>;
++ status = "disabled";
++ };
++ };
++
++ vdd_5v0_reg: fixedregulator_5v0 {
++ compatible = "regulator-fixed";
++ regulator-name = "5v0";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ regulator-always-on;
++ };
++
++ vdd_3v3_reg: fixedregulator_3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++};
++
++/* Configure and use the auxilliary interrupt controller */
++
++&aux {
++ interrupts = <1 29>;
++ interrupt-controller;
++ #interrupt-cells = <1>;
++};
++
++&uart1 {
++ interrupt-parent = <&aux>;
++ interrupts = <0>;
++};
++
++&spi1 {
++ interrupt-parent = <&aux>;
++ interrupts = <1>;
++};
++
++&spi2 {
++ interrupt-parent = <&aux>;
++ interrupts = <2>;
++};
++
++&vc4 {
++ status = "disabled";
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
+@@ -0,0 +1,183 @@
++/dts-v1/;
++
++#include "bcm2710.dtsi"
++#include "bcm283x-rpi-lan7515.dtsi"
++
++/ {
++ compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
++ model = "Raspberry Pi 3 Model B+";
++
++ chosen {
++ bootargs = "8250.nr_uarts=1";
++ };
++
++ aliases {
++ serial0 = &uart1;
++ serial1 = &uart0;
++ };
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ sdio_pins: sdio_pins {
++ brcm,pins = <34 35 36 37 38 39>;
++ brcm,function = <7>; // alt3 = SD1
++ brcm,pull = <0 2 2 2 2 2>;
++ };
++
++ bt_pins: bt_pins {
++ brcm,pins = <43>;
++ brcm,function = <4>; /* alt0:GPCLK2 */
++ brcm,pull = <0>;
++ };
++
++ uart0_pins: uart0_pins {
++ brcm,pins = <32 33>;
++ brcm,function = <7>; /* alt3=UART0 */
++ brcm,pull = <0 2>;
++ };
++
++ uart1_pins: uart1_pins {
++ brcm,pins;
++ brcm,function;
++ brcm,pull;
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 41>;
++ brcm,function = <4>;
++ };
++};
++
++&mmc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdio_pins>;
++ non-removable;
++ bus-width = <4>;
++ status = "okay";
++ brcm,overclock-50 = <0>;
++};
++
++&soc {
++ expgpio: expgpio {
++ compatible = "brcm,bcm2835-expgpio";
++ gpio-controller;
++ #gpio-cells = <2>;
++ firmware = <&firmware>;
++ status = "okay";
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins &bt_pins>;
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>;
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev at 0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev at 1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&gpio 29 0>;
++ };
++
++ pwr_led: pwr {
++ label = "led1";
++ linux,default-trigger = "default-on";
++ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++
++ pwr_led_gpio = <&pwr_led>,"gpios:4";
++ pwr_led_activelow = <&pwr_led>,"gpios:8";
++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
+@@ -0,0 +1,191 @@
++/dts-v1/;
++
++#include "bcm2710.dtsi"
++#include "bcm283x-rpi-smsc9514.dtsi"
++
++/ {
++ compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
++ model = "Raspberry Pi 3 Model B";
++
++ chosen {
++ bootargs = "8250.nr_uarts=1";
++ };
++
++ aliases {
++ serial0 = &uart1;
++ serial1 = &uart0;
++ };
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ sdio_pins: sdio_pins {
++ brcm,pins = <34 35 36 37 38 39>;
++ brcm,function = <7>; // alt3 = SD1
++ brcm,pull = <0 2 2 2 2 2>;
++ };
++
++ bt_pins: bt_pins {
++ brcm,pins = <43>;
++ brcm,function = <4>; /* alt0:GPCLK2 */
++ brcm,pull = <0>;
++ };
++
++ uart0_pins: uart0_pins {
++ brcm,pins = <32 33>;
++ brcm,function = <7>; /* alt3=UART0 */
++ brcm,pull = <0 2>;
++ };
++
++ uart1_pins: uart1_pins {
++ brcm,pins;
++ brcm,function;
++ brcm,pull;
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 41>;
++ brcm,function = <4>;
++ };
++};
++
++&mmc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdio_pins>;
++ non-removable;
++ bus-width = <4>;
++ status = "okay";
++ brcm,overclock-50 = <0>;
++};
++
++&soc {
++ virtgpio: virtgpio {
++ compatible = "brcm,bcm2835-virtgpio";
++ gpio-controller;
++ #gpio-cells = <2>;
++ firmware = <&firmware>;
++ status = "okay";
++ };
++
++ expgpio: expgpio {
++ compatible = "brcm,bcm2835-expgpio";
++ gpio-controller;
++ #gpio-cells = <2>;
++ firmware = <&firmware>;
++ status = "okay";
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins &bt_pins>;
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>;
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev at 0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev at 1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&virtgpio 0 0>;
++ };
++
++ pwr_led: pwr {
++ label = "led1";
++ linux,default-trigger = "input";
++ gpios = <&expgpio 7 0>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++
++ pwr_led_gpio = <&pwr_led>,"gpios:4";
++ pwr_led_activelow = <&pwr_led>,"gpios:8";
++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
+@@ -0,0 +1,129 @@
++/dts-v1/;
++
++#include "bcm2710.dtsi"
++
++/ {
++ model = "Raspberry Pi Compute Module 3";
++};
++
++&uart0 {
++ status = "okay";
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins;
++ brcm,function;
++ };
++};
++
++&soc {
++ virtgpio: virtgpio {
++ compatible = "brcm,bcm2835-virtgpio";
++ gpio-controller;
++ #gpio-cells = <2>;
++ firmware = <&firmware>;
++ status = "okay";
++ };
++
++ expgpio: expgpio {
++ compatible = "brcm,bcm2835-expgpio";
++ gpio-controller;
++ #gpio-cells = <2>;
++ firmware = <&firmware>;
++ status = "okay";
++ };
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev at 0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev at 1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&virtgpio 0 0>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2710.dtsi
+@@ -0,0 +1,29 @@
++#include "bcm2837.dtsi"
++#include "bcm270x.dtsi"
++#include "bcm2708-rpi.dtsi"
++
++/ {
++ compatible = "brcm,bcm2837", "brcm,bcm2836";
++
++ soc {
++
++ arm-pmu {
++#ifdef RPI364
++ compatible = "arm,armv8-pmuv3", "arm,cortex-a7-pmu";
++#else
++ compatible = "arm,cortex-a7-pmu";
++#endif
++ interrupt-parent = <&local_intc>;
++ interrupts = <9>;
++ };
++
++ /delete-node/ timer at 7e003000;
++ };
++
++ __overrides__ {
++ arm_freq = <&cpu0>, "clock-frequency:0",
++ <&cpu1>, "clock-frequency:0",
++ <&cpu2>, "clock-frequency:0",
++ <&cpu3>, "clock-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
+@@ -0,0 +1,43 @@
++/ {
++ aliases {
++ ethernet0 = ðernet;
++ };
++};
++
++&usb {
++ usb1 at 1 {
++ compatible = "usb424,2514";
++ reg = <1>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ usb1_1 at 1 {
++ compatible = "usb424,2514";
++ reg = <1>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethernet: usbether at 1 {
++ compatible = "usb424,7800";
++ reg = <1>;
++ microchip,eee-enabled;
++ microchip,tx-lpi-timer = <600>; /* non-aggressive*/
++ /*
++ * led0 = 1:link1000/activity
++ * led1 = 6:link10/100/activity
++ */
++ microchip,led-modes = <1 6>;
++ };
++ };
++ };
++};
++
++
++/ {
++ __overrides__ {
++ eee = <ðernet>,"microchip,eee-enabled?";
++ tx_lpi_timer = <ðernet>,"microchip,tx-lpi-timer:0";
++ eth_led0 = <ðernet>,"microchip,led-modes:0";
++ eth_led1 = <ðernet>,"microchip,led-modes:4";
++ };
++};
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -639,5 +639,6 @@
+
+ usbphy: phy {
+ compatible = "usb-nop-xceiv";
++ #phy-cells = <0>;
+ };
+ };
+--- /dev/null
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -0,0 +1,1365 @@
++CONFIG_LOCALVERSION="-v7"
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SYSVIPC=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_GENERIC_IRQ_DEBUGFS=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++CONFIG_TASK_XACCT=y
++CONFIG_TASK_IO_ACCOUNTING=y
++CONFIG_IKCONFIG=m
++CONFIG_IKCONFIG_PROC=y
++CONFIG_MEMCG=y
++CONFIG_BLK_CGROUP=y
++CONFIG_CGROUP_FREEZER=y
++CONFIG_CPUSETS=y
++CONFIG_CGROUP_DEVICE=y
++CONFIG_CGROUP_CPUACCT=y
++CONFIG_NAMESPACES=y
++CONFIG_USER_NS=y
++CONFIG_SCHED_AUTOGROUP=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_EMBEDDED=y
++# CONFIG_COMPAT_BRK is not set
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++CONFIG_JUMP_LABEL=y
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SRCVERSION_ALL=y
++CONFIG_BLK_DEV_THROTTLING=y
++CONFIG_PARTITION_ADVANCED=y
++CONFIG_MAC_PARTITION=y
++CONFIG_CFQ_GROUP_IOSCHED=y
++CONFIG_ARCH_BCM=y
++CONFIG_ARCH_BCM2835=y
++# CONFIG_CACHE_L2X0 is not set
++CONFIG_SMP=y
++CONFIG_VMSPLIT_2G=y
++CONFIG_PREEMPT_VOLUNTARY=y
++# CONFIG_CPU_SW_DOMAIN_PAN is not set
++CONFIG_CLEANCACHE=y
++CONFIG_FRONTSWAP=y
++CONFIG_CMA=y
++CONFIG_ZSMALLOC=m
++CONFIG_PGTABLE_MAPPING=y
++CONFIG_UACCESS_WITH_MEMCPY=y
++CONFIG_SECCOMP=y
++# CONFIG_ATAGS is not set
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait"
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_STAT=y
++CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
++CONFIG_VFP=y
++CONFIG_NEON=y
++CONFIG_KERNEL_MODE_NEON=y
++CONFIG_BINFMT_MISC=m
++# CONFIG_SUSPEND is not set
++CONFIG_PM=y
++CONFIG_NET=y
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM_USER=y
++CONFIG_NET_KEY=m
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_MULTIPATH=y
++CONFIG_IP_ROUTE_VERBOSE=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_RARP=y
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE_DEMUX=m
++CONFIG_NET_IPGRE=m
++CONFIG_IP_MROUTE=y
++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
++CONFIG_IP_PIMSM_V1=y
++CONFIG_IP_PIMSM_V2=y
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++CONFIG_INET_DIAG=m
++CONFIG_TCP_CONG_ADVANCED=y
++CONFIG_TCP_CONG_BBR=m
++CONFIG_IPV6=m
++CONFIG_IPV6_ROUTER_PREF=y
++CONFIG_IPV6_ROUTE_INFO=y
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++CONFIG_IPV6_SIT_6RD=y
++CONFIG_IPV6_TUNNEL=m
++CONFIG_IPV6_MULTIPLE_TABLES=y
++CONFIG_IPV6_SUBTREES=y
++CONFIG_IPV6_MROUTE=y
++CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
++CONFIG_IPV6_PIMSM_V2=y
++CONFIG_NETFILTER=y
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CONNTRACK_ZONES=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CONNTRACK_TIMESTAMP=y
++CONFIG_NF_CONNTRACK_AMANDA=m
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_SNMP=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_XT_SET=m
++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_HMARK=m
++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
++CONFIG_NETFILTER_XT_TARGET_LED=m
++CONFIG_NETFILTER_XT_TARGET_LOG=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
++CONFIG_NETFILTER_XT_TARGET_TEE=m
++CONFIG_NETFILTER_XT_TARGET_TPROXY=m
++CONFIG_NETFILTER_XT_TARGET_TRACE=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
++CONFIG_NETFILTER_XT_MATCH_BPF=m
++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_CPU=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
++CONFIG_NETFILTER_XT_MATCH_IPVS=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_NFACCT=m
++CONFIG_NETFILTER_XT_MATCH_OSF=m
++CONFIG_NETFILTER_XT_MATCH_OWNER=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_RATEEST=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_RECENT=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++CONFIG_NETFILTER_XT_MATCH_TIME=m
++CONFIG_NETFILTER_XT_MATCH_U32=m
++CONFIG_IP_SET=m
++CONFIG_IP_SET_BITMAP_IP=m
++CONFIG_IP_SET_BITMAP_IPMAC=m
++CONFIG_IP_SET_BITMAP_PORT=m
++CONFIG_IP_SET_HASH_IP=m
++CONFIG_IP_SET_HASH_IPPORT=m
++CONFIG_IP_SET_HASH_IPPORTIP=m
++CONFIG_IP_SET_HASH_IPPORTNET=m
++CONFIG_IP_SET_HASH_NET=m
++CONFIG_IP_SET_HASH_NETPORT=m
++CONFIG_IP_SET_HASH_NETIFACE=m
++CONFIG_IP_SET_LIST_SET=m
++CONFIG_IP_VS=m
++CONFIG_IP_VS_PROTO_TCP=y
++CONFIG_IP_VS_PROTO_UDP=y
++CONFIG_IP_VS_PROTO_ESP=y
++CONFIG_IP_VS_PROTO_AH=y
++CONFIG_IP_VS_PROTO_SCTP=y
++CONFIG_IP_VS_RR=m
++CONFIG_IP_VS_WRR=m
++CONFIG_IP_VS_LC=m
++CONFIG_IP_VS_WLC=m
++CONFIG_IP_VS_LBLC=m
++CONFIG_IP_VS_LBLCR=m
++CONFIG_IP_VS_DH=m
++CONFIG_IP_VS_SH=m
++CONFIG_IP_VS_SED=m
++CONFIG_IP_VS_NQ=m
++CONFIG_IP_VS_FTP=m
++CONFIG_IP_VS_PE_SIP=m
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_RPFILTER=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_NAT=m
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_RAW=m
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++CONFIG_NF_CONNTRACK_IPV6=m
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_AH=m
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_RPFILTER=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_TARGET_HL=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_RAW=m
++CONFIG_IP6_NF_NAT=m
++CONFIG_IP6_NF_TARGET_MASQUERADE=m
++CONFIG_IP6_NF_TARGET_NPT=m
++CONFIG_BRIDGE_NF_EBTABLES=m
++CONFIG_BRIDGE_EBT_BROUTE=m
++CONFIG_BRIDGE_EBT_T_FILTER=m
++CONFIG_BRIDGE_EBT_T_NAT=m
++CONFIG_BRIDGE_EBT_802_3=m
++CONFIG_BRIDGE_EBT_AMONG=m
++CONFIG_BRIDGE_EBT_ARP=m
++CONFIG_BRIDGE_EBT_IP=m
++CONFIG_BRIDGE_EBT_IP6=m
++CONFIG_BRIDGE_EBT_LIMIT=m
++CONFIG_BRIDGE_EBT_MARK=m
++CONFIG_BRIDGE_EBT_PKTTYPE=m
++CONFIG_BRIDGE_EBT_STP=m
++CONFIG_BRIDGE_EBT_VLAN=m
++CONFIG_BRIDGE_EBT_ARPREPLY=m
++CONFIG_BRIDGE_EBT_DNAT=m
++CONFIG_BRIDGE_EBT_MARK_T=m
++CONFIG_BRIDGE_EBT_REDIRECT=m
++CONFIG_BRIDGE_EBT_SNAT=m
++CONFIG_BRIDGE_EBT_LOG=m
++CONFIG_BRIDGE_EBT_NFLOG=m
++CONFIG_SCTP_COOKIE_HMAC_SHA1=y
++CONFIG_ATM=m
++CONFIG_L2TP=m
++CONFIG_L2TP_V3=y
++CONFIG_L2TP_IP=m
++CONFIG_L2TP_ETH=m
++CONFIG_BRIDGE=m
++CONFIG_VLAN_8021Q=m
++CONFIG_VLAN_8021Q_GVRP=y
++CONFIG_ATALK=m
++CONFIG_6LOWPAN=m
++CONFIG_IEEE802154=m
++CONFIG_IEEE802154_6LOWPAN=m
++CONFIG_MAC802154=m
++CONFIG_NET_SCHED=y
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_ATM=m
++CONFIG_NET_SCH_PRIO=m
++CONFIG_NET_SCH_MULTIQ=m
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFB=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_DRR=m
++CONFIG_NET_SCH_MQPRIO=m
++CONFIG_NET_SCH_CHOKE=m
++CONFIG_NET_SCH_QFQ=m
++CONFIG_NET_SCH_CODEL=m
++CONFIG_NET_SCH_FQ_CODEL=m
++CONFIG_NET_SCH_FQ=m
++CONFIG_NET_SCH_HHF=m
++CONFIG_NET_SCH_PIE=m
++CONFIG_NET_SCH_INGRESS=m
++CONFIG_NET_SCH_PLUG=m
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++CONFIG_NET_CLS_FLOW=m
++CONFIG_NET_CLS_CGROUP=m
++CONFIG_NET_EMATCH=y
++CONFIG_NET_EMATCH_CMP=m
++CONFIG_NET_EMATCH_NBYTE=m
++CONFIG_NET_EMATCH_U32=m
++CONFIG_NET_EMATCH_META=m
++CONFIG_NET_EMATCH_TEXT=m
++CONFIG_NET_EMATCH_IPSET=m
++CONFIG_NET_CLS_ACT=y
++CONFIG_NET_ACT_POLICE=m
++CONFIG_NET_ACT_GACT=m
++CONFIG_GACT_PROB=y
++CONFIG_NET_ACT_MIRRED=m
++CONFIG_NET_ACT_IPT=m
++CONFIG_NET_ACT_NAT=m
++CONFIG_NET_ACT_PEDIT=m
++CONFIG_NET_ACT_SIMP=m
++CONFIG_NET_ACT_SKBEDIT=m
++CONFIG_NET_ACT_CSUM=m
++CONFIG_BATMAN_ADV=m
++CONFIG_OPENVSWITCH=m
++CONFIG_NET_L3_MASTER_DEV=y
++CONFIG_NET_PKTGEN=m
++CONFIG_HAMRADIO=y
++CONFIG_AX25=m
++CONFIG_NETROM=m
++CONFIG_ROSE=m
++CONFIG_MKISS=m
++CONFIG_6PACK=m
++CONFIG_BPQETHER=m
++CONFIG_BAYCOM_SER_FDX=m
++CONFIG_BAYCOM_SER_HDX=m
++CONFIG_YAM=m
++CONFIG_CAN=m
++CONFIG_CAN_VCAN=m
++CONFIG_CAN_SLCAN=m
++CONFIG_CAN_MCP251X=m
++CONFIG_CAN_GS_USB=m
++CONFIG_BT=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++CONFIG_BT_6LOWPAN=m
++CONFIG_BT_HCIBTUSB=m
++CONFIG_BT_HCIUART=m
++CONFIG_BT_HCIUART_3WIRE=y
++CONFIG_BT_HCIUART_BCM=y
++CONFIG_BT_HCIBCM203X=m
++CONFIG_BT_HCIBPA10X=m
++CONFIG_BT_HCIBFUSB=m
++CONFIG_BT_HCIVHCI=m
++CONFIG_BT_MRVL=m
++CONFIG_BT_MRVL_SDIO=m
++CONFIG_BT_ATH3K=m
++CONFIG_BT_WILINK=m
++CONFIG_CFG80211=m
++CONFIG_MAC80211=m
++CONFIG_MAC80211_MESH=y
++CONFIG_WIMAX=m
++CONFIG_RFKILL=m
++CONFIG_RFKILL_INPUT=y
++CONFIG_NET_9P=m
++CONFIG_NFC=m
++CONFIG_DEVTMPFS=y
++CONFIG_DEVTMPFS_MOUNT=y
++CONFIG_DMA_CMA=y
++CONFIG_CMA_SIZE_MBYTES=5
++CONFIG_MTD=m
++CONFIG_MTD_BLOCK=m
++CONFIG_MTD_M25P80=m
++CONFIG_MTD_NAND=m
++CONFIG_MTD_SPI_NOR=m
++CONFIG_MTD_UBI=m
++CONFIG_OF_CONFIGFS=y
++CONFIG_ZRAM=m
++CONFIG_BLK_DEV_LOOP=y
++CONFIG_BLK_DEV_CRYPTOLOOP=m
++CONFIG_BLK_DEV_DRBD=m
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=y
++CONFIG_CDROM_PKTCDVD=m
++CONFIG_ATA_OVER_ETH=m
++CONFIG_EEPROM_AT24=m
++CONFIG_TI_ST=m
++CONFIG_SCSI=y
++# CONFIG_SCSI_PROC_FS is not set
++CONFIG_BLK_DEV_SD=y
++CONFIG_CHR_DEV_ST=m
++CONFIG_CHR_DEV_OSST=m
++CONFIG_BLK_DEV_SR=m
++CONFIG_CHR_DEV_SG=m
++CONFIG_SCSI_ISCSI_ATTRS=y
++CONFIG_ISCSI_TCP=m
++CONFIG_ISCSI_BOOT_SYSFS=m
++CONFIG_MD=y
++CONFIG_MD_LINEAR=m
++CONFIG_BLK_DEV_DM=m
++CONFIG_DM_CRYPT=m
++CONFIG_DM_SNAPSHOT=m
++CONFIG_DM_THIN_PROVISIONING=m
++CONFIG_DM_MIRROR=m
++CONFIG_DM_LOG_USERSPACE=m
++CONFIG_DM_RAID=m
++CONFIG_DM_ZERO=m
++CONFIG_DM_DELAY=m
++CONFIG_NETDEVICES=y
++CONFIG_BONDING=m
++CONFIG_DUMMY=m
++CONFIG_IFB=m
++CONFIG_MACVLAN=m
++CONFIG_IPVLAN=m
++CONFIG_VXLAN=m
++CONFIG_NETCONSOLE=m
++CONFIG_TUN=m
++CONFIG_VETH=m
++CONFIG_ENC28J60=m
++CONFIG_QCA7000_SPI=m
++CONFIG_MDIO_BITBANG=m
++CONFIG_PPP=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_MPPE=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPPOATM=m
++CONFIG_PPPOE=m
++CONFIG_PPPOL2TP=m
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_SLIP=m
++CONFIG_SLIP_COMPRESSED=y
++CONFIG_SLIP_SMART=y
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_RTL8152=m
++CONFIG_USB_LAN78XX=y
++CONFIG_USB_USBNET=y
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_AX88179_178A=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_CDC_EEM=m
++CONFIG_USB_NET_CDC_NCM=m
++CONFIG_USB_NET_HUAWEI_CDC_NCM=m
++CONFIG_USB_NET_CDC_MBIM=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_SR9700=m
++CONFIG_USB_NET_SR9800=m
++CONFIG_USB_NET_SMSC75XX=m
++CONFIG_USB_NET_SMSC95XX=y
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_CDC_SUBSET=m
++CONFIG_USB_ALI_M5632=y
++CONFIG_USB_AN2720=y
++CONFIG_USB_EPSON2888=y
++CONFIG_USB_KC2190=y
++CONFIG_USB_NET_ZAURUS=m
++CONFIG_USB_NET_CX82310_ETH=m
++CONFIG_USB_NET_KALMIA=m
++CONFIG_USB_NET_QMI_WWAN=m
++CONFIG_USB_HSO=m
++CONFIG_USB_NET_INT51X1=m
++CONFIG_USB_IPHETH=m
++CONFIG_USB_SIERRA_NET=m
++CONFIG_USB_VL600=m
++CONFIG_ATH9K=m
++CONFIG_ATH9K_HTC=m
++CONFIG_CARL9170=m
++CONFIG_ATH6KL=m
++CONFIG_ATH6KL_USB=m
++CONFIG_AR5523=m
++CONFIG_AT76C50X_USB=m
++CONFIG_B43=m
++# CONFIG_B43_PHY_N is not set
++CONFIG_B43LEGACY=m
++CONFIG_BRCMFMAC=m
++CONFIG_BRCMFMAC_USB=y
++CONFIG_BRCMDBG=y
++CONFIG_HOSTAP=m
++CONFIG_P54_COMMON=m
++CONFIG_P54_USB=m
++CONFIG_LIBERTAS=m
++CONFIG_LIBERTAS_USB=m
++CONFIG_LIBERTAS_SDIO=m
++CONFIG_LIBERTAS_THINFIRM=m
++CONFIG_LIBERTAS_THINFIRM_USB=m
++CONFIG_MWIFIEX=m
++CONFIG_MWIFIEX_SDIO=m
++CONFIG_MT7601U=m
++CONFIG_RT2X00=m
++CONFIG_RT2500USB=m
++CONFIG_RT73USB=m
++CONFIG_RT2800USB=m
++CONFIG_RT2800USB_RT3573=y
++CONFIG_RT2800USB_RT53XX=y
++CONFIG_RT2800USB_RT55XX=y
++CONFIG_RT2800USB_UNKNOWN=y
++CONFIG_RTL8187=m
++CONFIG_RTL8192CU=m
++CONFIG_RTL8XXXU=m
++CONFIG_USB_ZD1201=m
++CONFIG_ZD1211RW=m
++CONFIG_MAC80211_HWSIM=m
++CONFIG_USB_NET_RNDIS_WLAN=m
++CONFIG_WIMAX_I2400M_USB=m
++CONFIG_IEEE802154_AT86RF230=m
++CONFIG_IEEE802154_MRF24J40=m
++CONFIG_IEEE802154_CC2520=m
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_JOYDEV=m
++CONFIG_INPUT_EVDEV=m
++# CONFIG_KEYBOARD_ATKBD is not set
++CONFIG_KEYBOARD_GPIO=m
++# CONFIG_INPUT_MOUSE is not set
++CONFIG_INPUT_JOYSTICK=y
++CONFIG_JOYSTICK_IFORCE=m
++CONFIG_JOYSTICK_IFORCE_USB=y
++CONFIG_JOYSTICK_XPAD=m
++CONFIG_JOYSTICK_XPAD_FF=y
++CONFIG_JOYSTICK_XPAD_LEDS=y
++CONFIG_JOYSTICK_PSXPAD_SPI=m
++CONFIG_JOYSTICK_PSXPAD_SPI_FF=y
++CONFIG_JOYSTICK_RPISENSE=m
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_ADS7846=m
++CONFIG_TOUCHSCREEN_EGALAX=m
++CONFIG_TOUCHSCREEN_EXC3000=m
++CONFIG_TOUCHSCREEN_GOODIX=m
++CONFIG_TOUCHSCREEN_EDT_FT5X06=m
++CONFIG_TOUCHSCREEN_RPI_FT5406=m
++CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
++CONFIG_TOUCHSCREEN_STMPE=m
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_AD714X=m
++CONFIG_INPUT_ATI_REMOTE2=m
++CONFIG_INPUT_KEYSPAN_REMOTE=m
++CONFIG_INPUT_POWERMATE=m
++CONFIG_INPUT_YEALINK=m
++CONFIG_INPUT_CM109=m
++CONFIG_INPUT_UINPUT=m
++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
++CONFIG_INPUT_ADXL34X=m
++CONFIG_INPUT_CMA3000=m
++CONFIG_SERIO=m
++CONFIG_SERIO_RAW=m
++CONFIG_GAMEPORT=m
++CONFIG_GAMEPORT_NS558=m
++CONFIG_GAMEPORT_L4=m
++CONFIG_BRCM_CHAR_DRIVERS=y
++CONFIG_BCM_VCIO=y
++CONFIG_BCM_VC_SM=y
++CONFIG_BCM2835_DEVGPIOMEM=y
++# CONFIG_LEGACY_PTYS is not set
++CONFIG_SERIAL_8250=y
++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
++CONFIG_SERIAL_8250_CONSOLE=y
++# CONFIG_SERIAL_8250_DMA is not set
++CONFIG_SERIAL_8250_NR_UARTS=1
++CONFIG_SERIAL_8250_RUNTIME_UARTS=0
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++CONFIG_SERIAL_8250_BCM2835AUX=y
++CONFIG_SERIAL_OF_PLATFORM=y
++CONFIG_SERIAL_AMBA_PL011=y
++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
++CONFIG_SERIAL_SC16IS7XX=m
++CONFIG_SERIAL_SC16IS7XX_SPI=y
++CONFIG_SERIAL_DEV_BUS=m
++CONFIG_TTY_PRINTK=y
++CONFIG_HW_RANDOM=y
++CONFIG_RAW_DRIVER=y
++CONFIG_I2C=y
++CONFIG_I2C_CHARDEV=m
++CONFIG_I2C_MUX_GPMUX=m
++CONFIG_I2C_MUX_PCA954x=m
++CONFIG_I2C_BCM2708=m
++CONFIG_I2C_BCM2835=m
++CONFIG_I2C_GPIO=m
++CONFIG_I2C_ROBOTFUZZ_OSIF=m
++CONFIG_I2C_TINY_USB=m
++CONFIG_SPI=y
++CONFIG_SPI_BCM2835=m
++CONFIG_SPI_BCM2835AUX=m
++CONFIG_SPI_SPIDEV=m
++CONFIG_SPI_SLAVE=y
++CONFIG_PPS=m
++CONFIG_PPS_CLIENT_LDISC=m
++CONFIG_PPS_CLIENT_GPIO=m
++CONFIG_PINCTRL_MCP23S08=m
++CONFIG_GPIO_BCM_EXP=y
++CONFIG_GPIO_BCM_VIRT=y
++CONFIG_GPIO_MOCKUP=m
++CONFIG_GPIO_PCF857X=m
++CONFIG_GPIO_ARIZONA=m
++CONFIG_GPIO_STMPE=y
++CONFIG_W1=m
++CONFIG_W1_MASTER_DS2490=m
++CONFIG_W1_MASTER_DS2482=m
++CONFIG_W1_MASTER_DS1WM=m
++CONFIG_W1_MASTER_GPIO=m
++CONFIG_W1_SLAVE_THERM=m
++CONFIG_W1_SLAVE_SMEM=m
++CONFIG_W1_SLAVE_DS2408=m
++CONFIG_W1_SLAVE_DS2413=m
++CONFIG_W1_SLAVE_DS2406=m
++CONFIG_W1_SLAVE_DS2423=m
++CONFIG_W1_SLAVE_DS2431=m
++CONFIG_W1_SLAVE_DS2433=m
++CONFIG_W1_SLAVE_DS2438=m
++CONFIG_W1_SLAVE_DS2760=m
++CONFIG_W1_SLAVE_DS2780=m
++CONFIG_W1_SLAVE_DS2781=m
++CONFIG_W1_SLAVE_DS28E04=m
++CONFIG_POWER_RESET=y
++CONFIG_POWER_RESET_GPIO=y
++CONFIG_BATTERY_DS2760=m
++CONFIG_BATTERY_GAUGE_LTC2941=m
++CONFIG_HWMON=m
++CONFIG_SENSORS_DS1621=m
++CONFIG_SENSORS_JC42=m
++CONFIG_SENSORS_LM75=m
++CONFIG_SENSORS_SHT21=m
++CONFIG_SENSORS_SHT3x=m
++CONFIG_SENSORS_SHTC1=m
++CONFIG_SENSORS_ADS1015=m
++CONFIG_SENSORS_INA2XX=m
++CONFIG_SENSORS_TMP102=m
++CONFIG_THERMAL=y
++CONFIG_BCM2835_THERMAL=y
++CONFIG_WATCHDOG=y
++CONFIG_GPIO_WATCHDOG=m
++CONFIG_BCM2835_WDT=y
++CONFIG_MFD_STMPE=y
++CONFIG_STMPE_SPI=y
++CONFIG_MFD_ARIZONA_I2C=m
++CONFIG_MFD_ARIZONA_SPI=m
++CONFIG_MFD_WM5102=y
++CONFIG_REGULATOR=y
++CONFIG_REGULATOR_FIXED_VOLTAGE=m
++CONFIG_REGULATOR_ARIZONA_LDO1=m
++CONFIG_REGULATOR_ARIZONA_MICSUPP=m
++CONFIG_LIRC=m
++CONFIG_RC_DEVICES=y
++CONFIG_RC_ATI_REMOTE=m
++CONFIG_IR_IMON=m
++CONFIG_IR_MCEUSB=m
++CONFIG_IR_REDRAT3=m
++CONFIG_IR_STREAMZAP=m
++CONFIG_IR_IGUANA=m
++CONFIG_IR_TTUSBIR=m
++CONFIG_RC_LOOPBACK=m
++CONFIG_IR_GPIO_CIR=m
++CONFIG_IR_GPIO_TX=m
++CONFIG_IR_PWM_TX=m
++CONFIG_MEDIA_SUPPORT=m
++CONFIG_MEDIA_CAMERA_SUPPORT=y
++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
++CONFIG_MEDIA_RADIO_SUPPORT=y
++CONFIG_MEDIA_CONTROLLER=y
++CONFIG_MEDIA_USB_SUPPORT=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_USB_M5602=m
++CONFIG_USB_STV06XX=m
++CONFIG_USB_GL860=m
++CONFIG_USB_GSPCA_BENQ=m
++CONFIG_USB_GSPCA_CONEX=m
++CONFIG_USB_GSPCA_CPIA1=m
++CONFIG_USB_GSPCA_DTCS033=m
++CONFIG_USB_GSPCA_ETOMS=m
++CONFIG_USB_GSPCA_FINEPIX=m
++CONFIG_USB_GSPCA_JEILINJ=m
++CONFIG_USB_GSPCA_JL2005BCD=m
++CONFIG_USB_GSPCA_KINECT=m
++CONFIG_USB_GSPCA_KONICA=m
++CONFIG_USB_GSPCA_MARS=m
++CONFIG_USB_GSPCA_MR97310A=m
++CONFIG_USB_GSPCA_NW80X=m
++CONFIG_USB_GSPCA_OV519=m
++CONFIG_USB_GSPCA_OV534=m
++CONFIG_USB_GSPCA_OV534_9=m
++CONFIG_USB_GSPCA_PAC207=m
++CONFIG_USB_GSPCA_PAC7302=m
++CONFIG_USB_GSPCA_PAC7311=m
++CONFIG_USB_GSPCA_SE401=m
++CONFIG_USB_GSPCA_SN9C2028=m
++CONFIG_USB_GSPCA_SN9C20X=m
++CONFIG_USB_GSPCA_SONIXB=m
++CONFIG_USB_GSPCA_SONIXJ=m
++CONFIG_USB_GSPCA_SPCA500=m
++CONFIG_USB_GSPCA_SPCA501=m
++CONFIG_USB_GSPCA_SPCA505=m
++CONFIG_USB_GSPCA_SPCA506=m
++CONFIG_USB_GSPCA_SPCA508=m
++CONFIG_USB_GSPCA_SPCA561=m
++CONFIG_USB_GSPCA_SPCA1528=m
++CONFIG_USB_GSPCA_SQ905=m
++CONFIG_USB_GSPCA_SQ905C=m
++CONFIG_USB_GSPCA_SQ930X=m
++CONFIG_USB_GSPCA_STK014=m
++CONFIG_USB_GSPCA_STK1135=m
++CONFIG_USB_GSPCA_STV0680=m
++CONFIG_USB_GSPCA_SUNPLUS=m
++CONFIG_USB_GSPCA_T613=m
++CONFIG_USB_GSPCA_TOPRO=m
++CONFIG_USB_GSPCA_TV8532=m
++CONFIG_USB_GSPCA_VC032X=m
++CONFIG_USB_GSPCA_VICAM=m
++CONFIG_USB_GSPCA_XIRLINK_CIT=m
++CONFIG_USB_GSPCA_ZC3XX=m
++CONFIG_USB_PWC=m
++CONFIG_VIDEO_CPIA2=m
++CONFIG_USB_ZR364XX=m
++CONFIG_USB_STKWEBCAM=m
++CONFIG_USB_S2255=m
++CONFIG_VIDEO_USBTV=m
++CONFIG_VIDEO_PVRUSB2=m
++CONFIG_VIDEO_HDPVR=m
++CONFIG_VIDEO_USBVISION=m
++CONFIG_VIDEO_STK1160_COMMON=m
++CONFIG_VIDEO_GO7007=m
++CONFIG_VIDEO_GO7007_USB=m
++CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
++CONFIG_VIDEO_AU0828=m
++CONFIG_VIDEO_AU0828_RC=y
++CONFIG_VIDEO_CX231XX=m
++CONFIG_VIDEO_CX231XX_ALSA=m
++CONFIG_VIDEO_CX231XX_DVB=m
++CONFIG_VIDEO_TM6000=m
++CONFIG_VIDEO_TM6000_ALSA=m
++CONFIG_VIDEO_TM6000_DVB=m
++CONFIG_DVB_USB=m
++CONFIG_DVB_USB_A800=m
++CONFIG_DVB_USB_DIBUSB_MB=m
++CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
++CONFIG_DVB_USB_DIBUSB_MC=m
++CONFIG_DVB_USB_DIB0700=m
++CONFIG_DVB_USB_UMT_010=m
++CONFIG_DVB_USB_CXUSB=m
++CONFIG_DVB_USB_M920X=m
++CONFIG_DVB_USB_DIGITV=m
++CONFIG_DVB_USB_VP7045=m
++CONFIG_DVB_USB_VP702X=m
++CONFIG_DVB_USB_GP8PSK=m
++CONFIG_DVB_USB_NOVA_T_USB2=m
++CONFIG_DVB_USB_TTUSB2=m
++CONFIG_DVB_USB_DTT200U=m
++CONFIG_DVB_USB_OPERA1=m
++CONFIG_DVB_USB_AF9005=m
++CONFIG_DVB_USB_AF9005_REMOTE=m
++CONFIG_DVB_USB_PCTV452E=m
++CONFIG_DVB_USB_DW2102=m
++CONFIG_DVB_USB_CINERGY_T2=m
++CONFIG_DVB_USB_DTV5100=m
++CONFIG_DVB_USB_FRIIO=m
++CONFIG_DVB_USB_AZ6027=m
++CONFIG_DVB_USB_TECHNISAT_USB2=m
++CONFIG_DVB_USB_V2=m
++CONFIG_DVB_USB_AF9015=m
++CONFIG_DVB_USB_AF9035=m
++CONFIG_DVB_USB_ANYSEE=m
++CONFIG_DVB_USB_AU6610=m
++CONFIG_DVB_USB_AZ6007=m
++CONFIG_DVB_USB_CE6230=m
++CONFIG_DVB_USB_EC168=m
++CONFIG_DVB_USB_GL861=m
++CONFIG_DVB_USB_LME2510=m
++CONFIG_DVB_USB_MXL111SF=m
++CONFIG_DVB_USB_RTL28XXU=m
++CONFIG_DVB_USB_DVBSKY=m
++CONFIG_SMS_USB_DRV=m
++CONFIG_DVB_B2C2_FLEXCOP_USB=m
++CONFIG_DVB_AS102=m
++CONFIG_VIDEO_EM28XX=m
++CONFIG_VIDEO_EM28XX_V4L2=m
++CONFIG_VIDEO_EM28XX_ALSA=m
++CONFIG_VIDEO_EM28XX_DVB=m
++CONFIG_V4L_PLATFORM_DRIVERS=y
++CONFIG_RADIO_SI470X=y
++CONFIG_USB_SI470X=m
++CONFIG_I2C_SI470X=m
++CONFIG_RADIO_SI4713=m
++CONFIG_I2C_SI4713=m
++CONFIG_USB_MR800=m
++CONFIG_USB_DSBR=m
++CONFIG_RADIO_SHARK=m
++CONFIG_RADIO_SHARK2=m
++CONFIG_USB_KEENE=m
++CONFIG_USB_MA901=m
++CONFIG_RADIO_TEA5764=m
++CONFIG_RADIO_SAA7706H=m
++CONFIG_RADIO_TEF6862=m
++CONFIG_RADIO_WL1273=m
++CONFIG_RADIO_WL128X=m
++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
++CONFIG_VIDEO_UDA1342=m
++CONFIG_VIDEO_SONY_BTF_MPX=m
++CONFIG_VIDEO_TVP5150=m
++CONFIG_VIDEO_TW2804=m
++CONFIG_VIDEO_TW9903=m
++CONFIG_VIDEO_TW9906=m
++CONFIG_VIDEO_OV7640=m
++CONFIG_VIDEO_MT9V011=m
++CONFIG_DRM=m
++CONFIG_DRM_LOAD_EDID_FIRMWARE=y
++CONFIG_DRM_UDL=m
++CONFIG_DRM_PANEL_SIMPLE=m
++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
++CONFIG_DRM_VC4=m
++CONFIG_DRM_TINYDRM=m
++CONFIG_TINYDRM_MI0283QT=m
++CONFIG_TINYDRM_REPAPER=m
++CONFIG_FB=y
++CONFIG_FB_BCM2708=y
++CONFIG_FB_UDL=m
++CONFIG_FB_SSD1307=m
++CONFIG_FB_RPISENSE=m
++# CONFIG_BACKLIGHT_GENERIC is not set
++CONFIG_BACKLIGHT_RPI=m
++CONFIG_BACKLIGHT_GPIO=m
++CONFIG_FRAMEBUFFER_CONSOLE=y
++CONFIG_LOGO=y
++# CONFIG_LOGO_LINUX_MONO is not set
++# CONFIG_LOGO_LINUX_VGA16 is not set
++CONFIG_SOUND=y
++CONFIG_SND=m
++CONFIG_SND_HRTIMER=m
++CONFIG_SND_SEQUENCER=m
++CONFIG_SND_SEQ_DUMMY=m
++CONFIG_SND_DUMMY=m
++CONFIG_SND_ALOOP=m
++CONFIG_SND_VIRMIDI=m
++CONFIG_SND_MTPAV=m
++CONFIG_SND_SERIAL_U16550=m
++CONFIG_SND_MPU401=m
++CONFIG_SND_USB_AUDIO=m
++CONFIG_SND_USB_UA101=m
++CONFIG_SND_USB_CAIAQ=m
++CONFIG_SND_USB_CAIAQ_INPUT=y
++CONFIG_SND_USB_6FIRE=m
++CONFIG_SND_USB_HIFACE=m
++CONFIG_SND_SOC=m
++CONFIG_SND_BCM2835_SOC_I2S=m
++CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
++CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m
++CONFIG_SND_BCM2708_SOC_RPI_DAC=m
++CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
++CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
++CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m
++CONFIG_SND_DIGIDAC1_SOUNDCARD=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m
++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=m
++CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=m
++CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m
++CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m
++CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m
++CONFIG_SND_PISOUND=m
++CONFIG_SND_SOC_ADAU1701=m
++CONFIG_SND_SOC_ADAU7002=m
++CONFIG_SND_SOC_AK4554=m
++CONFIG_SND_SOC_CS4271_I2C=m
++CONFIG_SND_SOC_SPDIF=m
++CONFIG_SND_SOC_WM8804_I2C=m
++CONFIG_SND_SIMPLE_CARD=m
++CONFIG_HID_BATTERY_STRENGTH=y
++CONFIG_HIDRAW=y
++CONFIG_UHID=m
++CONFIG_HID_A4TECH=m
++CONFIG_HID_ACRUX=m
++CONFIG_HID_APPLE=m
++CONFIG_HID_ASUS=m
++CONFIG_HID_BELKIN=m
++CONFIG_HID_BETOP_FF=m
++CONFIG_HID_CHERRY=m
++CONFIG_HID_CHICONY=m
++CONFIG_HID_CYPRESS=m
++CONFIG_HID_DRAGONRISE=m
++CONFIG_HID_EMS_FF=m
++CONFIG_HID_ELECOM=m
++CONFIG_HID_ELO=m
++CONFIG_HID_EZKEY=m
++CONFIG_HID_GEMBIRD=m
++CONFIG_HID_HOLTEK=m
++CONFIG_HID_KEYTOUCH=m
++CONFIG_HID_KYE=m
++CONFIG_HID_UCLOGIC=m
++CONFIG_HID_WALTOP=m
++CONFIG_HID_GYRATION=m
++CONFIG_HID_TWINHAN=m
++CONFIG_HID_KENSINGTON=m
++CONFIG_HID_LCPOWER=m
++CONFIG_HID_LOGITECH=m
++CONFIG_HID_LOGITECH_DJ=m
++CONFIG_LOGITECH_FF=y
++CONFIG_LOGIRUMBLEPAD2_FF=y
++CONFIG_LOGIG940_FF=y
++CONFIG_HID_MAGICMOUSE=m
++CONFIG_HID_MICROSOFT=m
++CONFIG_HID_MONTEREY=m
++CONFIG_HID_MULTITOUCH=m
++CONFIG_HID_NTRIG=m
++CONFIG_HID_ORTEK=m
++CONFIG_HID_PANTHERLORD=m
++CONFIG_HID_PETALYNX=m
++CONFIG_HID_PICOLCD=m
++CONFIG_HID_ROCCAT=m
++CONFIG_HID_SAMSUNG=m
++CONFIG_HID_SONY=m
++CONFIG_SONY_FF=y
++CONFIG_HID_SPEEDLINK=m
++CONFIG_HID_SUNPLUS=m
++CONFIG_HID_GREENASIA=m
++CONFIG_HID_SMARTJOYPLUS=m
++CONFIG_HID_TOPSEED=m
++CONFIG_HID_THINGM=m
++CONFIG_HID_THRUSTMASTER=m
++CONFIG_HID_WACOM=m
++CONFIG_HID_WIIMOTE=m
++CONFIG_HID_XINMO=m
++CONFIG_HID_ZEROPLUS=m
++CONFIG_HID_ZYDACRON=m
++CONFIG_HID_PID=y
++CONFIG_USB_HIDDEV=y
++CONFIG_USB=y
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++CONFIG_USB_MON=m
++CONFIG_USB_DWCOTG=y
++CONFIG_USB_PRINTER=m
++CONFIG_USB_STORAGE=y
++CONFIG_USB_STORAGE_REALTEK=m
++CONFIG_USB_STORAGE_DATAFAB=m
++CONFIG_USB_STORAGE_FREECOM=m
++CONFIG_USB_STORAGE_ISD200=m
++CONFIG_USB_STORAGE_USBAT=m
++CONFIG_USB_STORAGE_SDDR09=m
++CONFIG_USB_STORAGE_SDDR55=m
++CONFIG_USB_STORAGE_JUMPSHOT=m
++CONFIG_USB_STORAGE_ALAUDA=m
++CONFIG_USB_STORAGE_ONETOUCH=m
++CONFIG_USB_STORAGE_KARMA=m
++CONFIG_USB_STORAGE_CYPRESS_ATACB=m
++CONFIG_USB_STORAGE_ENE_UB6250=m
++CONFIG_USB_MDC800=m
++CONFIG_USB_MICROTEK=m
++CONFIG_USBIP_CORE=m
++CONFIG_USBIP_VHCI_HCD=m
++CONFIG_USBIP_HOST=m
++CONFIG_USB_DWC2=m
++CONFIG_USB_SERIAL=m
++CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++CONFIG_USB_SERIAL_CH341=m
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP210X=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_F81232=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_IUU=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_METRO=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++CONFIG_USB_SERIAL_OTI6858=m
++CONFIG_USB_SERIAL_QCAUX=m
++CONFIG_USB_SERIAL_QUALCOMM=m
++CONFIG_USB_SERIAL_SPCP8X5=m
++CONFIG_USB_SERIAL_SAFE=m
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_SYMBOL=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++CONFIG_USB_SERIAL_OPTICON=m
++CONFIG_USB_SERIAL_XSENS_MT=m
++CONFIG_USB_SERIAL_WISHBONE=m
++CONFIG_USB_SERIAL_SSU100=m
++CONFIG_USB_SERIAL_QT2=m
++CONFIG_USB_SERIAL_DEBUG=m
++CONFIG_USB_EMI62=m
++CONFIG_USB_EMI26=m
++CONFIG_USB_ADUTUX=m
++CONFIG_USB_SEVSEG=m
++CONFIG_USB_RIO500=m
++CONFIG_USB_LEGOTOWER=m
++CONFIG_USB_LCD=m
++CONFIG_USB_CYPRESS_CY7C63=m
++CONFIG_USB_CYTHERM=m
++CONFIG_USB_IDMOUSE=m
++CONFIG_USB_FTDI_ELAN=m
++CONFIG_USB_APPLEDISPLAY=m
++CONFIG_USB_LD=m
++CONFIG_USB_TRANCEVIBRATOR=m
++CONFIG_USB_IOWARRIOR=m
++CONFIG_USB_TEST=m
++CONFIG_USB_ISIGHTFW=m
++CONFIG_USB_YUREX=m
++CONFIG_USB_ATM=m
++CONFIG_USB_SPEEDTOUCH=m
++CONFIG_USB_CXACRU=m
++CONFIG_USB_UEAGLEATM=m
++CONFIG_USB_XUSBATM=m
++CONFIG_USB_GADGET=m
++CONFIG_USB_ZERO=m
++CONFIG_USB_AUDIO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_MASS_STORAGE=m
++CONFIG_USB_G_SERIAL=m
++CONFIG_USB_MIDI_GADGET=m
++CONFIG_USB_G_PRINTER=m
++CONFIG_USB_CDC_COMPOSITE=m
++CONFIG_USB_G_ACM_MS=m
++CONFIG_USB_G_MULTI=m
++CONFIG_USB_G_HID=m
++CONFIG_USB_G_WEBCAM=m
++CONFIG_MMC=y
++CONFIG_MMC_BLOCK_MINORS=32
++CONFIG_MMC_BCM2835_MMC=y
++CONFIG_MMC_BCM2835_DMA=y
++CONFIG_MMC_BCM2835_SDHOST=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_PLTFM=y
++CONFIG_MMC_SPI=m
++CONFIG_LEDS_CLASS=y
++CONFIG_LEDS_GPIO=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_ONESHOT=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_LEDS_TRIGGER_BACKLIGHT=y
++CONFIG_LEDS_TRIGGER_CPU=y
++CONFIG_LEDS_TRIGGER_GPIO=y
++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
++CONFIG_LEDS_TRIGGER_TRANSIENT=m
++CONFIG_LEDS_TRIGGER_CAMERA=m
++CONFIG_LEDS_TRIGGER_INPUT=y
++CONFIG_LEDS_TRIGGER_PANIC=y
++CONFIG_RTC_CLASS=y
++# CONFIG_RTC_HCTOSYS is not set
++CONFIG_RTC_DRV_ABX80X=m
++CONFIG_RTC_DRV_DS1307=m
++CONFIG_RTC_DRV_DS1374=m
++CONFIG_RTC_DRV_DS1672=m
++CONFIG_RTC_DRV_MAX6900=m
++CONFIG_RTC_DRV_RS5C372=m
++CONFIG_RTC_DRV_ISL1208=m
++CONFIG_RTC_DRV_ISL12022=m
++CONFIG_RTC_DRV_X1205=m
++CONFIG_RTC_DRV_PCF8523=m
++CONFIG_RTC_DRV_PCF8563=m
++CONFIG_RTC_DRV_PCF8583=m
++CONFIG_RTC_DRV_M41T80=m
++CONFIG_RTC_DRV_BQ32K=m
++CONFIG_RTC_DRV_S35390A=m
++CONFIG_RTC_DRV_FM3130=m
++CONFIG_RTC_DRV_RX8581=m
++CONFIG_RTC_DRV_RX8025=m
++CONFIG_RTC_DRV_EM3027=m
++CONFIG_RTC_DRV_M41T93=m
++CONFIG_RTC_DRV_M41T94=m
++CONFIG_RTC_DRV_DS1302=m
++CONFIG_RTC_DRV_DS1305=m
++CONFIG_RTC_DRV_DS1390=m
++CONFIG_RTC_DRV_R9701=m
++CONFIG_RTC_DRV_RX4581=m
++CONFIG_RTC_DRV_RS5C348=m
++CONFIG_RTC_DRV_MAX6902=m
++CONFIG_RTC_DRV_PCF2123=m
++CONFIG_RTC_DRV_DS3232=m
++CONFIG_RTC_DRV_PCF2127=m
++CONFIG_RTC_DRV_RV3029C2=m
++CONFIG_DMADEVICES=y
++CONFIG_DMA_BCM2835=y
++CONFIG_DMA_BCM2708=y
++CONFIG_UIO=m
++CONFIG_UIO_PDRV_GENIRQ=m
++CONFIG_STAGING=y
++CONFIG_IRDA=m
++CONFIG_IRLAN=m
++CONFIG_IRNET=m
++CONFIG_IRCOMM=m
++CONFIG_IRDA_ULTRA=y
++CONFIG_IRDA_CACHE_LAST_LSAP=y
++CONFIG_IRDA_FAST_RR=y
++CONFIG_IRTTY_SIR=m
++CONFIG_KINGSUN_DONGLE=m
++CONFIG_KSDAZZLE_DONGLE=m
++CONFIG_KS959_DONGLE=m
++CONFIG_USB_IRDA=m
++CONFIG_SIGMATEL_FIR=m
++CONFIG_MCS_FIR=m
++CONFIG_PRISM2_USB=m
++CONFIG_R8712U=m
++CONFIG_R8188EU=m
++CONFIG_VT6656=m
++CONFIG_SPEAKUP=m
++CONFIG_SPEAKUP_SYNTH_SOFT=m
++CONFIG_STAGING_MEDIA=y
++CONFIG_LIRC_STAGING=y
++CONFIG_LIRC_RPI=m
++CONFIG_FB_TFT=m
++CONFIG_FB_TFT_AGM1264K_FL=m
++CONFIG_FB_TFT_BD663474=m
++CONFIG_FB_TFT_HX8340BN=m
++CONFIG_FB_TFT_HX8347D=m
++CONFIG_FB_TFT_HX8353D=m
++CONFIG_FB_TFT_HX8357D=m
++CONFIG_FB_TFT_ILI9163=m
++CONFIG_FB_TFT_ILI9320=m
++CONFIG_FB_TFT_ILI9325=m
++CONFIG_FB_TFT_ILI9340=m
++CONFIG_FB_TFT_ILI9341=m
++CONFIG_FB_TFT_ILI9481=m
++CONFIG_FB_TFT_ILI9486=m
++CONFIG_FB_TFT_PCD8544=m
++CONFIG_FB_TFT_RA8875=m
++CONFIG_FB_TFT_S6D02A1=m
++CONFIG_FB_TFT_S6D1121=m
++CONFIG_FB_TFT_SSD1289=m
++CONFIG_FB_TFT_SSD1306=m
++CONFIG_FB_TFT_SSD1331=m
++CONFIG_FB_TFT_SSD1351=m
++CONFIG_FB_TFT_ST7735R=m
++CONFIG_FB_TFT_ST7789V=m
++CONFIG_FB_TFT_TINYLCD=m
++CONFIG_FB_TFT_TLS8204=m
++CONFIG_FB_TFT_UC1701=m
++CONFIG_FB_TFT_UPD161704=m
++CONFIG_FB_TFT_WATTEROTT=m
++CONFIG_FB_FLEX=m
++CONFIG_FB_TFT_FBTFT_DEVICE=m
++CONFIG_BCM2835_VCHIQ=y
++CONFIG_BCM2835_VCHIQ_SUPPORT_MEMDUMP=y
++CONFIG_SND_BCM2835=m
++CONFIG_VIDEO_BCM2835=m
++CONFIG_MAILBOX=y
++CONFIG_BCM2835_MBOX=y
++# CONFIG_IOMMU_SUPPORT is not set
++CONFIG_RASPBERRYPI_POWER=y
++CONFIG_EXTCON=m
++CONFIG_EXTCON_ARIZONA=m
++CONFIG_IIO=m
++CONFIG_IIO_BUFFER_CB=m
++CONFIG_MCP320X=m
++CONFIG_MCP3422=m
++CONFIG_DHT11=m
++CONFIG_HDC100X=m
++CONFIG_HTU21=m
++CONFIG_INV_MPU6050_I2C=m
++CONFIG_TSL4531=m
++CONFIG_VEML6070=m
++CONFIG_BMP280=m
++CONFIG_PWM_BCM2835=m
++CONFIG_PWM_PCA9685=m
++CONFIG_RPI_AXIPERF=m
++CONFIG_RASPBERRYPI_FIRMWARE=y
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_POSIX_ACL=y
++CONFIG_EXT4_FS_SECURITY=y
++CONFIG_REISERFS_FS=m
++CONFIG_REISERFS_FS_XATTR=y
++CONFIG_REISERFS_FS_POSIX_ACL=y
++CONFIG_REISERFS_FS_SECURITY=y
++CONFIG_JFS_FS=m
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++CONFIG_JFS_STATISTICS=y
++CONFIG_XFS_FS=m
++CONFIG_XFS_QUOTA=y
++CONFIG_XFS_POSIX_ACL=y
++CONFIG_XFS_RT=y
++CONFIG_GFS2_FS=m
++CONFIG_OCFS2_FS=m
++CONFIG_BTRFS_FS=m
++CONFIG_BTRFS_FS_POSIX_ACL=y
++CONFIG_NILFS2_FS=m
++CONFIG_F2FS_FS=y
++CONFIG_FANOTIFY=y
++CONFIG_QFMT_V1=m
++CONFIG_QFMT_V2=m
++CONFIG_AUTOFS4_FS=y
++CONFIG_FUSE_FS=m
++CONFIG_CUSE=m
++CONFIG_OVERLAY_FS=m
++CONFIG_FSCACHE=y
++CONFIG_FSCACHE_STATS=y
++CONFIG_FSCACHE_HISTOGRAM=y
++CONFIG_CACHEFILES=y
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++CONFIG_UDF_FS=m
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
++CONFIG_NTFS_FS=m
++CONFIG_NTFS_RW=y
++CONFIG_TMPFS=y
++CONFIG_TMPFS_POSIX_ACL=y
++CONFIG_ECRYPT_FS=m
++CONFIG_HFS_FS=m
++CONFIG_HFSPLUS_FS=m
++CONFIG_JFFS2_FS=m
++CONFIG_JFFS2_SUMMARY=y
++CONFIG_UBIFS_FS=m
++CONFIG_SQUASHFS=m
++CONFIG_SQUASHFS_XATTR=y
++CONFIG_SQUASHFS_LZO=y
++CONFIG_SQUASHFS_XZ=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_NFS_SWAP=y
++CONFIG_NFS_V4_1=y
++CONFIG_ROOT_NFS=y
++CONFIG_NFS_FSCACHE=y
++CONFIG_NFSD=m
++CONFIG_NFSD_V3_ACL=y
++CONFIG_NFSD_V4=y
++CONFIG_CIFS=m
++CONFIG_CIFS_WEAK_PW_HASH=y
++CONFIG_CIFS_UPCALL=y
++CONFIG_CIFS_XATTR=y
++CONFIG_CIFS_POSIX=y
++CONFIG_CIFS_ACL=y
++CONFIG_CIFS_DFS_UPCALL=y
++CONFIG_CIFS_FSCACHE=y
++CONFIG_9P_FS=m
++CONFIG_9P_FS_POSIX_ACL=y
++CONFIG_NLS_DEFAULT="utf8"
++CONFIG_NLS_CODEPAGE_437=y
++CONFIG_NLS_CODEPAGE_737=m
++CONFIG_NLS_CODEPAGE_775=m
++CONFIG_NLS_CODEPAGE_850=m
++CONFIG_NLS_CODEPAGE_852=m
++CONFIG_NLS_CODEPAGE_855=m
++CONFIG_NLS_CODEPAGE_857=m
++CONFIG_NLS_CODEPAGE_860=m
++CONFIG_NLS_CODEPAGE_861=m
++CONFIG_NLS_CODEPAGE_862=m
++CONFIG_NLS_CODEPAGE_863=m
++CONFIG_NLS_CODEPAGE_864=m
++CONFIG_NLS_CODEPAGE_865=m
++CONFIG_NLS_CODEPAGE_866=m
++CONFIG_NLS_CODEPAGE_869=m
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++CONFIG_NLS_CODEPAGE_932=m
++CONFIG_NLS_CODEPAGE_949=m
++CONFIG_NLS_CODEPAGE_874=m
++CONFIG_NLS_ISO8859_8=m
++CONFIG_NLS_CODEPAGE_1250=m
++CONFIG_NLS_CODEPAGE_1251=m
++CONFIG_NLS_ASCII=y
++CONFIG_NLS_ISO8859_1=m
++CONFIG_NLS_ISO8859_2=m
++CONFIG_NLS_ISO8859_3=m
++CONFIG_NLS_ISO8859_4=m
++CONFIG_NLS_ISO8859_5=m
++CONFIG_NLS_ISO8859_6=m
++CONFIG_NLS_ISO8859_7=m
++CONFIG_NLS_ISO8859_9=m
++CONFIG_NLS_ISO8859_13=m
++CONFIG_NLS_ISO8859_14=m
++CONFIG_NLS_ISO8859_15=m
++CONFIG_NLS_KOI8_R=m
++CONFIG_NLS_KOI8_U=m
++CONFIG_DLM=m
++CONFIG_PRINTK_TIME=y
++CONFIG_BOOT_PRINTK_DELAY=y
++CONFIG_DEBUG_MEMORY_INIT=y
++CONFIG_DETECT_HUNG_TASK=y
++# CONFIG_RCU_TRACE is not set
++CONFIG_LATENCYTOP=y
++CONFIG_IRQSOFF_TRACER=y
++CONFIG_SCHED_TRACER=y
++CONFIG_STACK_TRACER=y
++CONFIG_BLK_DEV_IO_TRACE=y
++# CONFIG_UPROBE_EVENTS is not set
++CONFIG_FUNCTION_PROFILER=y
++CONFIG_KGDB=y
++CONFIG_KGDB_KDB=y
++CONFIG_KDB_KEYBOARD=y
++CONFIG_CRYPTO_USER=m
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_CTS=m
++CONFIG_CRYPTO_XTS=m
++CONFIG_CRYPTO_XCBC=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_WP512=m
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_DES=y
++CONFIG_CRYPTO_LZ4=m
++CONFIG_CRYPTO_USER_API_SKCIPHER=m
++# CONFIG_CRYPTO_HW is not set
++CONFIG_ARM_CRYPTO=y
++CONFIG_CRYPTO_SHA1_ARM_NEON=m
++CONFIG_CRYPTO_AES_ARM=m
++CONFIG_CRYPTO_AES_ARM_BS=m
++CONFIG_CRC_ITU_T=y
++CONFIG_LIBCRC32C=y
+--- /dev/null
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -0,0 +1,1357 @@
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SYSVIPC=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_GENERIC_IRQ_DEBUGFS=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++CONFIG_TASK_XACCT=y
++CONFIG_TASK_IO_ACCOUNTING=y
++CONFIG_IKCONFIG=m
++CONFIG_IKCONFIG_PROC=y
++CONFIG_MEMCG=y
++CONFIG_BLK_CGROUP=y
++CONFIG_CGROUP_FREEZER=y
++CONFIG_CGROUP_DEVICE=y
++CONFIG_CGROUP_CPUACCT=y
++CONFIG_NAMESPACES=y
++CONFIG_USER_NS=y
++CONFIG_SCHED_AUTOGROUP=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_EMBEDDED=y
++# CONFIG_COMPAT_BRK is not set
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++CONFIG_JUMP_LABEL=y
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SRCVERSION_ALL=y
++CONFIG_BLK_DEV_THROTTLING=y
++CONFIG_PARTITION_ADVANCED=y
++CONFIG_MAC_PARTITION=y
++CONFIG_CFQ_GROUP_IOSCHED=y
++CONFIG_ARCH_MULTI_V6=y
++# CONFIG_ARCH_MULTI_V7 is not set
++CONFIG_ARCH_BCM=y
++CONFIG_ARCH_BCM2835=y
++# CONFIG_CACHE_L2X0 is not set
++CONFIG_PREEMPT_VOLUNTARY=y
++# CONFIG_CPU_SW_DOMAIN_PAN is not set
++CONFIG_CLEANCACHE=y
++CONFIG_FRONTSWAP=y
++CONFIG_CMA=y
++CONFIG_ZSMALLOC=m
++CONFIG_PGTABLE_MAPPING=y
++CONFIG_UACCESS_WITH_MEMCPY=y
++CONFIG_SECCOMP=y
++# CONFIG_ATAGS is not set
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait"
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_STAT=y
++CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_VFP=y
++CONFIG_BINFMT_MISC=m
++# CONFIG_SUSPEND is not set
++CONFIG_PM=y
++CONFIG_NET=y
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM_USER=y
++CONFIG_NET_KEY=m
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_MULTIPATH=y
++CONFIG_IP_ROUTE_VERBOSE=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_RARP=y
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE_DEMUX=m
++CONFIG_NET_IPGRE=m
++CONFIG_IP_MROUTE=y
++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
++CONFIG_IP_PIMSM_V1=y
++CONFIG_IP_PIMSM_V2=y
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++CONFIG_INET_DIAG=m
++CONFIG_TCP_CONG_ADVANCED=y
++CONFIG_TCP_CONG_BBR=m
++CONFIG_IPV6=m
++CONFIG_IPV6_ROUTER_PREF=y
++CONFIG_IPV6_ROUTE_INFO=y
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++CONFIG_IPV6_SIT_6RD=y
++CONFIG_IPV6_TUNNEL=m
++CONFIG_IPV6_MULTIPLE_TABLES=y
++CONFIG_IPV6_SUBTREES=y
++CONFIG_IPV6_MROUTE=y
++CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
++CONFIG_IPV6_PIMSM_V2=y
++CONFIG_NETFILTER=y
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CONNTRACK_ZONES=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CONNTRACK_TIMESTAMP=y
++CONFIG_NF_CONNTRACK_AMANDA=m
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_SNMP=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_XT_SET=m
++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_HMARK=m
++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
++CONFIG_NETFILTER_XT_TARGET_LED=m
++CONFIG_NETFILTER_XT_TARGET_LOG=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
++CONFIG_NETFILTER_XT_TARGET_TEE=m
++CONFIG_NETFILTER_XT_TARGET_TPROXY=m
++CONFIG_NETFILTER_XT_TARGET_TRACE=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
++CONFIG_NETFILTER_XT_MATCH_BPF=m
++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_CPU=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
++CONFIG_NETFILTER_XT_MATCH_IPVS=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_NFACCT=m
++CONFIG_NETFILTER_XT_MATCH_OSF=m
++CONFIG_NETFILTER_XT_MATCH_OWNER=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_RATEEST=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_RECENT=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++CONFIG_NETFILTER_XT_MATCH_TIME=m
++CONFIG_NETFILTER_XT_MATCH_U32=m
++CONFIG_IP_SET=m
++CONFIG_IP_SET_BITMAP_IP=m
++CONFIG_IP_SET_BITMAP_IPMAC=m
++CONFIG_IP_SET_BITMAP_PORT=m
++CONFIG_IP_SET_HASH_IP=m
++CONFIG_IP_SET_HASH_IPPORT=m
++CONFIG_IP_SET_HASH_IPPORTIP=m
++CONFIG_IP_SET_HASH_IPPORTNET=m
++CONFIG_IP_SET_HASH_NET=m
++CONFIG_IP_SET_HASH_NETPORT=m
++CONFIG_IP_SET_HASH_NETIFACE=m
++CONFIG_IP_SET_LIST_SET=m
++CONFIG_IP_VS=m
++CONFIG_IP_VS_PROTO_TCP=y
++CONFIG_IP_VS_PROTO_UDP=y
++CONFIG_IP_VS_PROTO_ESP=y
++CONFIG_IP_VS_PROTO_AH=y
++CONFIG_IP_VS_PROTO_SCTP=y
++CONFIG_IP_VS_RR=m
++CONFIG_IP_VS_WRR=m
++CONFIG_IP_VS_LC=m
++CONFIG_IP_VS_WLC=m
++CONFIG_IP_VS_LBLC=m
++CONFIG_IP_VS_LBLCR=m
++CONFIG_IP_VS_DH=m
++CONFIG_IP_VS_SH=m
++CONFIG_IP_VS_SED=m
++CONFIG_IP_VS_NQ=m
++CONFIG_IP_VS_FTP=m
++CONFIG_IP_VS_PE_SIP=m
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_RPFILTER=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_NAT=m
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_RAW=m
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++CONFIG_NF_CONNTRACK_IPV6=m
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_AH=m
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_RPFILTER=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_TARGET_HL=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_RAW=m
++CONFIG_IP6_NF_NAT=m
++CONFIG_IP6_NF_TARGET_MASQUERADE=m
++CONFIG_IP6_NF_TARGET_NPT=m
++CONFIG_BRIDGE_NF_EBTABLES=m
++CONFIG_BRIDGE_EBT_BROUTE=m
++CONFIG_BRIDGE_EBT_T_FILTER=m
++CONFIG_BRIDGE_EBT_T_NAT=m
++CONFIG_BRIDGE_EBT_802_3=m
++CONFIG_BRIDGE_EBT_AMONG=m
++CONFIG_BRIDGE_EBT_ARP=m
++CONFIG_BRIDGE_EBT_IP=m
++CONFIG_BRIDGE_EBT_IP6=m
++CONFIG_BRIDGE_EBT_LIMIT=m
++CONFIG_BRIDGE_EBT_MARK=m
++CONFIG_BRIDGE_EBT_PKTTYPE=m
++CONFIG_BRIDGE_EBT_STP=m
++CONFIG_BRIDGE_EBT_VLAN=m
++CONFIG_BRIDGE_EBT_ARPREPLY=m
++CONFIG_BRIDGE_EBT_DNAT=m
++CONFIG_BRIDGE_EBT_MARK_T=m
++CONFIG_BRIDGE_EBT_REDIRECT=m
++CONFIG_BRIDGE_EBT_SNAT=m
++CONFIG_BRIDGE_EBT_LOG=m
++CONFIG_BRIDGE_EBT_NFLOG=m
++CONFIG_SCTP_COOKIE_HMAC_SHA1=y
++CONFIG_ATM=m
++CONFIG_L2TP=m
++CONFIG_L2TP_V3=y
++CONFIG_L2TP_IP=m
++CONFIG_L2TP_ETH=m
++CONFIG_BRIDGE=m
++CONFIG_VLAN_8021Q=m
++CONFIG_VLAN_8021Q_GVRP=y
++CONFIG_ATALK=m
++CONFIG_6LOWPAN=m
++CONFIG_IEEE802154=m
++CONFIG_IEEE802154_6LOWPAN=m
++CONFIG_MAC802154=m
++CONFIG_NET_SCHED=y
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_ATM=m
++CONFIG_NET_SCH_PRIO=m
++CONFIG_NET_SCH_MULTIQ=m
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFB=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_DRR=m
++CONFIG_NET_SCH_MQPRIO=m
++CONFIG_NET_SCH_CHOKE=m
++CONFIG_NET_SCH_QFQ=m
++CONFIG_NET_SCH_CODEL=m
++CONFIG_NET_SCH_FQ_CODEL=m
++CONFIG_NET_SCH_FQ=m
++CONFIG_NET_SCH_HHF=m
++CONFIG_NET_SCH_PIE=m
++CONFIG_NET_SCH_INGRESS=m
++CONFIG_NET_SCH_PLUG=m
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++CONFIG_NET_CLS_FLOW=m
++CONFIG_NET_CLS_CGROUP=m
++CONFIG_NET_EMATCH=y
++CONFIG_NET_EMATCH_CMP=m
++CONFIG_NET_EMATCH_NBYTE=m
++CONFIG_NET_EMATCH_U32=m
++CONFIG_NET_EMATCH_META=m
++CONFIG_NET_EMATCH_TEXT=m
++CONFIG_NET_EMATCH_IPSET=m
++CONFIG_NET_CLS_ACT=y
++CONFIG_NET_ACT_POLICE=m
++CONFIG_NET_ACT_GACT=m
++CONFIG_GACT_PROB=y
++CONFIG_NET_ACT_MIRRED=m
++CONFIG_NET_ACT_IPT=m
++CONFIG_NET_ACT_NAT=m
++CONFIG_NET_ACT_PEDIT=m
++CONFIG_NET_ACT_SIMP=m
++CONFIG_NET_ACT_SKBEDIT=m
++CONFIG_NET_ACT_CSUM=m
++CONFIG_BATMAN_ADV=m
++CONFIG_OPENVSWITCH=m
++CONFIG_NET_L3_MASTER_DEV=y
++CONFIG_NET_PKTGEN=m
++CONFIG_HAMRADIO=y
++CONFIG_AX25=m
++CONFIG_NETROM=m
++CONFIG_ROSE=m
++CONFIG_MKISS=m
++CONFIG_6PACK=m
++CONFIG_BPQETHER=m
++CONFIG_BAYCOM_SER_FDX=m
++CONFIG_BAYCOM_SER_HDX=m
++CONFIG_YAM=m
++CONFIG_CAN=m
++CONFIG_CAN_VCAN=m
++CONFIG_CAN_SLCAN=m
++CONFIG_CAN_MCP251X=m
++CONFIG_CAN_GS_USB=m
++CONFIG_BT=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++CONFIG_BT_6LOWPAN=m
++CONFIG_BT_HCIBTUSB=m
++CONFIG_BT_HCIUART=m
++CONFIG_BT_HCIUART_3WIRE=y
++CONFIG_BT_HCIUART_BCM=y
++CONFIG_BT_HCIBCM203X=m
++CONFIG_BT_HCIBPA10X=m
++CONFIG_BT_HCIBFUSB=m
++CONFIG_BT_HCIVHCI=m
++CONFIG_BT_MRVL=m
++CONFIG_BT_MRVL_SDIO=m
++CONFIG_BT_ATH3K=m
++CONFIG_BT_WILINK=m
++CONFIG_CFG80211=m
++CONFIG_MAC80211=m
++CONFIG_MAC80211_MESH=y
++CONFIG_WIMAX=m
++CONFIG_RFKILL=m
++CONFIG_RFKILL_INPUT=y
++CONFIG_NET_9P=m
++CONFIG_NFC=m
++CONFIG_DEVTMPFS=y
++CONFIG_DEVTMPFS_MOUNT=y
++CONFIG_DMA_CMA=y
++CONFIG_CMA_SIZE_MBYTES=5
++CONFIG_MTD=m
++CONFIG_MTD_BLOCK=m
++CONFIG_MTD_M25P80=m
++CONFIG_MTD_NAND=m
++CONFIG_MTD_SPI_NOR=m
++CONFIG_MTD_UBI=m
++CONFIG_OF_CONFIGFS=y
++CONFIG_ZRAM=m
++CONFIG_BLK_DEV_LOOP=y
++CONFIG_BLK_DEV_CRYPTOLOOP=m
++CONFIG_BLK_DEV_DRBD=m
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=y
++CONFIG_CDROM_PKTCDVD=m
++CONFIG_ATA_OVER_ETH=m
++CONFIG_EEPROM_AT24=m
++CONFIG_TI_ST=m
++CONFIG_SCSI=y
++# CONFIG_SCSI_PROC_FS is not set
++CONFIG_BLK_DEV_SD=y
++CONFIG_CHR_DEV_ST=m
++CONFIG_CHR_DEV_OSST=m
++CONFIG_BLK_DEV_SR=m
++CONFIG_CHR_DEV_SG=m
++CONFIG_SCSI_ISCSI_ATTRS=y
++CONFIG_ISCSI_TCP=m
++CONFIG_ISCSI_BOOT_SYSFS=m
++CONFIG_MD=y
++CONFIG_MD_LINEAR=m
++CONFIG_BLK_DEV_DM=m
++CONFIG_DM_CRYPT=m
++CONFIG_DM_SNAPSHOT=m
++CONFIG_DM_THIN_PROVISIONING=m
++CONFIG_DM_MIRROR=m
++CONFIG_DM_LOG_USERSPACE=m
++CONFIG_DM_RAID=m
++CONFIG_DM_ZERO=m
++CONFIG_DM_DELAY=m
++CONFIG_NETDEVICES=y
++CONFIG_BONDING=m
++CONFIG_DUMMY=m
++CONFIG_IFB=m
++CONFIG_MACVLAN=m
++CONFIG_IPVLAN=m
++CONFIG_VXLAN=m
++CONFIG_NETCONSOLE=m
++CONFIG_TUN=m
++CONFIG_VETH=m
++CONFIG_ENC28J60=m
++CONFIG_QCA7000_SPI=m
++CONFIG_MDIO_BITBANG=m
++CONFIG_PPP=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_MPPE=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPPOATM=m
++CONFIG_PPPOE=m
++CONFIG_PPPOL2TP=m
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_SLIP=m
++CONFIG_SLIP_COMPRESSED=y
++CONFIG_SLIP_SMART=y
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_RTL8152=m
++CONFIG_USB_LAN78XX=m
++CONFIG_USB_USBNET=y
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_AX88179_178A=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_CDC_EEM=m
++CONFIG_USB_NET_CDC_NCM=m
++CONFIG_USB_NET_HUAWEI_CDC_NCM=m
++CONFIG_USB_NET_CDC_MBIM=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_SR9700=m
++CONFIG_USB_NET_SR9800=m
++CONFIG_USB_NET_SMSC75XX=m
++CONFIG_USB_NET_SMSC95XX=y
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_CDC_SUBSET=m
++CONFIG_USB_ALI_M5632=y
++CONFIG_USB_AN2720=y
++CONFIG_USB_EPSON2888=y
++CONFIG_USB_KC2190=y
++CONFIG_USB_NET_ZAURUS=m
++CONFIG_USB_NET_CX82310_ETH=m
++CONFIG_USB_NET_KALMIA=m
++CONFIG_USB_NET_QMI_WWAN=m
++CONFIG_USB_HSO=m
++CONFIG_USB_NET_INT51X1=m
++CONFIG_USB_IPHETH=m
++CONFIG_USB_SIERRA_NET=m
++CONFIG_USB_VL600=m
++CONFIG_ATH9K=m
++CONFIG_ATH9K_HTC=m
++CONFIG_CARL9170=m
++CONFIG_ATH6KL=m
++CONFIG_ATH6KL_USB=m
++CONFIG_AR5523=m
++CONFIG_AT76C50X_USB=m
++CONFIG_B43=m
++# CONFIG_B43_PHY_N is not set
++CONFIG_B43LEGACY=m
++CONFIG_BRCMFMAC=m
++CONFIG_BRCMFMAC_USB=y
++CONFIG_BRCMDBG=y
++CONFIG_HOSTAP=m
++CONFIG_P54_COMMON=m
++CONFIG_P54_USB=m
++CONFIG_LIBERTAS=m
++CONFIG_LIBERTAS_USB=m
++CONFIG_LIBERTAS_SDIO=m
++CONFIG_LIBERTAS_THINFIRM=m
++CONFIG_LIBERTAS_THINFIRM_USB=m
++CONFIG_MWIFIEX=m
++CONFIG_MWIFIEX_SDIO=m
++CONFIG_MT7601U=m
++CONFIG_RT2X00=m
++CONFIG_RT2500USB=m
++CONFIG_RT73USB=m
++CONFIG_RT2800USB=m
++CONFIG_RT2800USB_RT3573=y
++CONFIG_RT2800USB_RT53XX=y
++CONFIG_RT2800USB_RT55XX=y
++CONFIG_RT2800USB_UNKNOWN=y
++CONFIG_RTL8187=m
++CONFIG_RTL8192CU=m
++CONFIG_RTL8XXXU=m
++CONFIG_USB_ZD1201=m
++CONFIG_ZD1211RW=m
++CONFIG_MAC80211_HWSIM=m
++CONFIG_USB_NET_RNDIS_WLAN=m
++CONFIG_WIMAX_I2400M_USB=m
++CONFIG_IEEE802154_AT86RF230=m
++CONFIG_IEEE802154_MRF24J40=m
++CONFIG_IEEE802154_CC2520=m
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_JOYDEV=m
++CONFIG_INPUT_EVDEV=m
++# CONFIG_KEYBOARD_ATKBD is not set
++CONFIG_KEYBOARD_GPIO=m
++# CONFIG_INPUT_MOUSE is not set
++CONFIG_INPUT_JOYSTICK=y
++CONFIG_JOYSTICK_IFORCE=m
++CONFIG_JOYSTICK_IFORCE_USB=y
++CONFIG_JOYSTICK_XPAD=m
++CONFIG_JOYSTICK_XPAD_FF=y
++CONFIG_JOYSTICK_XPAD_LEDS=y
++CONFIG_JOYSTICK_PSXPAD_SPI=m
++CONFIG_JOYSTICK_PSXPAD_SPI_FF=y
++CONFIG_JOYSTICK_RPISENSE=m
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_ADS7846=m
++CONFIG_TOUCHSCREEN_EGALAX=m
++CONFIG_TOUCHSCREEN_EXC3000=m
++CONFIG_TOUCHSCREEN_GOODIX=m
++CONFIG_TOUCHSCREEN_EDT_FT5X06=m
++CONFIG_TOUCHSCREEN_RPI_FT5406=m
++CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
++CONFIG_TOUCHSCREEN_STMPE=m
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_AD714X=m
++CONFIG_INPUT_ATI_REMOTE2=m
++CONFIG_INPUT_KEYSPAN_REMOTE=m
++CONFIG_INPUT_POWERMATE=m
++CONFIG_INPUT_YEALINK=m
++CONFIG_INPUT_CM109=m
++CONFIG_INPUT_UINPUT=m
++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
++CONFIG_INPUT_ADXL34X=m
++CONFIG_INPUT_CMA3000=m
++CONFIG_SERIO=m
++CONFIG_SERIO_RAW=m
++CONFIG_GAMEPORT=m
++CONFIG_GAMEPORT_NS558=m
++CONFIG_GAMEPORT_L4=m
++CONFIG_BRCM_CHAR_DRIVERS=y
++CONFIG_BCM_VCIO=y
++CONFIG_BCM_VC_SM=y
++CONFIG_BCM2835_DEVGPIOMEM=y
++# CONFIG_LEGACY_PTYS is not set
++CONFIG_SERIAL_8250=y
++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
++CONFIG_SERIAL_8250_CONSOLE=y
++# CONFIG_SERIAL_8250_DMA is not set
++CONFIG_SERIAL_8250_NR_UARTS=1
++CONFIG_SERIAL_8250_RUNTIME_UARTS=0
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++CONFIG_SERIAL_8250_BCM2835AUX=y
++CONFIG_SERIAL_OF_PLATFORM=y
++CONFIG_SERIAL_AMBA_PL011=y
++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
++CONFIG_SERIAL_SC16IS7XX=m
++CONFIG_SERIAL_SC16IS7XX_SPI=y
++CONFIG_SERIAL_DEV_BUS=m
++CONFIG_TTY_PRINTK=y
++CONFIG_HW_RANDOM=y
++CONFIG_RAW_DRIVER=y
++CONFIG_I2C=y
++CONFIG_I2C_CHARDEV=m
++CONFIG_I2C_MUX_GPMUX=m
++CONFIG_I2C_MUX_PCA954x=m
++CONFIG_I2C_BCM2708=m
++CONFIG_I2C_BCM2835=m
++CONFIG_I2C_GPIO=m
++CONFIG_I2C_ROBOTFUZZ_OSIF=m
++CONFIG_I2C_TINY_USB=m
++CONFIG_SPI=y
++CONFIG_SPI_BCM2835=m
++CONFIG_SPI_BCM2835AUX=m
++CONFIG_SPI_SPIDEV=m
++CONFIG_SPI_SLAVE=y
++CONFIG_PPS=m
++CONFIG_PPS_CLIENT_LDISC=m
++CONFIG_PPS_CLIENT_GPIO=m
++CONFIG_PINCTRL_MCP23S08=m
++CONFIG_GPIO_MOCKUP=m
++CONFIG_GPIO_PCF857X=m
++CONFIG_GPIO_ARIZONA=m
++CONFIG_GPIO_STMPE=y
++CONFIG_W1=m
++CONFIG_W1_MASTER_DS2490=m
++CONFIG_W1_MASTER_DS2482=m
++CONFIG_W1_MASTER_DS1WM=m
++CONFIG_W1_MASTER_GPIO=m
++CONFIG_W1_SLAVE_THERM=m
++CONFIG_W1_SLAVE_SMEM=m
++CONFIG_W1_SLAVE_DS2408=m
++CONFIG_W1_SLAVE_DS2413=m
++CONFIG_W1_SLAVE_DS2406=m
++CONFIG_W1_SLAVE_DS2423=m
++CONFIG_W1_SLAVE_DS2431=m
++CONFIG_W1_SLAVE_DS2433=m
++CONFIG_W1_SLAVE_DS2438=m
++CONFIG_W1_SLAVE_DS2760=m
++CONFIG_W1_SLAVE_DS2780=m
++CONFIG_W1_SLAVE_DS2781=m
++CONFIG_W1_SLAVE_DS28E04=m
++CONFIG_POWER_RESET=y
++CONFIG_POWER_RESET_GPIO=y
++CONFIG_BATTERY_DS2760=m
++CONFIG_BATTERY_GAUGE_LTC2941=m
++CONFIG_HWMON=m
++CONFIG_SENSORS_DS1621=m
++CONFIG_SENSORS_JC42=m
++CONFIG_SENSORS_LM75=m
++CONFIG_SENSORS_SHT21=m
++CONFIG_SENSORS_SHT3x=m
++CONFIG_SENSORS_SHTC1=m
++CONFIG_SENSORS_ADS1015=m
++CONFIG_SENSORS_INA2XX=m
++CONFIG_SENSORS_TMP102=m
++CONFIG_THERMAL=y
++CONFIG_BCM2835_THERMAL=y
++CONFIG_WATCHDOG=y
++CONFIG_GPIO_WATCHDOG=m
++CONFIG_BCM2835_WDT=y
++CONFIG_MFD_STMPE=y
++CONFIG_STMPE_SPI=y
++CONFIG_MFD_ARIZONA_I2C=m
++CONFIG_MFD_ARIZONA_SPI=m
++CONFIG_MFD_WM5102=y
++CONFIG_REGULATOR=y
++CONFIG_REGULATOR_FIXED_VOLTAGE=m
++CONFIG_REGULATOR_ARIZONA_LDO1=m
++CONFIG_REGULATOR_ARIZONA_MICSUPP=m
++CONFIG_LIRC=m
++CONFIG_RC_DEVICES=y
++CONFIG_RC_ATI_REMOTE=m
++CONFIG_IR_IMON=m
++CONFIG_IR_MCEUSB=m
++CONFIG_IR_REDRAT3=m
++CONFIG_IR_STREAMZAP=m
++CONFIG_IR_IGUANA=m
++CONFIG_IR_TTUSBIR=m
++CONFIG_RC_LOOPBACK=m
++CONFIG_IR_GPIO_CIR=m
++CONFIG_IR_GPIO_TX=m
++CONFIG_IR_PWM_TX=m
++CONFIG_MEDIA_SUPPORT=m
++CONFIG_MEDIA_CAMERA_SUPPORT=y
++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
++CONFIG_MEDIA_RADIO_SUPPORT=y
++CONFIG_MEDIA_CONTROLLER=y
++CONFIG_MEDIA_USB_SUPPORT=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_USB_M5602=m
++CONFIG_USB_STV06XX=m
++CONFIG_USB_GL860=m
++CONFIG_USB_GSPCA_BENQ=m
++CONFIG_USB_GSPCA_CONEX=m
++CONFIG_USB_GSPCA_CPIA1=m
++CONFIG_USB_GSPCA_DTCS033=m
++CONFIG_USB_GSPCA_ETOMS=m
++CONFIG_USB_GSPCA_FINEPIX=m
++CONFIG_USB_GSPCA_JEILINJ=m
++CONFIG_USB_GSPCA_JL2005BCD=m
++CONFIG_USB_GSPCA_KINECT=m
++CONFIG_USB_GSPCA_KONICA=m
++CONFIG_USB_GSPCA_MARS=m
++CONFIG_USB_GSPCA_MR97310A=m
++CONFIG_USB_GSPCA_NW80X=m
++CONFIG_USB_GSPCA_OV519=m
++CONFIG_USB_GSPCA_OV534=m
++CONFIG_USB_GSPCA_OV534_9=m
++CONFIG_USB_GSPCA_PAC207=m
++CONFIG_USB_GSPCA_PAC7302=m
++CONFIG_USB_GSPCA_PAC7311=m
++CONFIG_USB_GSPCA_SE401=m
++CONFIG_USB_GSPCA_SN9C2028=m
++CONFIG_USB_GSPCA_SN9C20X=m
++CONFIG_USB_GSPCA_SONIXB=m
++CONFIG_USB_GSPCA_SONIXJ=m
++CONFIG_USB_GSPCA_SPCA500=m
++CONFIG_USB_GSPCA_SPCA501=m
++CONFIG_USB_GSPCA_SPCA505=m
++CONFIG_USB_GSPCA_SPCA506=m
++CONFIG_USB_GSPCA_SPCA508=m
++CONFIG_USB_GSPCA_SPCA561=m
++CONFIG_USB_GSPCA_SPCA1528=m
++CONFIG_USB_GSPCA_SQ905=m
++CONFIG_USB_GSPCA_SQ905C=m
++CONFIG_USB_GSPCA_SQ930X=m
++CONFIG_USB_GSPCA_STK014=m
++CONFIG_USB_GSPCA_STK1135=m
++CONFIG_USB_GSPCA_STV0680=m
++CONFIG_USB_GSPCA_SUNPLUS=m
++CONFIG_USB_GSPCA_T613=m
++CONFIG_USB_GSPCA_TOPRO=m
++CONFIG_USB_GSPCA_TV8532=m
++CONFIG_USB_GSPCA_VC032X=m
++CONFIG_USB_GSPCA_VICAM=m
++CONFIG_USB_GSPCA_XIRLINK_CIT=m
++CONFIG_USB_GSPCA_ZC3XX=m
++CONFIG_USB_PWC=m
++CONFIG_VIDEO_CPIA2=m
++CONFIG_USB_ZR364XX=m
++CONFIG_USB_STKWEBCAM=m
++CONFIG_USB_S2255=m
++CONFIG_VIDEO_USBTV=m
++CONFIG_VIDEO_PVRUSB2=m
++CONFIG_VIDEO_HDPVR=m
++CONFIG_VIDEO_USBVISION=m
++CONFIG_VIDEO_STK1160_COMMON=m
++CONFIG_VIDEO_GO7007=m
++CONFIG_VIDEO_GO7007_USB=m
++CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
++CONFIG_VIDEO_AU0828=m
++CONFIG_VIDEO_AU0828_RC=y
++CONFIG_VIDEO_CX231XX=m
++CONFIG_VIDEO_CX231XX_ALSA=m
++CONFIG_VIDEO_CX231XX_DVB=m
++CONFIG_VIDEO_TM6000=m
++CONFIG_VIDEO_TM6000_ALSA=m
++CONFIG_VIDEO_TM6000_DVB=m
++CONFIG_DVB_USB=m
++CONFIG_DVB_USB_A800=m
++CONFIG_DVB_USB_DIBUSB_MB=m
++CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
++CONFIG_DVB_USB_DIBUSB_MC=m
++CONFIG_DVB_USB_DIB0700=m
++CONFIG_DVB_USB_UMT_010=m
++CONFIG_DVB_USB_CXUSB=m
++CONFIG_DVB_USB_M920X=m
++CONFIG_DVB_USB_DIGITV=m
++CONFIG_DVB_USB_VP7045=m
++CONFIG_DVB_USB_VP702X=m
++CONFIG_DVB_USB_GP8PSK=m
++CONFIG_DVB_USB_NOVA_T_USB2=m
++CONFIG_DVB_USB_TTUSB2=m
++CONFIG_DVB_USB_DTT200U=m
++CONFIG_DVB_USB_OPERA1=m
++CONFIG_DVB_USB_AF9005=m
++CONFIG_DVB_USB_AF9005_REMOTE=m
++CONFIG_DVB_USB_PCTV452E=m
++CONFIG_DVB_USB_DW2102=m
++CONFIG_DVB_USB_CINERGY_T2=m
++CONFIG_DVB_USB_DTV5100=m
++CONFIG_DVB_USB_FRIIO=m
++CONFIG_DVB_USB_AZ6027=m
++CONFIG_DVB_USB_TECHNISAT_USB2=m
++CONFIG_DVB_USB_V2=m
++CONFIG_DVB_USB_AF9015=m
++CONFIG_DVB_USB_AF9035=m
++CONFIG_DVB_USB_ANYSEE=m
++CONFIG_DVB_USB_AU6610=m
++CONFIG_DVB_USB_AZ6007=m
++CONFIG_DVB_USB_CE6230=m
++CONFIG_DVB_USB_EC168=m
++CONFIG_DVB_USB_GL861=m
++CONFIG_DVB_USB_LME2510=m
++CONFIG_DVB_USB_MXL111SF=m
++CONFIG_DVB_USB_RTL28XXU=m
++CONFIG_DVB_USB_DVBSKY=m
++CONFIG_SMS_USB_DRV=m
++CONFIG_DVB_B2C2_FLEXCOP_USB=m
++CONFIG_DVB_AS102=m
++CONFIG_VIDEO_EM28XX=m
++CONFIG_VIDEO_EM28XX_V4L2=m
++CONFIG_VIDEO_EM28XX_ALSA=m
++CONFIG_VIDEO_EM28XX_DVB=m
++CONFIG_V4L_PLATFORM_DRIVERS=y
++CONFIG_RADIO_SI470X=y
++CONFIG_USB_SI470X=m
++CONFIG_I2C_SI470X=m
++CONFIG_RADIO_SI4713=m
++CONFIG_I2C_SI4713=m
++CONFIG_USB_MR800=m
++CONFIG_USB_DSBR=m
++CONFIG_RADIO_SHARK=m
++CONFIG_RADIO_SHARK2=m
++CONFIG_USB_KEENE=m
++CONFIG_USB_MA901=m
++CONFIG_RADIO_TEA5764=m
++CONFIG_RADIO_SAA7706H=m
++CONFIG_RADIO_TEF6862=m
++CONFIG_RADIO_WL1273=m
++CONFIG_RADIO_WL128X=m
++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
++CONFIG_VIDEO_UDA1342=m
++CONFIG_VIDEO_SONY_BTF_MPX=m
++CONFIG_VIDEO_TVP5150=m
++CONFIG_VIDEO_TW2804=m
++CONFIG_VIDEO_TW9903=m
++CONFIG_VIDEO_TW9906=m
++CONFIG_VIDEO_OV7640=m
++CONFIG_VIDEO_MT9V011=m
++CONFIG_DRM=m
++CONFIG_DRM_LOAD_EDID_FIRMWARE=y
++CONFIG_DRM_UDL=m
++CONFIG_DRM_PANEL_SIMPLE=m
++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
++CONFIG_DRM_VC4=m
++CONFIG_DRM_TINYDRM=m
++CONFIG_TINYDRM_MI0283QT=m
++CONFIG_TINYDRM_REPAPER=m
++CONFIG_FB=y
++CONFIG_FB_BCM2708=y
++CONFIG_FB_UDL=m
++CONFIG_FB_SSD1307=m
++CONFIG_FB_RPISENSE=m
++# CONFIG_BACKLIGHT_GENERIC is not set
++CONFIG_BACKLIGHT_RPI=m
++CONFIG_BACKLIGHT_GPIO=m
++CONFIG_FRAMEBUFFER_CONSOLE=y
++CONFIG_LOGO=y
++# CONFIG_LOGO_LINUX_MONO is not set
++# CONFIG_LOGO_LINUX_VGA16 is not set
++CONFIG_SOUND=y
++CONFIG_SND=m
++CONFIG_SND_HRTIMER=m
++CONFIG_SND_SEQUENCER=m
++CONFIG_SND_SEQ_DUMMY=m
++CONFIG_SND_DUMMY=m
++CONFIG_SND_ALOOP=m
++CONFIG_SND_VIRMIDI=m
++CONFIG_SND_MTPAV=m
++CONFIG_SND_SERIAL_U16550=m
++CONFIG_SND_MPU401=m
++CONFIG_SND_USB_AUDIO=m
++CONFIG_SND_USB_UA101=m
++CONFIG_SND_USB_CAIAQ=m
++CONFIG_SND_USB_CAIAQ_INPUT=y
++CONFIG_SND_USB_6FIRE=m
++CONFIG_SND_USB_HIFACE=m
++CONFIG_SND_SOC=m
++CONFIG_SND_BCM2835_SOC_I2S=m
++CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
++CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m
++CONFIG_SND_BCM2708_SOC_RPI_DAC=m
++CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
++CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
++CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m
++CONFIG_SND_DIGIDAC1_SOUNDCARD=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m
++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=m
++CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=m
++CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m
++CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m
++CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m
++CONFIG_SND_PISOUND=m
++CONFIG_SND_SOC_ADAU1701=m
++CONFIG_SND_SOC_ADAU7002=m
++CONFIG_SND_SOC_AK4554=m
++CONFIG_SND_SOC_CS4271_I2C=m
++CONFIG_SND_SOC_SPDIF=m
++CONFIG_SND_SOC_WM8804_I2C=m
++CONFIG_SND_SIMPLE_CARD=m
++CONFIG_HID_BATTERY_STRENGTH=y
++CONFIG_HIDRAW=y
++CONFIG_UHID=m
++CONFIG_HID_A4TECH=m
++CONFIG_HID_ACRUX=m
++CONFIG_HID_APPLE=m
++CONFIG_HID_ASUS=m
++CONFIG_HID_BELKIN=m
++CONFIG_HID_BETOP_FF=m
++CONFIG_HID_CHERRY=m
++CONFIG_HID_CHICONY=m
++CONFIG_HID_CYPRESS=m
++CONFIG_HID_DRAGONRISE=m
++CONFIG_HID_EMS_FF=m
++CONFIG_HID_ELECOM=m
++CONFIG_HID_ELO=m
++CONFIG_HID_EZKEY=m
++CONFIG_HID_GEMBIRD=m
++CONFIG_HID_HOLTEK=m
++CONFIG_HID_KEYTOUCH=m
++CONFIG_HID_KYE=m
++CONFIG_HID_UCLOGIC=m
++CONFIG_HID_WALTOP=m
++CONFIG_HID_GYRATION=m
++CONFIG_HID_TWINHAN=m
++CONFIG_HID_KENSINGTON=m
++CONFIG_HID_LCPOWER=m
++CONFIG_HID_LOGITECH=m
++CONFIG_HID_LOGITECH_DJ=m
++CONFIG_LOGITECH_FF=y
++CONFIG_LOGIRUMBLEPAD2_FF=y
++CONFIG_LOGIG940_FF=y
++CONFIG_HID_MAGICMOUSE=m
++CONFIG_HID_MICROSOFT=m
++CONFIG_HID_MONTEREY=m
++CONFIG_HID_MULTITOUCH=m
++CONFIG_HID_NTRIG=m
++CONFIG_HID_ORTEK=m
++CONFIG_HID_PANTHERLORD=m
++CONFIG_HID_PETALYNX=m
++CONFIG_HID_PICOLCD=m
++CONFIG_HID_ROCCAT=m
++CONFIG_HID_SAMSUNG=m
++CONFIG_HID_SONY=m
++CONFIG_SONY_FF=y
++CONFIG_HID_SPEEDLINK=m
++CONFIG_HID_SUNPLUS=m
++CONFIG_HID_GREENASIA=m
++CONFIG_HID_SMARTJOYPLUS=m
++CONFIG_HID_TOPSEED=m
++CONFIG_HID_THINGM=m
++CONFIG_HID_THRUSTMASTER=m
++CONFIG_HID_WACOM=m
++CONFIG_HID_WIIMOTE=m
++CONFIG_HID_XINMO=m
++CONFIG_HID_ZEROPLUS=m
++CONFIG_HID_ZYDACRON=m
++CONFIG_HID_PID=y
++CONFIG_USB_HIDDEV=y
++CONFIG_USB=y
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++CONFIG_USB_MON=m
++CONFIG_USB_DWCOTG=y
++CONFIG_USB_PRINTER=m
++CONFIG_USB_STORAGE=y
++CONFIG_USB_STORAGE_REALTEK=m
++CONFIG_USB_STORAGE_DATAFAB=m
++CONFIG_USB_STORAGE_FREECOM=m
++CONFIG_USB_STORAGE_ISD200=m
++CONFIG_USB_STORAGE_USBAT=m
++CONFIG_USB_STORAGE_SDDR09=m
++CONFIG_USB_STORAGE_SDDR55=m
++CONFIG_USB_STORAGE_JUMPSHOT=m
++CONFIG_USB_STORAGE_ALAUDA=m
++CONFIG_USB_STORAGE_ONETOUCH=m
++CONFIG_USB_STORAGE_KARMA=m
++CONFIG_USB_STORAGE_CYPRESS_ATACB=m
++CONFIG_USB_STORAGE_ENE_UB6250=m
++CONFIG_USB_MDC800=m
++CONFIG_USB_MICROTEK=m
++CONFIG_USBIP_CORE=m
++CONFIG_USBIP_VHCI_HCD=m
++CONFIG_USBIP_HOST=m
++CONFIG_USB_DWC2=m
++CONFIG_USB_SERIAL=m
++CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++CONFIG_USB_SERIAL_CH341=m
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP210X=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_F81232=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_IUU=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_METRO=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++CONFIG_USB_SERIAL_OTI6858=m
++CONFIG_USB_SERIAL_QCAUX=m
++CONFIG_USB_SERIAL_QUALCOMM=m
++CONFIG_USB_SERIAL_SPCP8X5=m
++CONFIG_USB_SERIAL_SAFE=m
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_SYMBOL=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++CONFIG_USB_SERIAL_OPTICON=m
++CONFIG_USB_SERIAL_XSENS_MT=m
++CONFIG_USB_SERIAL_WISHBONE=m
++CONFIG_USB_SERIAL_SSU100=m
++CONFIG_USB_SERIAL_QT2=m
++CONFIG_USB_SERIAL_DEBUG=m
++CONFIG_USB_EMI62=m
++CONFIG_USB_EMI26=m
++CONFIG_USB_ADUTUX=m
++CONFIG_USB_SEVSEG=m
++CONFIG_USB_RIO500=m
++CONFIG_USB_LEGOTOWER=m
++CONFIG_USB_LCD=m
++CONFIG_USB_CYPRESS_CY7C63=m
++CONFIG_USB_CYTHERM=m
++CONFIG_USB_IDMOUSE=m
++CONFIG_USB_FTDI_ELAN=m
++CONFIG_USB_APPLEDISPLAY=m
++CONFIG_USB_LD=m
++CONFIG_USB_TRANCEVIBRATOR=m
++CONFIG_USB_IOWARRIOR=m
++CONFIG_USB_TEST=m
++CONFIG_USB_ISIGHTFW=m
++CONFIG_USB_YUREX=m
++CONFIG_USB_ATM=m
++CONFIG_USB_SPEEDTOUCH=m
++CONFIG_USB_CXACRU=m
++CONFIG_USB_UEAGLEATM=m
++CONFIG_USB_XUSBATM=m
++CONFIG_USB_GADGET=m
++CONFIG_USB_ZERO=m
++CONFIG_USB_AUDIO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_MASS_STORAGE=m
++CONFIG_USB_G_SERIAL=m
++CONFIG_USB_MIDI_GADGET=m
++CONFIG_USB_G_PRINTER=m
++CONFIG_USB_CDC_COMPOSITE=m
++CONFIG_USB_G_ACM_MS=m
++CONFIG_USB_G_MULTI=m
++CONFIG_USB_G_HID=m
++CONFIG_USB_G_WEBCAM=m
++CONFIG_MMC=y
++CONFIG_MMC_BLOCK_MINORS=32
++CONFIG_MMC_BCM2835_MMC=y
++CONFIG_MMC_BCM2835_DMA=y
++CONFIG_MMC_BCM2835_SDHOST=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_PLTFM=y
++CONFIG_MMC_SPI=m
++CONFIG_LEDS_CLASS=y
++CONFIG_LEDS_GPIO=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_ONESHOT=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_LEDS_TRIGGER_BACKLIGHT=y
++CONFIG_LEDS_TRIGGER_CPU=y
++CONFIG_LEDS_TRIGGER_GPIO=y
++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
++CONFIG_LEDS_TRIGGER_TRANSIENT=m
++CONFIG_LEDS_TRIGGER_CAMERA=m
++CONFIG_LEDS_TRIGGER_INPUT=y
++CONFIG_LEDS_TRIGGER_PANIC=y
++CONFIG_RTC_CLASS=y
++# CONFIG_RTC_HCTOSYS is not set
++CONFIG_RTC_DRV_ABX80X=m
++CONFIG_RTC_DRV_DS1307=m
++CONFIG_RTC_DRV_DS1374=m
++CONFIG_RTC_DRV_DS1672=m
++CONFIG_RTC_DRV_MAX6900=m
++CONFIG_RTC_DRV_RS5C372=m
++CONFIG_RTC_DRV_ISL1208=m
++CONFIG_RTC_DRV_ISL12022=m
++CONFIG_RTC_DRV_X1205=m
++CONFIG_RTC_DRV_PCF8523=m
++CONFIG_RTC_DRV_PCF8563=m
++CONFIG_RTC_DRV_PCF8583=m
++CONFIG_RTC_DRV_M41T80=m
++CONFIG_RTC_DRV_BQ32K=m
++CONFIG_RTC_DRV_S35390A=m
++CONFIG_RTC_DRV_FM3130=m
++CONFIG_RTC_DRV_RX8581=m
++CONFIG_RTC_DRV_RX8025=m
++CONFIG_RTC_DRV_EM3027=m
++CONFIG_RTC_DRV_M41T93=m
++CONFIG_RTC_DRV_M41T94=m
++CONFIG_RTC_DRV_DS1302=m
++CONFIG_RTC_DRV_DS1305=m
++CONFIG_RTC_DRV_DS1390=m
++CONFIG_RTC_DRV_R9701=m
++CONFIG_RTC_DRV_RX4581=m
++CONFIG_RTC_DRV_RS5C348=m
++CONFIG_RTC_DRV_MAX6902=m
++CONFIG_RTC_DRV_PCF2123=m
++CONFIG_RTC_DRV_DS3232=m
++CONFIG_RTC_DRV_PCF2127=m
++CONFIG_RTC_DRV_RV3029C2=m
++CONFIG_DMADEVICES=y
++CONFIG_DMA_BCM2835=y
++CONFIG_DMA_BCM2708=y
++CONFIG_UIO=m
++CONFIG_UIO_PDRV_GENIRQ=m
++CONFIG_STAGING=y
++CONFIG_IRDA=m
++CONFIG_IRLAN=m
++CONFIG_IRNET=m
++CONFIG_IRCOMM=m
++CONFIG_IRDA_ULTRA=y
++CONFIG_IRDA_CACHE_LAST_LSAP=y
++CONFIG_IRDA_FAST_RR=y
++CONFIG_IRTTY_SIR=m
++CONFIG_KINGSUN_DONGLE=m
++CONFIG_KSDAZZLE_DONGLE=m
++CONFIG_KS959_DONGLE=m
++CONFIG_USB_IRDA=m
++CONFIG_SIGMATEL_FIR=m
++CONFIG_MCS_FIR=m
++CONFIG_PRISM2_USB=m
++CONFIG_R8712U=m
++CONFIG_R8188EU=m
++CONFIG_VT6656=m
++CONFIG_SPEAKUP=m
++CONFIG_SPEAKUP_SYNTH_SOFT=m
++CONFIG_STAGING_MEDIA=y
++CONFIG_LIRC_STAGING=y
++CONFIG_LIRC_RPI=m
++CONFIG_FB_TFT=m
++CONFIG_FB_TFT_AGM1264K_FL=m
++CONFIG_FB_TFT_BD663474=m
++CONFIG_FB_TFT_HX8340BN=m
++CONFIG_FB_TFT_HX8347D=m
++CONFIG_FB_TFT_HX8353D=m
++CONFIG_FB_TFT_HX8357D=m
++CONFIG_FB_TFT_ILI9163=m
++CONFIG_FB_TFT_ILI9320=m
++CONFIG_FB_TFT_ILI9325=m
++CONFIG_FB_TFT_ILI9340=m
++CONFIG_FB_TFT_ILI9341=m
++CONFIG_FB_TFT_ILI9481=m
++CONFIG_FB_TFT_ILI9486=m
++CONFIG_FB_TFT_PCD8544=m
++CONFIG_FB_TFT_RA8875=m
++CONFIG_FB_TFT_S6D02A1=m
++CONFIG_FB_TFT_S6D1121=m
++CONFIG_FB_TFT_SSD1289=m
++CONFIG_FB_TFT_SSD1306=m
++CONFIG_FB_TFT_SSD1331=m
++CONFIG_FB_TFT_SSD1351=m
++CONFIG_FB_TFT_ST7735R=m
++CONFIG_FB_TFT_ST7789V=m
++CONFIG_FB_TFT_TINYLCD=m
++CONFIG_FB_TFT_TLS8204=m
++CONFIG_FB_TFT_UC1701=m
++CONFIG_FB_TFT_UPD161704=m
++CONFIG_FB_TFT_WATTEROTT=m
++CONFIG_FB_FLEX=m
++CONFIG_FB_TFT_FBTFT_DEVICE=m
++CONFIG_BCM2835_VCHIQ=y
++CONFIG_BCM2835_VCHIQ_SUPPORT_MEMDUMP=y
++CONFIG_SND_BCM2835=m
++CONFIG_VIDEO_BCM2835=m
++CONFIG_MAILBOX=y
++CONFIG_BCM2835_MBOX=y
++# CONFIG_IOMMU_SUPPORT is not set
++CONFIG_RASPBERRYPI_POWER=y
++CONFIG_EXTCON=m
++CONFIG_EXTCON_ARIZONA=m
++CONFIG_IIO=m
++CONFIG_IIO_BUFFER_CB=m
++CONFIG_MCP320X=m
++CONFIG_MCP3422=m
++CONFIG_DHT11=m
++CONFIG_HDC100X=m
++CONFIG_HTU21=m
++CONFIG_INV_MPU6050_I2C=m
++CONFIG_TSL4531=m
++CONFIG_VEML6070=m
++CONFIG_BMP280=m
++CONFIG_PWM_BCM2835=m
++CONFIG_PWM_PCA9685=m
++CONFIG_RPI_AXIPERF=m
++CONFIG_RASPBERRYPI_FIRMWARE=y
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_POSIX_ACL=y
++CONFIG_EXT4_FS_SECURITY=y
++CONFIG_REISERFS_FS=m
++CONFIG_REISERFS_FS_XATTR=y
++CONFIG_REISERFS_FS_POSIX_ACL=y
++CONFIG_REISERFS_FS_SECURITY=y
++CONFIG_JFS_FS=m
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++CONFIG_JFS_STATISTICS=y
++CONFIG_XFS_FS=m
++CONFIG_XFS_QUOTA=y
++CONFIG_XFS_POSIX_ACL=y
++CONFIG_XFS_RT=y
++CONFIG_GFS2_FS=m
++CONFIG_OCFS2_FS=m
++CONFIG_BTRFS_FS=m
++CONFIG_BTRFS_FS_POSIX_ACL=y
++CONFIG_NILFS2_FS=m
++CONFIG_F2FS_FS=y
++CONFIG_FANOTIFY=y
++CONFIG_QFMT_V1=m
++CONFIG_QFMT_V2=m
++CONFIG_AUTOFS4_FS=y
++CONFIG_FUSE_FS=m
++CONFIG_CUSE=m
++CONFIG_OVERLAY_FS=m
++CONFIG_FSCACHE=y
++CONFIG_FSCACHE_STATS=y
++CONFIG_FSCACHE_HISTOGRAM=y
++CONFIG_CACHEFILES=y
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++CONFIG_UDF_FS=m
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
++CONFIG_NTFS_FS=m
++CONFIG_NTFS_RW=y
++CONFIG_TMPFS=y
++CONFIG_TMPFS_POSIX_ACL=y
++CONFIG_ECRYPT_FS=m
++CONFIG_HFS_FS=m
++CONFIG_HFSPLUS_FS=m
++CONFIG_JFFS2_FS=m
++CONFIG_JFFS2_SUMMARY=y
++CONFIG_UBIFS_FS=m
++CONFIG_SQUASHFS=m
++CONFIG_SQUASHFS_XATTR=y
++CONFIG_SQUASHFS_LZO=y
++CONFIG_SQUASHFS_XZ=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_NFS_SWAP=y
++CONFIG_NFS_V4_1=y
++CONFIG_ROOT_NFS=y
++CONFIG_NFS_FSCACHE=y
++CONFIG_NFSD=m
++CONFIG_NFSD_V3_ACL=y
++CONFIG_NFSD_V4=y
++CONFIG_CIFS=m
++CONFIG_CIFS_WEAK_PW_HASH=y
++CONFIG_CIFS_UPCALL=y
++CONFIG_CIFS_XATTR=y
++CONFIG_CIFS_POSIX=y
++CONFIG_CIFS_ACL=y
++CONFIG_CIFS_DFS_UPCALL=y
++CONFIG_CIFS_FSCACHE=y
++CONFIG_9P_FS=m
++CONFIG_9P_FS_POSIX_ACL=y
++CONFIG_NLS_DEFAULT="utf8"
++CONFIG_NLS_CODEPAGE_437=y
++CONFIG_NLS_CODEPAGE_737=m
++CONFIG_NLS_CODEPAGE_775=m
++CONFIG_NLS_CODEPAGE_850=m
++CONFIG_NLS_CODEPAGE_852=m
++CONFIG_NLS_CODEPAGE_855=m
++CONFIG_NLS_CODEPAGE_857=m
++CONFIG_NLS_CODEPAGE_860=m
++CONFIG_NLS_CODEPAGE_861=m
++CONFIG_NLS_CODEPAGE_862=m
++CONFIG_NLS_CODEPAGE_863=m
++CONFIG_NLS_CODEPAGE_864=m
++CONFIG_NLS_CODEPAGE_865=m
++CONFIG_NLS_CODEPAGE_866=m
++CONFIG_NLS_CODEPAGE_869=m
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++CONFIG_NLS_CODEPAGE_932=m
++CONFIG_NLS_CODEPAGE_949=m
++CONFIG_NLS_CODEPAGE_874=m
++CONFIG_NLS_ISO8859_8=m
++CONFIG_NLS_CODEPAGE_1250=m
++CONFIG_NLS_CODEPAGE_1251=m
++CONFIG_NLS_ASCII=y
++CONFIG_NLS_ISO8859_1=m
++CONFIG_NLS_ISO8859_2=m
++CONFIG_NLS_ISO8859_3=m
++CONFIG_NLS_ISO8859_4=m
++CONFIG_NLS_ISO8859_5=m
++CONFIG_NLS_ISO8859_6=m
++CONFIG_NLS_ISO8859_7=m
++CONFIG_NLS_ISO8859_9=m
++CONFIG_NLS_ISO8859_13=m
++CONFIG_NLS_ISO8859_14=m
++CONFIG_NLS_ISO8859_15=m
++CONFIG_NLS_KOI8_R=m
++CONFIG_NLS_KOI8_U=m
++CONFIG_DLM=m
++CONFIG_PRINTK_TIME=y
++CONFIG_BOOT_PRINTK_DELAY=y
++CONFIG_DEBUG_MEMORY_INIT=y
++CONFIG_DETECT_HUNG_TASK=y
++CONFIG_LATENCYTOP=y
++CONFIG_IRQSOFF_TRACER=y
++CONFIG_SCHED_TRACER=y
++CONFIG_STACK_TRACER=y
++CONFIG_BLK_DEV_IO_TRACE=y
++# CONFIG_UPROBE_EVENTS is not set
++CONFIG_FUNCTION_PROFILER=y
++CONFIG_KGDB=y
++CONFIG_KGDB_KDB=y
++CONFIG_KDB_KEYBOARD=y
++CONFIG_CRYPTO_USER=m
++CONFIG_CRYPTO_CRYPTD=m
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_CTS=m
++CONFIG_CRYPTO_XTS=m
++CONFIG_CRYPTO_XCBC=m
++CONFIG_CRYPTO_SHA512=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_WP512=m
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_DES=y
++CONFIG_CRYPTO_LZ4=m
++CONFIG_CRYPTO_USER_API_SKCIPHER=m
++# CONFIG_CRYPTO_HW is not set
++CONFIG_ARM_CRYPTO=y
++CONFIG_CRYPTO_SHA1_ARM=m
++CONFIG_CRYPTO_AES_ARM=m
++CONFIG_CRC_ITU_T=y
++CONFIG_LIBCRC32C=y
+--- /dev/null
++++ b/arch/arm64/configs/bcmrpi3_defconfig
+@@ -0,0 +1,1277 @@
++CONFIG_LOCALVERSION="-v8"
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SYSVIPC=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++CONFIG_TASK_XACCT=y
++CONFIG_TASK_IO_ACCOUNTING=y
++CONFIG_IKCONFIG=m
++CONFIG_IKCONFIG_PROC=y
++CONFIG_MEMCG=y
++CONFIG_BLK_CGROUP=y
++CONFIG_CGROUP_FREEZER=y
++CONFIG_CPUSETS=y
++CONFIG_CGROUP_DEVICE=y
++CONFIG_CGROUP_CPUACCT=y
++CONFIG_NAMESPACES=y
++CONFIG_USER_NS=y
++CONFIG_SCHED_AUTOGROUP=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_EMBEDDED=y
++# CONFIG_COMPAT_BRK is not set
++CONFIG_PROFILING=y
++CONFIG_KPROBES=y
++CONFIG_JUMP_LABEL=y
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SRCVERSION_ALL=y
++CONFIG_BLK_DEV_THROTTLING=y
++CONFIG_PARTITION_ADVANCED=y
++CONFIG_MAC_PARTITION=y
++CONFIG_CFQ_GROUP_IOSCHED=y
++CONFIG_ARCH_BCM2835=y
++# CONFIG_CAVIUM_ERRATUM_22375 is not set
++# CONFIG_CAVIUM_ERRATUM_23154 is not set
++# CONFIG_CAVIUM_ERRATUM_27456 is not set
++CONFIG_SCHED_MC=y
++CONFIG_NR_CPUS=4
++CONFIG_PREEMPT=y
++CONFIG_HZ_1000=y
++CONFIG_CLEANCACHE=y
++CONFIG_FRONTSWAP=y
++CONFIG_CMA=y
++CONFIG_ZSMALLOC=m
++CONFIG_PGTABLE_MAPPING=y
++CONFIG_SECCOMP=y
++CONFIG_ARMV8_DEPRECATED=y
++CONFIG_SWP_EMULATION=y
++CONFIG_CP15_BARRIER_EMULATION=y
++CONFIG_SETEND_EMULATION=y
++CONFIG_RANDOMIZE_BASE=y
++CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait"
++CONFIG_BINFMT_MISC=y
++CONFIG_COMPAT=y
++# CONFIG_SUSPEND is not set
++CONFIG_PM=y
++CONFIG_CPU_IDLE=y
++CONFIG_ARM_CPUIDLE=y
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_STAT=y
++CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
++CONFIG_NET=y
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM_USER=y
++CONFIG_NET_KEY=m
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_MULTIPATH=y
++CONFIG_IP_ROUTE_VERBOSE=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_RARP=y
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE_DEMUX=m
++CONFIG_NET_IPGRE=m
++CONFIG_IP_MROUTE=y
++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
++CONFIG_IP_PIMSM_V1=y
++CONFIG_IP_PIMSM_V2=y
++CONFIG_SYN_COOKIES=y
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
++CONFIG_INET_IPCOMP=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++CONFIG_INET_DIAG=m
++CONFIG_IPV6=m
++CONFIG_IPV6_ROUTER_PREF=y
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++CONFIG_IPV6_TUNNEL=m
++CONFIG_IPV6_MULTIPLE_TABLES=y
++CONFIG_IPV6_SUBTREES=y
++CONFIG_IPV6_MROUTE=y
++CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
++CONFIG_IPV6_PIMSM_V2=y
++CONFIG_NETFILTER=y
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CONNTRACK_ZONES=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CONNTRACK_TIMESTAMP=y
++CONFIG_NF_CONNTRACK_AMANDA=m
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_SNMP=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_XT_SET=m
++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_HMARK=m
++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
++CONFIG_NETFILTER_XT_TARGET_LED=m
++CONFIG_NETFILTER_XT_TARGET_LOG=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
++CONFIG_NETFILTER_XT_TARGET_TEE=m
++CONFIG_NETFILTER_XT_TARGET_TPROXY=m
++CONFIG_NETFILTER_XT_TARGET_TRACE=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m
++CONFIG_NETFILTER_XT_MATCH_BPF=m
++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m
++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_CPU=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
++CONFIG_NETFILTER_XT_MATCH_IPVS=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_NFACCT=m
++CONFIG_NETFILTER_XT_MATCH_OSF=m
++CONFIG_NETFILTER_XT_MATCH_OWNER=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_RATEEST=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_RECENT=m
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++CONFIG_NETFILTER_XT_MATCH_TIME=m
++CONFIG_NETFILTER_XT_MATCH_U32=m
++CONFIG_IP_SET=m
++CONFIG_IP_SET_BITMAP_IP=m
++CONFIG_IP_SET_BITMAP_IPMAC=m
++CONFIG_IP_SET_BITMAP_PORT=m
++CONFIG_IP_SET_HASH_IP=m
++CONFIG_IP_SET_HASH_IPPORT=m
++CONFIG_IP_SET_HASH_IPPORTIP=m
++CONFIG_IP_SET_HASH_IPPORTNET=m
++CONFIG_IP_SET_HASH_NET=m
++CONFIG_IP_SET_HASH_NETPORT=m
++CONFIG_IP_SET_HASH_NETIFACE=m
++CONFIG_IP_SET_LIST_SET=m
++CONFIG_IP_VS=m
++CONFIG_IP_VS_PROTO_TCP=y
++CONFIG_IP_VS_PROTO_UDP=y
++CONFIG_IP_VS_PROTO_ESP=y
++CONFIG_IP_VS_PROTO_AH=y
++CONFIG_IP_VS_PROTO_SCTP=y
++CONFIG_IP_VS_RR=m
++CONFIG_IP_VS_WRR=m
++CONFIG_IP_VS_LC=m
++CONFIG_IP_VS_WLC=m
++CONFIG_IP_VS_LBLC=m
++CONFIG_IP_VS_LBLCR=m
++CONFIG_IP_VS_DH=m
++CONFIG_IP_VS_SH=m
++CONFIG_IP_VS_SED=m
++CONFIG_IP_VS_NQ=m
++CONFIG_IP_VS_FTP=m
++CONFIG_IP_VS_PE_SIP=m
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_RPFILTER=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_NAT=m
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_RAW=m
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++CONFIG_NF_CONNTRACK_IPV6=m
++CONFIG_IP6_NF_IPTABLES=m
++CONFIG_IP6_NF_MATCH_AH=m
++CONFIG_IP6_NF_MATCH_EUI64=m
++CONFIG_IP6_NF_MATCH_FRAG=m
++CONFIG_IP6_NF_MATCH_OPTS=m
++CONFIG_IP6_NF_MATCH_HL=m
++CONFIG_IP6_NF_MATCH_IPV6HEADER=m
++CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_RPFILTER=m
++CONFIG_IP6_NF_MATCH_RT=m
++CONFIG_IP6_NF_TARGET_HL=m
++CONFIG_IP6_NF_FILTER=m
++CONFIG_IP6_NF_TARGET_REJECT=m
++CONFIG_IP6_NF_MANGLE=m
++CONFIG_IP6_NF_RAW=m
++CONFIG_IP6_NF_NAT=m
++CONFIG_IP6_NF_TARGET_MASQUERADE=m
++CONFIG_IP6_NF_TARGET_NPT=m
++CONFIG_BRIDGE_NF_EBTABLES=m
++CONFIG_BRIDGE_EBT_BROUTE=m
++CONFIG_BRIDGE_EBT_T_FILTER=m
++CONFIG_BRIDGE_EBT_T_NAT=m
++CONFIG_BRIDGE_EBT_802_3=m
++CONFIG_BRIDGE_EBT_AMONG=m
++CONFIG_BRIDGE_EBT_ARP=m
++CONFIG_BRIDGE_EBT_IP=m
++CONFIG_BRIDGE_EBT_IP6=m
++CONFIG_BRIDGE_EBT_LIMIT=m
++CONFIG_BRIDGE_EBT_MARK=m
++CONFIG_BRIDGE_EBT_PKTTYPE=m
++CONFIG_BRIDGE_EBT_STP=m
++CONFIG_BRIDGE_EBT_VLAN=m
++CONFIG_BRIDGE_EBT_ARPREPLY=m
++CONFIG_BRIDGE_EBT_DNAT=m
++CONFIG_BRIDGE_EBT_MARK_T=m
++CONFIG_BRIDGE_EBT_REDIRECT=m
++CONFIG_BRIDGE_EBT_SNAT=m
++CONFIG_BRIDGE_EBT_LOG=m
++CONFIG_BRIDGE_EBT_NFLOG=m
++CONFIG_SCTP_COOKIE_HMAC_SHA1=y
++CONFIG_ATM=m
++CONFIG_L2TP=m
++CONFIG_L2TP_V3=y
++CONFIG_L2TP_IP=m
++CONFIG_L2TP_ETH=m
++CONFIG_BRIDGE=m
++CONFIG_VLAN_8021Q=m
++CONFIG_VLAN_8021Q_GVRP=y
++CONFIG_ATALK=m
++CONFIG_6LOWPAN=m
++CONFIG_IEEE802154=m
++CONFIG_IEEE802154_6LOWPAN=m
++CONFIG_MAC802154=m
++CONFIG_NET_SCHED=y
++CONFIG_NET_SCH_CBQ=m
++CONFIG_NET_SCH_HTB=m
++CONFIG_NET_SCH_HFSC=m
++CONFIG_NET_SCH_PRIO=m
++CONFIG_NET_SCH_MULTIQ=m
++CONFIG_NET_SCH_RED=m
++CONFIG_NET_SCH_SFB=m
++CONFIG_NET_SCH_SFQ=m
++CONFIG_NET_SCH_TEQL=m
++CONFIG_NET_SCH_TBF=m
++CONFIG_NET_SCH_GRED=m
++CONFIG_NET_SCH_DSMARK=m
++CONFIG_NET_SCH_NETEM=m
++CONFIG_NET_SCH_DRR=m
++CONFIG_NET_SCH_MQPRIO=m
++CONFIG_NET_SCH_CHOKE=m
++CONFIG_NET_SCH_QFQ=m
++CONFIG_NET_SCH_CODEL=m
++CONFIG_NET_SCH_FQ_CODEL=m
++CONFIG_NET_SCH_INGRESS=m
++CONFIG_NET_SCH_PLUG=m
++CONFIG_NET_CLS_BASIC=m
++CONFIG_NET_CLS_TCINDEX=m
++CONFIG_NET_CLS_ROUTE4=m
++CONFIG_NET_CLS_FW=m
++CONFIG_NET_CLS_U32=m
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_RSVP=m
++CONFIG_NET_CLS_RSVP6=m
++CONFIG_NET_CLS_FLOW=m
++CONFIG_NET_CLS_CGROUP=m
++CONFIG_NET_EMATCH=y
++CONFIG_NET_EMATCH_CMP=m
++CONFIG_NET_EMATCH_NBYTE=m
++CONFIG_NET_EMATCH_U32=m
++CONFIG_NET_EMATCH_META=m
++CONFIG_NET_EMATCH_TEXT=m
++CONFIG_NET_EMATCH_IPSET=m
++CONFIG_NET_CLS_ACT=y
++CONFIG_NET_ACT_POLICE=m
++CONFIG_NET_ACT_GACT=m
++CONFIG_GACT_PROB=y
++CONFIG_NET_ACT_MIRRED=m
++CONFIG_NET_ACT_IPT=m
++CONFIG_NET_ACT_NAT=m
++CONFIG_NET_ACT_PEDIT=m
++CONFIG_NET_ACT_SIMP=m
++CONFIG_NET_ACT_SKBEDIT=m
++CONFIG_NET_ACT_CSUM=m
++CONFIG_BATMAN_ADV=m
++CONFIG_OPENVSWITCH=m
++CONFIG_NET_PKTGEN=m
++CONFIG_HAMRADIO=y
++CONFIG_AX25=m
++CONFIG_NETROM=m
++CONFIG_ROSE=m
++CONFIG_MKISS=m
++CONFIG_6PACK=m
++CONFIG_BPQETHER=m
++CONFIG_BAYCOM_SER_FDX=m
++CONFIG_BAYCOM_SER_HDX=m
++CONFIG_YAM=m
++CONFIG_CAN=m
++CONFIG_CAN_VCAN=m
++CONFIG_CAN_MCP251X=m
++CONFIG_BT=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++CONFIG_BT_6LOWPAN=m
++CONFIG_BT_HCIBTUSB=m
++CONFIG_BT_HCIUART=m
++CONFIG_BT_HCIUART_3WIRE=y
++CONFIG_BT_HCIUART_BCM=y
++CONFIG_BT_HCIBCM203X=m
++CONFIG_BT_HCIBPA10X=m
++CONFIG_BT_HCIBFUSB=m
++CONFIG_BT_HCIVHCI=m
++CONFIG_BT_MRVL=m
++CONFIG_BT_MRVL_SDIO=m
++CONFIG_BT_ATH3K=m
++CONFIG_BT_WILINK=m
++CONFIG_CFG80211=m
++CONFIG_MAC80211=m
++CONFIG_MAC80211_MESH=y
++CONFIG_WIMAX=m
++CONFIG_RFKILL=m
++CONFIG_RFKILL_INPUT=y
++CONFIG_NET_9P=m
++CONFIG_NFC=m
++CONFIG_DEVTMPFS=y
++CONFIG_DEVTMPFS_MOUNT=y
++CONFIG_DMA_CMA=y
++CONFIG_CMA_SIZE_MBYTES=5
++CONFIG_MTD=m
++CONFIG_MTD_BLOCK=m
++CONFIG_MTD_NAND=m
++CONFIG_MTD_UBI=m
++CONFIG_OF_CONFIGFS=y
++CONFIG_ZRAM=m
++CONFIG_BLK_DEV_LOOP=y
++CONFIG_BLK_DEV_CRYPTOLOOP=m
++CONFIG_BLK_DEV_DRBD=m
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=y
++CONFIG_CDROM_PKTCDVD=m
++CONFIG_ATA_OVER_ETH=m
++CONFIG_EEPROM_AT24=m
++CONFIG_TI_ST=m
++CONFIG_SCSI=y
++# CONFIG_SCSI_PROC_FS is not set
++CONFIG_BLK_DEV_SD=y
++CONFIG_CHR_DEV_ST=m
++CONFIG_CHR_DEV_OSST=m
++CONFIG_BLK_DEV_SR=m
++CONFIG_CHR_DEV_SG=m
++CONFIG_SCSI_ISCSI_ATTRS=y
++CONFIG_ISCSI_TCP=m
++CONFIG_ISCSI_BOOT_SYSFS=m
++CONFIG_MD=y
++CONFIG_MD_LINEAR=m
++CONFIG_BLK_DEV_DM=m
++CONFIG_DM_CRYPT=m
++CONFIG_DM_SNAPSHOT=m
++CONFIG_DM_THIN_PROVISIONING=m
++CONFIG_DM_MIRROR=m
++CONFIG_DM_LOG_USERSPACE=m
++CONFIG_DM_RAID=m
++CONFIG_DM_ZERO=m
++CONFIG_DM_DELAY=m
++CONFIG_NETDEVICES=y
++CONFIG_BONDING=m
++CONFIG_DUMMY=m
++CONFIG_IFB=m
++CONFIG_MACVLAN=m
++CONFIG_VXLAN=m
++CONFIG_NETCONSOLE=m
++CONFIG_TUN=m
++CONFIG_VETH=m
++CONFIG_ENC28J60=m
++CONFIG_QCA7000_SPI=m
++CONFIG_MDIO_BITBANG=m
++CONFIG_PPP=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_MPPE=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPPOATM=m
++CONFIG_PPPOE=m
++CONFIG_PPPOL2TP=m
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_SLIP=m
++CONFIG_SLIP_COMPRESSED=y
++CONFIG_SLIP_SMART=y
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_RTL8152=m
++CONFIG_USB_LAN78XX=y
++CONFIG_USB_USBNET=y
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_AX88179_178A=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_CDC_EEM=m
++CONFIG_USB_NET_CDC_NCM=m
++CONFIG_USB_NET_HUAWEI_CDC_NCM=m
++CONFIG_USB_NET_CDC_MBIM=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_SR9700=m
++CONFIG_USB_NET_SR9800=m
++CONFIG_USB_NET_SMSC75XX=m
++CONFIG_USB_NET_SMSC95XX=y
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_CDC_SUBSET=m
++CONFIG_USB_ALI_M5632=y
++CONFIG_USB_AN2720=y
++CONFIG_USB_EPSON2888=y
++CONFIG_USB_KC2190=y
++CONFIG_USB_NET_ZAURUS=m
++CONFIG_USB_NET_CX82310_ETH=m
++CONFIG_USB_NET_KALMIA=m
++CONFIG_USB_NET_QMI_WWAN=m
++CONFIG_USB_HSO=m
++CONFIG_USB_NET_INT51X1=m
++CONFIG_USB_IPHETH=m
++CONFIG_USB_SIERRA_NET=m
++CONFIG_USB_VL600=m
++CONFIG_ATH9K=m
++CONFIG_ATH9K_HTC=m
++CONFIG_CARL9170=m
++CONFIG_ATH6KL=m
++CONFIG_ATH6KL_USB=m
++CONFIG_AR5523=m
++CONFIG_AT76C50X_USB=m
++CONFIG_B43=m
++# CONFIG_B43_PHY_N is not set
++CONFIG_B43LEGACY=m
++CONFIG_BRCMFMAC=m
++CONFIG_BRCMFMAC_USB=y
++CONFIG_HOSTAP=m
++CONFIG_P54_COMMON=m
++CONFIG_P54_USB=m
++CONFIG_LIBERTAS=m
++CONFIG_LIBERTAS_USB=m
++CONFIG_LIBERTAS_SDIO=m
++CONFIG_LIBERTAS_THINFIRM=m
++CONFIG_LIBERTAS_THINFIRM_USB=m
++CONFIG_MWIFIEX=m
++CONFIG_MWIFIEX_SDIO=m
++CONFIG_MT7601U=m
++CONFIG_RT2X00=m
++CONFIG_RT2500USB=m
++CONFIG_RT73USB=m
++CONFIG_RT2800USB=m
++CONFIG_RT2800USB_RT3573=y
++CONFIG_RT2800USB_RT53XX=y
++CONFIG_RT2800USB_RT55XX=y
++CONFIG_RT2800USB_UNKNOWN=y
++CONFIG_RTL8187=m
++CONFIG_RTL8192CU=m
++CONFIG_USB_ZD1201=m
++CONFIG_ZD1211RW=m
++CONFIG_MAC80211_HWSIM=m
++CONFIG_USB_NET_RNDIS_WLAN=m
++CONFIG_WIMAX_I2400M_USB=m
++CONFIG_IEEE802154_AT86RF230=m
++CONFIG_IEEE802154_MRF24J40=m
++CONFIG_IEEE802154_CC2520=m
++CONFIG_INPUT_POLLDEV=m
++CONFIG_INPUT_JOYDEV=m
++CONFIG_INPUT_EVDEV=m
++# CONFIG_KEYBOARD_ATKBD is not set
++CONFIG_KEYBOARD_GPIO=m
++# CONFIG_INPUT_MOUSE is not set
++CONFIG_INPUT_JOYSTICK=y
++CONFIG_JOYSTICK_IFORCE=m
++CONFIG_JOYSTICK_IFORCE_USB=y
++CONFIG_JOYSTICK_XPAD=m
++CONFIG_JOYSTICK_XPAD_FF=y
++CONFIG_JOYSTICK_XPAD_LEDS=y
++CONFIG_JOYSTICK_RPISENSE=m
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_ADS7846=m
++CONFIG_TOUCHSCREEN_EGALAX=m
++CONFIG_TOUCHSCREEN_EKTF2127=m
++CONFIG_TOUCHSCREEN_RPI_FT5406=m
++CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
++CONFIG_TOUCHSCREEN_STMPE=m
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_AD714X=m
++CONFIG_INPUT_ATI_REMOTE2=m
++CONFIG_INPUT_KEYSPAN_REMOTE=m
++CONFIG_INPUT_POWERMATE=m
++CONFIG_INPUT_YEALINK=m
++CONFIG_INPUT_CM109=m
++CONFIG_INPUT_UINPUT=m
++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
++CONFIG_INPUT_ADXL34X=m
++CONFIG_INPUT_CMA3000=m
++CONFIG_SERIO=m
++CONFIG_SERIO_RAW=m
++CONFIG_GAMEPORT=m
++CONFIG_GAMEPORT_NS558=m
++CONFIG_GAMEPORT_L4=m
++CONFIG_BRCM_CHAR_DRIVERS=y
++CONFIG_BCM_VCIO=y
++CONFIG_BCM2835_DEVGPIOMEM=y
++# CONFIG_BCM2835_SMI_DEV is not set
++# CONFIG_LEGACY_PTYS is not set
++CONFIG_SERIAL_8250=y
++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
++CONFIG_SERIAL_8250_CONSOLE=y
++# CONFIG_SERIAL_8250_DMA is not set
++CONFIG_SERIAL_8250_NR_UARTS=1
++CONFIG_SERIAL_8250_RUNTIME_UARTS=0
++CONFIG_SERIAL_8250_EXTENDED=y
++CONFIG_SERIAL_8250_SHARE_IRQ=y
++CONFIG_SERIAL_8250_BCM2835AUX=y
++CONFIG_SERIAL_OF_PLATFORM=y
++CONFIG_SERIAL_AMBA_PL011=y
++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
++CONFIG_SERIAL_SC16IS7XX=m
++CONFIG_SERIAL_SC16IS7XX_SPI=y
++CONFIG_SERIAL_DEV_BUS=m
++CONFIG_TTY_PRINTK=y
++CONFIG_HW_RANDOM=y
++CONFIG_RAW_DRIVER=y
++CONFIG_I2C=y
++CONFIG_I2C_CHARDEV=m
++CONFIG_I2C_MUX_PCA954x=m
++CONFIG_I2C_BCM2708=m
++CONFIG_I2C_BCM2835=m
++CONFIG_I2C_GPIO=m
++CONFIG_SPI=y
++CONFIG_SPI_BCM2835=m
++CONFIG_SPI_BCM2835AUX=m
++CONFIG_SPI_SPIDEV=y
++CONFIG_PPS=m
++CONFIG_PPS_CLIENT_LDISC=m
++CONFIG_PPS_CLIENT_GPIO=m
++CONFIG_GPIO_SYSFS=y
++CONFIG_GPIO_BCM_EXP=y
++CONFIG_GPIO_BCM_VIRT=y
++CONFIG_GPIO_ARIZONA=m
++CONFIG_GPIO_STMPE=y
++CONFIG_W1=m
++CONFIG_W1_MASTER_DS2490=m
++CONFIG_W1_MASTER_DS2482=m
++CONFIG_W1_MASTER_DS1WM=m
++CONFIG_W1_MASTER_GPIO=m
++CONFIG_W1_SLAVE_THERM=m
++CONFIG_W1_SLAVE_SMEM=m
++CONFIG_W1_SLAVE_DS2408=m
++CONFIG_W1_SLAVE_DS2413=m
++CONFIG_W1_SLAVE_DS2406=m
++CONFIG_W1_SLAVE_DS2423=m
++CONFIG_W1_SLAVE_DS2431=m
++CONFIG_W1_SLAVE_DS2433=m
++CONFIG_W1_SLAVE_DS2760=m
++CONFIG_W1_SLAVE_DS2780=m
++CONFIG_W1_SLAVE_DS2781=m
++CONFIG_W1_SLAVE_DS28E04=m
++CONFIG_POWER_RESET_GPIO=y
++CONFIG_BATTERY_DS2760=m
++CONFIG_HWMON=m
++CONFIG_SENSORS_LM75=m
++CONFIG_SENSORS_SHT21=m
++CONFIG_SENSORS_SHTC1=m
++CONFIG_SENSORS_INA2XX=m
++CONFIG_THERMAL=y
++CONFIG_BCM2835_THERMAL=y
++CONFIG_WATCHDOG=y
++CONFIG_BCM2835_WDT=y
++CONFIG_MFD_STMPE=y
++CONFIG_STMPE_SPI=y
++CONFIG_MFD_ARIZONA_I2C=m
++CONFIG_MFD_ARIZONA_SPI=m
++CONFIG_MFD_WM5102=y
++CONFIG_LIRC=m
++CONFIG_RC_DEVICES=y
++CONFIG_RC_ATI_REMOTE=m
++CONFIG_IR_IMON=m
++CONFIG_IR_MCEUSB=m
++CONFIG_IR_REDRAT3=m
++CONFIG_IR_STREAMZAP=m
++CONFIG_IR_IGUANA=m
++CONFIG_IR_TTUSBIR=m
++CONFIG_RC_LOOPBACK=m
++CONFIG_IR_GPIO_CIR=m
++CONFIG_MEDIA_SUPPORT=m
++CONFIG_MEDIA_CAMERA_SUPPORT=y
++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
++CONFIG_MEDIA_RADIO_SUPPORT=y
++CONFIG_MEDIA_CONTROLLER=y
++CONFIG_MEDIA_USB_SUPPORT=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_USB_M5602=m
++CONFIG_USB_STV06XX=m
++CONFIG_USB_GL860=m
++CONFIG_USB_GSPCA_BENQ=m
++CONFIG_USB_GSPCA_CONEX=m
++CONFIG_USB_GSPCA_CPIA1=m
++CONFIG_USB_GSPCA_DTCS033=m
++CONFIG_USB_GSPCA_ETOMS=m
++CONFIG_USB_GSPCA_FINEPIX=m
++CONFIG_USB_GSPCA_JEILINJ=m
++CONFIG_USB_GSPCA_JL2005BCD=m
++CONFIG_USB_GSPCA_KINECT=m
++CONFIG_USB_GSPCA_KONICA=m
++CONFIG_USB_GSPCA_MARS=m
++CONFIG_USB_GSPCA_MR97310A=m
++CONFIG_USB_GSPCA_NW80X=m
++CONFIG_USB_GSPCA_OV519=m
++CONFIG_USB_GSPCA_OV534=m
++CONFIG_USB_GSPCA_OV534_9=m
++CONFIG_USB_GSPCA_PAC207=m
++CONFIG_USB_GSPCA_PAC7302=m
++CONFIG_USB_GSPCA_PAC7311=m
++CONFIG_USB_GSPCA_SE401=m
++CONFIG_USB_GSPCA_SN9C2028=m
++CONFIG_USB_GSPCA_SN9C20X=m
++CONFIG_USB_GSPCA_SONIXB=m
++CONFIG_USB_GSPCA_SONIXJ=m
++CONFIG_USB_GSPCA_SPCA500=m
++CONFIG_USB_GSPCA_SPCA501=m
++CONFIG_USB_GSPCA_SPCA505=m
++CONFIG_USB_GSPCA_SPCA506=m
++CONFIG_USB_GSPCA_SPCA508=m
++CONFIG_USB_GSPCA_SPCA561=m
++CONFIG_USB_GSPCA_SPCA1528=m
++CONFIG_USB_GSPCA_SQ905=m
++CONFIG_USB_GSPCA_SQ905C=m
++CONFIG_USB_GSPCA_SQ930X=m
++CONFIG_USB_GSPCA_STK014=m
++CONFIG_USB_GSPCA_STK1135=m
++CONFIG_USB_GSPCA_STV0680=m
++CONFIG_USB_GSPCA_SUNPLUS=m
++CONFIG_USB_GSPCA_T613=m
++CONFIG_USB_GSPCA_TOPRO=m
++CONFIG_USB_GSPCA_TV8532=m
++CONFIG_USB_GSPCA_VC032X=m
++CONFIG_USB_GSPCA_VICAM=m
++CONFIG_USB_GSPCA_XIRLINK_CIT=m
++CONFIG_USB_GSPCA_ZC3XX=m
++CONFIG_USB_PWC=m
++CONFIG_VIDEO_CPIA2=m
++CONFIG_USB_ZR364XX=m
++CONFIG_USB_STKWEBCAM=m
++CONFIG_USB_S2255=m
++CONFIG_VIDEO_USBTV=m
++CONFIG_VIDEO_PVRUSB2=m
++CONFIG_VIDEO_HDPVR=m
++CONFIG_VIDEO_USBVISION=m
++CONFIG_VIDEO_STK1160_COMMON=m
++CONFIG_VIDEO_GO7007=m
++CONFIG_VIDEO_GO7007_USB=m
++CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m
++CONFIG_VIDEO_AU0828=m
++CONFIG_VIDEO_AU0828_RC=y
++CONFIG_VIDEO_CX231XX=m
++CONFIG_VIDEO_CX231XX_ALSA=m
++CONFIG_VIDEO_CX231XX_DVB=m
++CONFIG_VIDEO_TM6000=m
++CONFIG_VIDEO_TM6000_ALSA=m
++CONFIG_VIDEO_TM6000_DVB=m
++CONFIG_DVB_USB=m
++CONFIG_DVB_USB_A800=m
++CONFIG_DVB_USB_DIBUSB_MB=m
++CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y
++CONFIG_DVB_USB_DIBUSB_MC=m
++CONFIG_DVB_USB_DIB0700=m
++CONFIG_DVB_USB_UMT_010=m
++CONFIG_DVB_USB_CXUSB=m
++CONFIG_DVB_USB_M920X=m
++CONFIG_DVB_USB_DIGITV=m
++CONFIG_DVB_USB_VP7045=m
++CONFIG_DVB_USB_VP702X=m
++CONFIG_DVB_USB_GP8PSK=m
++CONFIG_DVB_USB_NOVA_T_USB2=m
++CONFIG_DVB_USB_TTUSB2=m
++CONFIG_DVB_USB_DTT200U=m
++CONFIG_DVB_USB_OPERA1=m
++CONFIG_DVB_USB_AF9005=m
++CONFIG_DVB_USB_AF9005_REMOTE=m
++CONFIG_DVB_USB_PCTV452E=m
++CONFIG_DVB_USB_DW2102=m
++CONFIG_DVB_USB_CINERGY_T2=m
++CONFIG_DVB_USB_DTV5100=m
++CONFIG_DVB_USB_FRIIO=m
++CONFIG_DVB_USB_AZ6027=m
++CONFIG_DVB_USB_TECHNISAT_USB2=m
++CONFIG_DVB_USB_V2=m
++CONFIG_DVB_USB_AF9015=m
++CONFIG_DVB_USB_AF9035=m
++CONFIG_DVB_USB_ANYSEE=m
++CONFIG_DVB_USB_AU6610=m
++CONFIG_DVB_USB_AZ6007=m
++CONFIG_DVB_USB_CE6230=m
++CONFIG_DVB_USB_EC168=m
++CONFIG_DVB_USB_GL861=m
++CONFIG_DVB_USB_LME2510=m
++CONFIG_DVB_USB_MXL111SF=m
++CONFIG_DVB_USB_RTL28XXU=m
++CONFIG_DVB_USB_DVBSKY=m
++CONFIG_SMS_USB_DRV=m
++CONFIG_DVB_B2C2_FLEXCOP_USB=m
++CONFIG_DVB_AS102=m
++CONFIG_VIDEO_EM28XX=m
++CONFIG_VIDEO_EM28XX_V4L2=m
++CONFIG_VIDEO_EM28XX_ALSA=m
++CONFIG_VIDEO_EM28XX_DVB=m
++CONFIG_V4L_PLATFORM_DRIVERS=y
++CONFIG_RADIO_SI470X=y
++CONFIG_USB_SI470X=m
++CONFIG_I2C_SI470X=m
++CONFIG_RADIO_SI4713=m
++CONFIG_I2C_SI4713=m
++CONFIG_USB_MR800=m
++CONFIG_USB_DSBR=m
++CONFIG_RADIO_SHARK=m
++CONFIG_RADIO_SHARK2=m
++CONFIG_USB_KEENE=m
++CONFIG_USB_MA901=m
++CONFIG_RADIO_TEA5764=m
++CONFIG_RADIO_SAA7706H=m
++CONFIG_RADIO_TEF6862=m
++CONFIG_RADIO_WL1273=m
++CONFIG_RADIO_WL128X=m
++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
++CONFIG_VIDEO_UDA1342=m
++CONFIG_VIDEO_SONY_BTF_MPX=m
++CONFIG_VIDEO_TVP5150=m
++CONFIG_VIDEO_TW2804=m
++CONFIG_VIDEO_TW9903=m
++CONFIG_VIDEO_TW9906=m
++CONFIG_VIDEO_OV7640=m
++CONFIG_VIDEO_MT9V011=m
++CONFIG_DRM=m
++CONFIG_DRM_LOAD_EDID_FIRMWARE=y
++CONFIG_DRM_UDL=m
++CONFIG_DRM_PANEL_SIMPLE=m
++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
++CONFIG_DRM_VC4=m
++CONFIG_FB=y
++CONFIG_FB_BCM2708=y
++CONFIG_FB_UDL=m
++CONFIG_FB_SSD1307=m
++CONFIG_FB_RPISENSE=m
++# CONFIG_BACKLIGHT_GENERIC is not set
++CONFIG_BACKLIGHT_RPI=m
++CONFIG_BACKLIGHT_GPIO=m
++CONFIG_FRAMEBUFFER_CONSOLE=y
++CONFIG_LOGO=y
++# CONFIG_LOGO_LINUX_MONO is not set
++# CONFIG_LOGO_LINUX_VGA16 is not set
++CONFIG_SOUND=y
++CONFIG_SND=m
++CONFIG_SND_HRTIMER=m
++CONFIG_SND_SEQUENCER=m
++CONFIG_SND_SEQ_DUMMY=m
++CONFIG_SND_DUMMY=m
++CONFIG_SND_ALOOP=m
++CONFIG_SND_VIRMIDI=m
++CONFIG_SND_MTPAV=m
++CONFIG_SND_SERIAL_U16550=m
++CONFIG_SND_MPU401=m
++CONFIG_SND_USB_AUDIO=m
++CONFIG_SND_USB_UA101=m
++CONFIG_SND_USB_CAIAQ=m
++CONFIG_SND_USB_CAIAQ_INPUT=y
++CONFIG_SND_USB_6FIRE=m
++CONFIG_SND_SOC=m
++CONFIG_SND_BCM2835_SOC_I2S=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
++CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
++CONFIG_SND_BCM2708_SOC_RPI_DAC=m
++CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
++CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
++CONFIG_SND_DIGIDAC1_SOUNDCARD=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
++CONFIG_SND_PISOUND=m
++CONFIG_SND_SOC_ADAU1701=m
++CONFIG_SND_SOC_AK4554=m
++CONFIG_SND_SOC_CS4271_I2C=m
++CONFIG_SND_SOC_WM8804_I2C=m
++CONFIG_SND_SIMPLE_CARD=m
++CONFIG_HIDRAW=y
++CONFIG_UHID=m
++CONFIG_HID_A4TECH=m
++CONFIG_HID_ACRUX=m
++CONFIG_HID_APPLE=m
++CONFIG_HID_BELKIN=m
++CONFIG_HID_BETOP_FF=m
++CONFIG_HID_CHERRY=m
++CONFIG_HID_CHICONY=m
++CONFIG_HID_CYPRESS=m
++CONFIG_HID_DRAGONRISE=m
++CONFIG_HID_EMS_FF=m
++CONFIG_HID_ELECOM=m
++CONFIG_HID_ELO=m
++CONFIG_HID_EZKEY=m
++CONFIG_HID_GEMBIRD=m
++CONFIG_HID_HOLTEK=m
++CONFIG_HID_KEYTOUCH=m
++CONFIG_HID_KYE=m
++CONFIG_HID_UCLOGIC=m
++CONFIG_HID_WALTOP=m
++CONFIG_HID_GYRATION=m
++CONFIG_HID_TWINHAN=m
++CONFIG_HID_KENSINGTON=m
++CONFIG_HID_LCPOWER=m
++CONFIG_HID_LOGITECH=m
++CONFIG_HID_LOGITECH_DJ=m
++CONFIG_LOGITECH_FF=y
++CONFIG_LOGIRUMBLEPAD2_FF=y
++CONFIG_LOGIG940_FF=y
++CONFIG_HID_MAGICMOUSE=m
++CONFIG_HID_MICROSOFT=m
++CONFIG_HID_MONTEREY=m
++CONFIG_HID_MULTITOUCH=m
++CONFIG_HID_NTRIG=m
++CONFIG_HID_ORTEK=m
++CONFIG_HID_PANTHERLORD=m
++CONFIG_HID_PETALYNX=m
++CONFIG_HID_PICOLCD=m
++CONFIG_HID_ROCCAT=m
++CONFIG_HID_SAMSUNG=m
++CONFIG_HID_SONY=m
++CONFIG_HID_SPEEDLINK=m
++CONFIG_HID_SUNPLUS=m
++CONFIG_HID_GREENASIA=m
++CONFIG_HID_SMARTJOYPLUS=m
++CONFIG_HID_TOPSEED=m
++CONFIG_HID_THINGM=m
++CONFIG_HID_THRUSTMASTER=m
++CONFIG_HID_WACOM=m
++CONFIG_HID_WIIMOTE=m
++CONFIG_HID_XINMO=m
++CONFIG_HID_ZEROPLUS=m
++CONFIG_HID_ZYDACRON=m
++CONFIG_HID_PID=y
++CONFIG_USB_HIDDEV=y
++CONFIG_USB=y
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++CONFIG_USB_MON=m
++CONFIG_USB_DWCOTG=y
++CONFIG_USB_PRINTER=m
++CONFIG_USB_STORAGE=y
++CONFIG_USB_STORAGE_REALTEK=m
++CONFIG_USB_STORAGE_DATAFAB=m
++CONFIG_USB_STORAGE_FREECOM=m
++CONFIG_USB_STORAGE_ISD200=m
++CONFIG_USB_STORAGE_USBAT=m
++CONFIG_USB_STORAGE_SDDR09=m
++CONFIG_USB_STORAGE_SDDR55=m
++CONFIG_USB_STORAGE_JUMPSHOT=m
++CONFIG_USB_STORAGE_ALAUDA=m
++CONFIG_USB_STORAGE_ONETOUCH=m
++CONFIG_USB_STORAGE_KARMA=m
++CONFIG_USB_STORAGE_CYPRESS_ATACB=m
++CONFIG_USB_STORAGE_ENE_UB6250=m
++CONFIG_USB_MDC800=m
++CONFIG_USB_MICROTEK=m
++CONFIG_USBIP_CORE=m
++CONFIG_USBIP_VHCI_HCD=m
++CONFIG_USBIP_HOST=m
++CONFIG_USB_DWC2=y
++CONFIG_USB_SERIAL=m
++CONFIG_USB_SERIAL_GENERIC=y
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++CONFIG_USB_SERIAL_CH341=m
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP210X=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_F81232=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_IUU=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_METRO=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++CONFIG_USB_SERIAL_OTI6858=m
++CONFIG_USB_SERIAL_QCAUX=m
++CONFIG_USB_SERIAL_QUALCOMM=m
++CONFIG_USB_SERIAL_SPCP8X5=m
++CONFIG_USB_SERIAL_SAFE=m
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_SYMBOL=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++CONFIG_USB_SERIAL_OPTICON=m
++CONFIG_USB_SERIAL_XSENS_MT=m
++CONFIG_USB_SERIAL_WISHBONE=m
++CONFIG_USB_SERIAL_SSU100=m
++CONFIG_USB_SERIAL_QT2=m
++CONFIG_USB_SERIAL_DEBUG=m
++CONFIG_USB_EMI62=m
++CONFIG_USB_EMI26=m
++CONFIG_USB_ADUTUX=m
++CONFIG_USB_SEVSEG=m
++CONFIG_USB_RIO500=m
++CONFIG_USB_LEGOTOWER=m
++CONFIG_USB_LCD=m
++CONFIG_USB_CYPRESS_CY7C63=m
++CONFIG_USB_CYTHERM=m
++CONFIG_USB_IDMOUSE=m
++CONFIG_USB_FTDI_ELAN=m
++CONFIG_USB_APPLEDISPLAY=m
++CONFIG_USB_LD=m
++CONFIG_USB_TRANCEVIBRATOR=m
++CONFIG_USB_IOWARRIOR=m
++CONFIG_USB_TEST=m
++CONFIG_USB_ISIGHTFW=m
++CONFIG_USB_YUREX=m
++CONFIG_USB_ATM=m
++CONFIG_USB_SPEEDTOUCH=m
++CONFIG_USB_CXACRU=m
++CONFIG_USB_UEAGLEATM=m
++CONFIG_USB_XUSBATM=m
++CONFIG_MMC=y
++CONFIG_MMC_BLOCK_MINORS=32
++CONFIG_MMC_BCM2835_MMC=y
++CONFIG_MMC_BCM2835_DMA=y
++CONFIG_MMC_BCM2835_SDHOST=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_PLTFM=y
++CONFIG_MMC_SDHCI_IPROC=m
++CONFIG_MMC_SPI=m
++CONFIG_MMC_BCM2835=y
++CONFIG_LEDS_CLASS=y
++CONFIG_LEDS_GPIO=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_ONESHOT=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_LEDS_TRIGGER_BACKLIGHT=y
++CONFIG_LEDS_TRIGGER_CPU=y
++CONFIG_LEDS_TRIGGER_GPIO=y
++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
++CONFIG_LEDS_TRIGGER_TRANSIENT=m
++CONFIG_LEDS_TRIGGER_CAMERA=m
++CONFIG_LEDS_TRIGGER_INPUT=y
++CONFIG_LEDS_TRIGGER_PANIC=y
++CONFIG_RTC_CLASS=y
++# CONFIG_RTC_HCTOSYS is not set
++CONFIG_RTC_DRV_ABX80X=m
++CONFIG_RTC_DRV_DS1307=m
++CONFIG_RTC_DRV_DS1374=m
++CONFIG_RTC_DRV_DS1672=m
++CONFIG_RTC_DRV_MAX6900=m
++CONFIG_RTC_DRV_RS5C372=m
++CONFIG_RTC_DRV_ISL1208=m
++CONFIG_RTC_DRV_ISL12022=m
++CONFIG_RTC_DRV_X1205=m
++CONFIG_RTC_DRV_PCF8523=m
++CONFIG_RTC_DRV_PCF8563=m
++CONFIG_RTC_DRV_PCF8583=m
++CONFIG_RTC_DRV_M41T80=m
++CONFIG_RTC_DRV_BQ32K=m
++CONFIG_RTC_DRV_S35390A=m
++CONFIG_RTC_DRV_FM3130=m
++CONFIG_RTC_DRV_RX8581=m
++CONFIG_RTC_DRV_RX8025=m
++CONFIG_RTC_DRV_EM3027=m
++CONFIG_RTC_DRV_M41T93=m
++CONFIG_RTC_DRV_M41T94=m
++CONFIG_RTC_DRV_DS1302=m
++CONFIG_RTC_DRV_DS1305=m
++CONFIG_RTC_DRV_DS1390=m
++CONFIG_RTC_DRV_R9701=m
++CONFIG_RTC_DRV_RX4581=m
++CONFIG_RTC_DRV_RS5C348=m
++CONFIG_RTC_DRV_MAX6902=m
++CONFIG_RTC_DRV_PCF2123=m
++CONFIG_RTC_DRV_DS3232=m
++CONFIG_RTC_DRV_PCF2127=m
++CONFIG_RTC_DRV_RV3029C2=m
++CONFIG_DMADEVICES=y
++CONFIG_DMA_BCM2835=y
++CONFIG_DMA_BCM2708=y
++CONFIG_UIO=m
++CONFIG_UIO_PDRV_GENIRQ=m
++CONFIG_STAGING=y
++CONFIG_IRDA=m
++CONFIG_IRLAN=m
++CONFIG_IRNET=m
++CONFIG_IRCOMM=m
++CONFIG_IRDA_ULTRA=y
++CONFIG_IRDA_CACHE_LAST_LSAP=y
++CONFIG_IRDA_FAST_RR=y
++CONFIG_IRTTY_SIR=m
++CONFIG_KINGSUN_DONGLE=m
++CONFIG_KSDAZZLE_DONGLE=m
++CONFIG_KS959_DONGLE=m
++CONFIG_USB_IRDA=m
++CONFIG_SIGMATEL_FIR=m
++CONFIG_MCS_FIR=m
++CONFIG_PRISM2_USB=m
++CONFIG_R8712U=m
++CONFIG_R8188EU=m
++CONFIG_VT6656=m
++CONFIG_SPEAKUP=m
++CONFIG_SPEAKUP_SYNTH_SOFT=m
++CONFIG_STAGING_MEDIA=y
++CONFIG_LIRC_STAGING=y
++CONFIG_LIRC_RPI=m
++CONFIG_FB_TFT=m
++CONFIG_FB_TFT_AGM1264K_FL=m
++CONFIG_FB_TFT_BD663474=m
++CONFIG_FB_TFT_HX8340BN=m
++CONFIG_FB_TFT_HX8347D=m
++CONFIG_FB_TFT_HX8353D=m
++CONFIG_FB_TFT_HX8357D=m
++CONFIG_FB_TFT_ILI9163=m
++CONFIG_FB_TFT_ILI9320=m
++CONFIG_FB_TFT_ILI9325=m
++CONFIG_FB_TFT_ILI9340=m
++CONFIG_FB_TFT_ILI9341=m
++CONFIG_FB_TFT_ILI9481=m
++CONFIG_FB_TFT_ILI9486=m
++CONFIG_FB_TFT_PCD8544=m
++CONFIG_FB_TFT_RA8875=m
++CONFIG_FB_TFT_S6D02A1=m
++CONFIG_FB_TFT_S6D1121=m
++CONFIG_FB_TFT_SSD1289=m
++CONFIG_FB_TFT_SSD1306=m
++CONFIG_FB_TFT_SSD1331=m
++CONFIG_FB_TFT_SSD1351=m
++CONFIG_FB_TFT_ST7735R=m
++CONFIG_FB_TFT_TINYLCD=m
++CONFIG_FB_TFT_TLS8204=m
++CONFIG_FB_TFT_UC1701=m
++CONFIG_FB_TFT_UPD161704=m
++CONFIG_FB_TFT_WATTEROTT=m
++CONFIG_FB_FLEX=m
++CONFIG_FB_TFT_FBTFT_DEVICE=m
++CONFIG_SND_BCM2835=m
++CONFIG_MAILBOX=y
++CONFIG_BCM2835_MBOX=y
++# CONFIG_IOMMU_SUPPORT is not set
++CONFIG_RASPBERRYPI_POWER=y
++CONFIG_EXTCON=m
++CONFIG_EXTCON_ARIZONA=m
++CONFIG_IIO=m
++CONFIG_IIO_BUFFER=y
++CONFIG_IIO_BUFFER_CB=m
++CONFIG_IIO_KFIFO_BUF=m
++CONFIG_MCP320X=m
++CONFIG_MCP3422=m
++CONFIG_DHT11=m
++CONFIG_HTU21=m
++CONFIG_PWM_BCM2835=m
++CONFIG_PWM_PCA9685=m
++CONFIG_RASPBERRYPI_FIRMWARE=y
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_POSIX_ACL=y
++CONFIG_EXT4_FS_SECURITY=y
++CONFIG_REISERFS_FS=m
++CONFIG_REISERFS_FS_XATTR=y
++CONFIG_REISERFS_FS_POSIX_ACL=y
++CONFIG_REISERFS_FS_SECURITY=y
++CONFIG_JFS_FS=m
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++CONFIG_JFS_STATISTICS=y
++CONFIG_XFS_FS=m
++CONFIG_XFS_QUOTA=y
++CONFIG_XFS_POSIX_ACL=y
++CONFIG_XFS_RT=y
++CONFIG_GFS2_FS=m
++CONFIG_OCFS2_FS=m
++CONFIG_BTRFS_FS=m
++CONFIG_BTRFS_FS_POSIX_ACL=y
++CONFIG_NILFS2_FS=m
++CONFIG_F2FS_FS=y
++CONFIG_FANOTIFY=y
++CONFIG_QFMT_V1=m
++CONFIG_QFMT_V2=m
++CONFIG_AUTOFS4_FS=y
++CONFIG_FUSE_FS=m
++CONFIG_CUSE=m
++CONFIG_OVERLAY_FS=m
++CONFIG_FSCACHE=y
++CONFIG_FSCACHE_STATS=y
++CONFIG_FSCACHE_HISTOGRAM=y
++CONFIG_CACHEFILES=y
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++CONFIG_ZISOFS=y
++CONFIG_UDF_FS=m
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
++CONFIG_NTFS_FS=m
++CONFIG_NTFS_RW=y
++CONFIG_TMPFS=y
++CONFIG_TMPFS_POSIX_ACL=y
++CONFIG_ECRYPT_FS=m
++CONFIG_HFS_FS=m
++CONFIG_HFSPLUS_FS=m
++CONFIG_JFFS2_FS=m
++CONFIG_JFFS2_SUMMARY=y
++CONFIG_UBIFS_FS=m
++CONFIG_SQUASHFS=m
++CONFIG_SQUASHFS_XATTR=y
++CONFIG_SQUASHFS_LZO=y
++CONFIG_SQUASHFS_XZ=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_NFS_SWAP=y
++CONFIG_ROOT_NFS=y
++CONFIG_NFS_FSCACHE=y
++CONFIG_NFSD=m
++CONFIG_NFSD_V3_ACL=y
++CONFIG_NFSD_V4=y
++CONFIG_CIFS=m
++CONFIG_CIFS_WEAK_PW_HASH=y
++CONFIG_CIFS_UPCALL=y
++CONFIG_CIFS_XATTR=y
++CONFIG_CIFS_POSIX=y
++CONFIG_CIFS_ACL=y
++CONFIG_CIFS_DFS_UPCALL=y
++CONFIG_CIFS_FSCACHE=y
++CONFIG_9P_FS=m
++CONFIG_9P_FS_POSIX_ACL=y
++CONFIG_NLS_DEFAULT="utf8"
++CONFIG_NLS_CODEPAGE_437=y
++CONFIG_NLS_CODEPAGE_737=m
++CONFIG_NLS_CODEPAGE_775=m
++CONFIG_NLS_CODEPAGE_850=m
++CONFIG_NLS_CODEPAGE_852=m
++CONFIG_NLS_CODEPAGE_855=m
++CONFIG_NLS_CODEPAGE_857=m
++CONFIG_NLS_CODEPAGE_860=m
++CONFIG_NLS_CODEPAGE_861=m
++CONFIG_NLS_CODEPAGE_862=m
++CONFIG_NLS_CODEPAGE_863=m
++CONFIG_NLS_CODEPAGE_864=m
++CONFIG_NLS_CODEPAGE_865=m
++CONFIG_NLS_CODEPAGE_866=m
++CONFIG_NLS_CODEPAGE_869=m
++CONFIG_NLS_CODEPAGE_936=m
++CONFIG_NLS_CODEPAGE_950=m
++CONFIG_NLS_CODEPAGE_932=m
++CONFIG_NLS_CODEPAGE_949=m
++CONFIG_NLS_CODEPAGE_874=m
++CONFIG_NLS_ISO8859_8=m
++CONFIG_NLS_CODEPAGE_1250=m
++CONFIG_NLS_CODEPAGE_1251=m
++CONFIG_NLS_ASCII=y
++CONFIG_NLS_ISO8859_1=m
++CONFIG_NLS_ISO8859_2=m
++CONFIG_NLS_ISO8859_3=m
++CONFIG_NLS_ISO8859_4=m
++CONFIG_NLS_ISO8859_5=m
++CONFIG_NLS_ISO8859_6=m
++CONFIG_NLS_ISO8859_7=m
++CONFIG_NLS_ISO8859_9=m
++CONFIG_NLS_ISO8859_13=m
++CONFIG_NLS_ISO8859_14=m
++CONFIG_NLS_ISO8859_15=m
++CONFIG_NLS_KOI8_R=m
++CONFIG_NLS_KOI8_U=m
++CONFIG_DLM=m
++CONFIG_PRINTK_TIME=y
++CONFIG_BOOT_PRINTK_DELAY=y
++CONFIG_DEBUG_MEMORY_INIT=y
++CONFIG_DETECT_HUNG_TASK=y
++CONFIG_LATENCYTOP=y
++CONFIG_IRQSOFF_TRACER=y
++CONFIG_SCHED_TRACER=y
++CONFIG_STACK_TRACER=y
++CONFIG_BLK_DEV_IO_TRACE=y
++CONFIG_FUNCTION_PROFILER=y
++CONFIG_KGDB=y
++CONFIG_KGDB_KDB=y
++CONFIG_KDB_KEYBOARD=y
++CONFIG_CRYPTO_USER=m
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_CTS=m
++CONFIG_CRYPTO_XTS=m
++CONFIG_CRYPTO_XCBC=m
++CONFIG_CRYPTO_TGR192=m
++CONFIG_CRYPTO_WP512=m
++CONFIG_CRYPTO_CAST5=m
++CONFIG_CRYPTO_DES=y
++CONFIG_CRYPTO_USER_API_SKCIPHER=m
++CONFIG_ARM64_CRYPTO=y
++CONFIG_CRC_ITU_T=y
++CONFIG_LIBCRC32C=y
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -0,0 +1,144 @@
++# Overlays for the Raspberry Pi platform
++
++dtbo-$(CONFIG_ARCH_BCM2835) += \
++ adau1977-adc.dtbo \
++ adau7002-simple.dtbo \
++ ads1015.dtbo \
++ ads1115.dtbo \
++ ads7846.dtbo \
++ akkordion-iqdacplus.dtbo \
++ allo-boss-dac-pcm512x-audio.dtbo \
++ allo-digione.dtbo \
++ allo-katana-dac-audio.dtbo \
++ allo-piano-dac-pcm512x-audio.dtbo \
++ allo-piano-dac-plus-pcm512x-audio.dtbo \
++ applepi-dac.dtbo \
++ at86rf233.dtbo \
++ audioinjector-addons.dtbo \
++ audioinjector-wm8731-audio.dtbo \
++ audremap.dtbo \
++ balena-fin.dtbo \
++ bmp085_i2c-sensor.dtbo \
++ dht11.dtbo \
++ dionaudio-loco.dtbo \
++ dionaudio-loco-v2.dtbo \
++ dpi18.dtbo \
++ dpi24.dtbo \
++ dwc-otg.dtbo \
++ dwc2.dtbo \
++ enc28j60.dtbo \
++ enc28j60-spi2.dtbo \
++ exc3000.dtbo \
++ fe-pi-audio.dtbo \
++ goodix.dtbo \
++ googlevoicehat-soundcard.dtbo \
++ gpio-ir.dtbo \
++ gpio-ir-tx.dtbo \
++ gpio-key.dtbo \
++ gpio-poweroff.dtbo \
++ gpio-shutdown.dtbo \
++ hifiberry-amp.dtbo \
++ hifiberry-dac.dtbo \
++ hifiberry-dacplus.dtbo \
++ hifiberry-digi.dtbo \
++ hifiberry-digi-pro.dtbo \
++ hy28a.dtbo \
++ hy28b.dtbo \
++ i2c-bcm2708.dtbo \
++ i2c-gpio.dtbo \
++ i2c-mux.dtbo \
++ i2c-pwm-pca9685a.dtbo \
++ i2c-rtc.dtbo \
++ i2c-rtc-gpio.dtbo \
++ i2c-sensor.dtbo \
++ i2c0-bcm2708.dtbo \
++ i2c1-bcm2708.dtbo \
++ i2s-gpio28-31.dtbo \
++ iqaudio-dac.dtbo \
++ iqaudio-dacplus.dtbo \
++ iqaudio-digi-wm8804-audio.dtbo \
++ jedec-spi-nor.dtbo \
++ justboom-dac.dtbo \
++ justboom-digi.dtbo \
++ lirc-rpi.dtbo \
++ ltc294x.dtbo \
++ mbed-dac.dtbo \
++ mcp23017.dtbo \
++ mcp23s17.dtbo \
++ mcp2515-can0.dtbo \
++ mcp2515-can1.dtbo \
++ mcp3008.dtbo \
++ mcp3202.dtbo \
++ media-center.dtbo \
++ midi-uart0.dtbo \
++ midi-uart1.dtbo \
++ mmc.dtbo \
++ mpu6050.dtbo \
++ mz61581.dtbo \
++ papirus.dtbo \
++ pi3-act-led.dtbo \
++ pi3-disable-bt.dtbo \
++ pi3-disable-wifi.dtbo \
++ pi3-miniuart-bt.dtbo \
++ pibell.dtbo \
++ piscreen.dtbo \
++ piscreen2r.dtbo \
++ pisound.dtbo \
++ pitft22.dtbo \
++ pitft28-capacitive.dtbo \
++ pitft28-resistive.dtbo \
++ pitft35-resistive.dtbo \
++ pps-gpio.dtbo \
++ pwm.dtbo \
++ pwm-2chan.dtbo \
++ pwm-ir-tx.dtbo \
++ qca7000.dtbo \
++ rotary-encoder.dtbo \
++ rpi-backlight.dtbo \
++ rpi-cirrus-wm5102.dtbo \
++ rpi-dac.dtbo \
++ rpi-display.dtbo \
++ rpi-ft5406.dtbo \
++ rpi-proto.dtbo \
++ rpi-sense.dtbo \
++ rpi-tv.dtbo \
++ rra-digidac1-wm8741-audio.dtbo \
++ sc16is750-i2c.dtbo \
++ sc16is752-i2c.dtbo \
++ sc16is752-spi1.dtbo \
++ sdhost.dtbo \
++ sdio.dtbo \
++ sdio-1bit.dtbo \
++ sdtweak.dtbo \
++ smi.dtbo \
++ smi-dev.dtbo \
++ smi-nand.dtbo \
++ spi-gpio35-39.dtbo \
++ spi-rtc.dtbo \
++ spi0-cs.dtbo \
++ spi0-hw-cs.dtbo \
++ spi1-1cs.dtbo \
++ spi1-2cs.dtbo \
++ spi1-3cs.dtbo \
++ spi2-1cs.dtbo \
++ spi2-2cs.dtbo \
++ spi2-3cs.dtbo \
++ superaudioboard.dtbo \
++ sx150x.dtbo \
++ tinylcd35.dtbo \
++ uart0.dtbo \
++ uart1.dtbo \
++ upstream.dtbo \
++ upstream-aux-interrupt.dtbo \
++ vc4-fkms-v3d.dtbo \
++ vc4-kms-v3d.dtbo \
++ vga666.dtbo \
++ w1-gpio.dtbo \
++ w1-gpio-pullup.dtbo \
++ wittypi.dtbo
++
++targets += dtbs dtbs_install
++targets += $(dtbo-y)
++
++always := $(dtbo-y)
++clean-files := *.dtbo
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/README
+@@ -0,0 +1,1932 @@
++Introduction
++============
++
++This directory contains Device Tree overlays. Device Tree makes it possible
++to support many hardware configurations with a single kernel and without the
++need to explicitly load or blacklist kernel modules. Note that this isn't a
++"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
++are still configured by the board support code, but the intention is to
++eventually reach that goal.
++
++On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
++default, the Raspberry Pi kernel boots with device tree enabled. You can
++completely disable DT usage (for now) by adding:
++
++ device_tree=
++
++to your config.txt, which should cause your Pi to revert to the old way of
++doing things after a reboot.
++
++In /boot you will find a .dtb for each base platform. This describes the
++hardware that is part of the Raspberry Pi board. The loader (start.elf and its
++siblings) selects the .dtb file appropriate for the platform by name, and reads
++it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
++are disabled, but they can be enabled using Device Tree parameters:
++
++ dtparam=i2c=on,i2s=on,spi=on
++
++However, this shouldn't be necessary in many use cases because loading an
++overlay that requires one of those interfaces will cause it to be enabled
++automatically, and it is advisable to only enable interfaces if they are
++needed.
++
++Configuring additional, optional hardware is done using Device Tree overlays
++(see below).
++
++GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and
++not the physical pin numbers.
++
++raspi-config
++============
++
++The Advanced Options section of the raspi-config utility can enable and disable
++Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
++is possible to both enable an interface and blacklist the driver, if for some
++reason you should want to defer the loading.
++
++Modules
++=======
++
++As well as describing the hardware, Device Tree also gives enough information
++to allow suitable driver modules to be located and loaded, with the corollary
++that unneeded modules are not loaded. As a result it should be possible to
++remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
++have its contents deleted (or commented out).
++
++Using Overlays
++==============
++
++Overlays are loaded using the "dtoverlay" directive. As an example, consider
++the popular lirc-rpi module, the Linux Infrared Remote Control driver. In the
++pre-DT world this would be loaded from /etc/modules, with an explicit
++"modprobe lirc-rpi" command, or programmatically by lircd. With DT enabled,
++this becomes a line in config.txt:
++
++ dtoverlay=lirc-rpi
++
++This causes the file /boot/overlays/lirc-rpi.dtbo to be loaded. By
++default it will use GPIOs 17 (out) and 18 (in), but this can be modified using
++DT parameters:
++
++ dtoverlay=lirc-rpi,gpio_out_pin=17,gpio_in_pin=13
++
++Parameters always have default values, although in some cases (e.g. "w1-gpio")
++it is necessary to provided multiple overlays in order to get the desired
++behaviour. See the list of overlays below for a description of the parameters
++and their defaults.
++
++The Overlay and Parameter Reference
++===================================
++
++N.B. When editing this file, please preserve the indentation levels to make it
++simple to parse programmatically. NO HARD TABS.
++
++
++Name: <The base DTB>
++Info: Configures the base Raspberry Pi hardware
++Load: <loaded automatically>
++Params:
++ audio Set to "on" to enable the onboard ALSA audio
++ interface (default "off")
++
++ eee Enable Energy Efficient Ethernet support for
++ compatible devices (default "on"). See also
++ "tx_lpi_timer".
++
++ eth_led0 Set mode of LED0 (usually orange) (default
++ "1"). The legal values are:
++ 0=link/activity 1=link1000/activity
++ 2=link100/activity 3=link10/activity
++ 4=link100/1000/activity 5=link10/1000/activity
++ 6=link10/100/activity 14=off 15=on
++
++ eth_led1 Set mode of LED1 (usually green) (default
++ "6"). See eth_led0 for legal values.
++
++ i2c_arm Set to "on" to enable the ARM's i2c interface
++ (default "off")
++
++ i2c_vc Set to "on" to enable the i2c interface
++ usually reserved for the VideoCore processor
++ (default "off")
++
++ i2c An alias for i2c_arm
++
++ i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
++ (default "100000")
++
++ i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
++ (default "100000")
++
++ i2c_baudrate An alias for i2c_arm_baudrate
++
++ i2s Set to "on" to enable the i2s interface
++ (default "off")
++
++ spi Set to "on" to enable the spi interfaces
++ (default "off")
++
++ random Set to "on" to enable the hardware random
++ number generator (default "on")
++
++ sd_overclock Clock (in MHz) to use when the MMC framework
++ requests 50MHz
++
++ sd_force_pio Disable DMA support for SD driver (default off)
++
++ sd_pio_limit Number of blocks above which to use DMA for
++ SD card (default 1)
++
++ sd_debug Enable debug output from SD driver (default off)
++
++ sdio_overclock Clock (in MHz) to use when the MMC framework
++ requests 50MHz for the SDIO/WiFi interface.
++
++ tx_lpi_timer Set the delay in microseconds between going idle
++ and entering the low power state (default 600).
++ Requires EEE to be enabled - see "eee".
++
++ uart0 Set to "off" to disable uart0 (default "on")
++
++ uart1 Set to "on" or "off" to enable or disable uart1
++ (default varies)
++
++ watchdog Set to "on" to enable the hardware watchdog
++ (default "off")
++
++ act_led_trigger Choose which activity the LED tracks.
++ Use "heartbeat" for a nice load indicator.
++ (default "mmc")
++
++ act_led_activelow Set to "on" to invert the sense of the LED
++ (default "off")
++ N.B. For Pi3 see pi3-act-led overlay.
++
++ act_led_gpio Set which GPIO to use for the activity LED
++ (in case you want to connect it to an external
++ device)
++ (default "16" on a non-Plus board, "47" on a
++ Plus or Pi 2)
++ N.B. For Pi3 see pi3-act-led overlay.
++
++ pwr_led_trigger
++ pwr_led_activelow
++ pwr_led_gpio
++ As for act_led_*, but using the PWR LED.
++ Not available on Model A/B boards.
++
++ N.B. It is recommended to only enable those interfaces that are needed.
++ Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
++ interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
++ Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
++ interfaces i2c0 and i2c1. Use of the numeric variants is still possible
++ but deprecated because the ARM/VC assignments differ between board
++ revisions. The same board-specific mapping applies to i2c_baudrate,
++ and the other i2c baudrate parameters.
++
++
++Name: adau1977-adc
++Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
++ and I2S for data.
++Load: dtoverlay=adau1977-adc
++Params: <None>
++
++
++Name: adau7002-simple
++Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter.
++Load: dtoverlay=adau7002-simple,<param>=<val>
++Params: card-name Override the default, "adau7002", card name.
++
++
++Name: ads1015
++Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
++Load: dtoverlay=ads1015,<param>=<val>
++Params: addr I2C bus address of device. Set based on how the
++ addr pin is wired. (default=0x48 assumes addr
++ is pulled to GND)
++ cha_enable Enable virtual channel a. (default=true)
++ cha_cfg Set the configuration for virtual channel a.
++ (default=4 configures this channel for the
++ voltage at A0 with respect to GND)
++ cha_datarate Set the datarate (samples/sec) for this channel.
++ (default=4 sets 1600 sps)
++ cha_gain Set the gain of the Programmable Gain
++ Amplifier for this channel. (default=2 sets the
++ full scale of the channel to 2.048 Volts)
++
++ Channel (ch) parameters can be set for each enabled channel.
++ A maximum of 4 channels can be enabled (letters a thru d).
++ For more information refer to the device datasheet at:
++ http://www.ti.com/lit/ds/symlink/ads1015.pdf
++
++
++Name: ads1115
++Info: Texas Instruments ADS1115 ADC
++Load: dtoverlay=ads1115,<param>[=<val>]
++Params: addr I2C bus address of device. Set based on how the
++ addr pin is wired. (default=0x48 assumes addr
++ is pulled to GND)
++ cha_enable Enable virtual channel a.
++ cha_cfg Set the configuration for virtual channel a.
++ (default=4 configures this channel for the
++ voltage at A0 with respect to GND)
++ cha_datarate Set the datarate (samples/sec) for this channel.
++ (default=7 sets 860 sps)
++ cha_gain Set the gain of the Programmable Gain
++ Amplifier for this channel. (Default 1 sets the
++ full scale of the channel to 4.096 Volts)
++
++ Channel parameters can be set for each enabled channel.
++ A maximum of 4 channels can be enabled (letters a thru d).
++ For more information refer to the device datasheet at:
++ http://www.ti.com/lit/ds/symlink/ads1115.pdf
++
++
++Name: ads7846
++Info: ADS7846 Touch controller
++Load: dtoverlay=ads7846,<param>=<val>
++Params: cs SPI bus Chip Select (default 1)
++ speed SPI bus speed (default 2MHz, max 3.25MHz)
++ penirq GPIO used for PENIRQ. REQUIRED
++ penirq_pull Set GPIO pull (default 0=none, 2=pullup)
++ swapxy Swap x and y axis
++ xmin Minimum value on the X axis (default 0)
++ ymin Minimum value on the Y axis (default 0)
++ xmax Maximum value on the X axis (default 4095)
++ ymax Maximum value on the Y axis (default 4095)
++ pmin Minimum reported pressure value (default 0)
++ pmax Maximum reported pressure value (default 65535)
++ xohms Touchpanel sensitivity (X-plate resistance)
++ (default 400)
++
++ penirq is required and usually xohms (60-100) has to be set as well.
++ Apart from that, pmax (255) and swapxy are also common.
++ The rest of the calibration can be done with xinput-calibrator.
++ See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
++ Device Tree binding document:
++ www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
++
++
++Name: akkordion-iqdacplus
++Info: Configures the Digital Dreamtime Akkordion Music Player (based on the
++ OEM IQAudIO DAC+ or DAC Zero module).
++Load: dtoverlay=akkordion-iqdacplus,<param>=<val>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ dtoverlay=akkordion-iqdacplus,24db_digital_gain
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24db_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++
++
++Name: allo-boss-dac-pcm512x-audio
++Info: Configures the Allo Boss DAC audio cards.
++Load: dtoverlay=allo-boss-dac-pcm512x-audio,<param>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=allo-boss-dac-pcm512x-audio,
++ 24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24db_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++ slave Force Boss DAC into slave mode, using Pi a
++ master for bit clock and frame clock. Enable
++ with "dtoverlay=allo-boss-dac-pcm512x-audio,
++ slave"
++
++
++Name: allo-digione
++Info: Configures the Allo Digione audio card
++Load: dtoverlay=allo-digione
++Params: <None>
++
++
++Name: allo-katana-dac-audio
++Info: Configures the Allo Katana DAC audio card
++Load: dtoverlay=allo-katana-dac-audio
++Params: <None>
++
++
++Name: allo-piano-dac-pcm512x-audio
++Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
++ (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
++ The subwoofer outputs on the Piano 2.1 are not currently supported!)
++Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control.
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24db_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++
++
++Name: allo-piano-dac-plus-pcm512x-audio
++Info: Configures the Allo Piano DAC (2.1) audio cards.
++Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio,<param>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control.
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24db_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++ glb_mclk This option is only with Kali board. If enabled,
++ MCLK for Kali is used and PLL is disabled for
++ better voice quality. (default Off)
++
++
++Name: applepi-dac
++Info: Configures the Orchard Audio ApplePi-DAC audio card
++Load: dtoverlay=applepi-dac
++Params: <None>
++
++
++Name: at86rf233
++Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
++ connected to spi0.0
++Load: dtoverlay=at86rf233,<param>=<val>
++Params: interrupt GPIO used for INT (default 23)
++ reset GPIO used for Reset (default 24)
++ sleep GPIO used for Sleep (default 25)
++ speed SPI bus speed in Hz (default 3000000)
++ trim Fine tuning of the internal capacitance
++ arrays (0=+0pF, 15=+4.5pF, default 15)
++
++
++Name: audioinjector-addons
++Info: Configures the audioinjector.net audio add on soundcards
++Load: dtoverlay=audioinjector-addons,<param>=<val>
++Params: non-stop-clocks Keeps the clocks running even when the stream
++ is paused or stopped (default off)
++
++
++Name: audioinjector-wm8731-audio
++Info: Configures the audioinjector.net audio add on soundcard
++Load: dtoverlay=audioinjector-wm8731-audio
++Params: <None>
++
++
++Name: audremap
++Info: Switches PWM sound output to pins 12 (Right) & 13 (Left)
++Load: dtoverlay=audremap,<param>=<val>
++Params: swap_lr Reverse the channel allocation, which will also
++ swap the audio jack outputs (default off)
++ enable_jack Don't switch off the audio jack output
++ (default off)
++
++
++Name: balena-fin
++Info: Overlay that enables WiFi, Bluetooth and the GPIO expander on the
++ Balena Fin board.
++Load: dtoverlay=balena-fin
++Params: <None>
++
++
++Name: bmp085_i2c-sensor
++Info: This overlay is now deprecated - see i2c-sensor
++Load: dtoverlay=bmp085_i2c-sensor
++Params: <None>
++
++
++Name: dht11
++Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
++ Also sometimes found with the part number(s) AM230x.
++Load: dtoverlay=dht11,<param>=<val>
++Params: gpiopin GPIO connected to the sensor's DATA output.
++ (default 4)
++
++
++Name: dionaudio-loco
++Info: Configures the Dion Audio LOCO DAC-AMP
++Load: dtoverlay=dionaudio-loco
++Params: <None>
++
++
++Name: dionaudio-loco-v2
++Info: Configures the Dion Audio LOCO-V2 DAC-AMP
++Load: dtoverlay=dionaudio-loco-v2,<param>=<val>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=hifiberry-dacplus,24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24dB_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++
++
++Name: dpi18
++Info: Overlay for a generic 18-bit DPI display
++ This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
++ 2-3 seconds after the kernel has started.
++Load: dtoverlay=dpi18
++Params: <None>
++
++
++Name: dpi24
++Info: Overlay for a generic 24-bit DPI display
++ This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
++ 2-3 seconds after the kernel has started.
++Load: dtoverlay=dpi24
++Params: <None>
++
++
++Name: dwc-otg
++Info: Selects the dwc_otg USB controller driver which has fiq support. This
++ is the default on all except the Pi Zero which defaults to dwc2.
++Load: dtoverlay=dwc-otg
++Params: <None>
++
++
++Name: dwc2
++Info: Selects the dwc2 USB controller driver
++Load: dtoverlay=dwc2,<param>=<val>
++Params: dr_mode Dual role mode: "host", "peripheral" or "otg"
++
++ g-rx-fifo-size Size of rx fifo size in gadget mode
++
++ g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget
++ mode
++
++
++[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
++
++
++Name: enc28j60
++Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
++Load: dtoverlay=enc28j60,<param>=<val>
++Params: int_pin GPIO used for INT (default 25)
++
++ speed SPI bus speed (default 12000000)
++
++
++Name: enc28j60-spi2
++Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
++Load: dtoverlay=enc28j60-spi2,<param>=<val>
++Params: int_pin GPIO used for INT (default 39)
++
++ speed SPI bus speed (default 12000000)
++
++
++Name: exc3000
++Info: Enables I2C connected EETI EXC3000 multiple touch controller using
++ GPIO 4 (pin 7 on GPIO header) for interrupt.
++Load: dtoverlay=exc3000,<param>=<val>
++Params: interrupt GPIO used for interrupt (default 4)
++ sizex Touchscreen size x (default 4096)
++ sizey Touchscreen size y (default 4096)
++ invx Touchscreen inverted x axis
++ invy Touchscreen inverted y axis
++ swapxy Touchscreen swapped x y axis
++
++
++Name: fe-pi-audio
++Info: Configures the Fe-Pi Audio Sound Card
++Load: dtoverlay=fe-pi-audio
++Params: <None>
++
++
++Name: goodix
++Info: Enables I2C connected Goodix gt9271 multiple touch controller using
++ GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset.
++Load: dtoverlay=goodix,<param>=<val>
++Params: interrupt GPIO used for interrupt (default 4)
++ reset GPIO used for reset (default 17)
++
++
++Name: googlevoicehat-soundcard
++Info: Configures the Google voiceHAT soundcard
++Load: dtoverlay=googlevoicehat-soundcard
++Params: <None>
++
++
++Name: gpio-ir
++Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
++ based gpio_ir_recv driver maps received keys directly to a
++ /dev/input/event* device, all decoding is done by the kernel - LIRC is
++ not required! The key mapping and other decoding parameters can be
++ configured by "ir-keytable" tool.
++Load: dtoverlay=gpio-ir,<param>=<val>
++Params: gpio_pin Input pin number. Default is 18.
++
++ gpio_pull Desired pull-up/down state (off, down, up)
++ Default is "down".
++
++ rc-map-name Default rc keymap (can also be changed by
++ ir-keytable), defaults to "rc-rc6-mce"
++
++
++Name: gpio-ir-tx
++Info: Use GPIO pin as bit-banged infrared transmitter output.
++ This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require
++ a PWM so it can be used together with onboard analog audio.
++Load: dtoverlay=gpio-ir-tx,<param>=<val>
++Params: gpio_pin Output GPIO (default 18)
++
++ invert "1" = invert the output (make it active-low).
++ Default is "0" (active-high).
++
++
++Name: gpio-key
++Info: This is a generic overlay for activating GPIO keypresses using
++ the gpio-keys library and this dtoverlay. Multiple keys can be
++ set up using multiple calls to the overlay for configuring
++ additional buttons or joysticks. You can see available keycodes
++ at https://github.com/torvalds/linux/blob/v4.12/include/uapi/
++ linux/input-event-codes.h#L64
++Load: dtoverlay=gpio-key,<param>=<val>
++Params: gpio GPIO pin to trigger on (default 3)
++ active_low When this is 1 (active low), a falling
++ edge generates a key down event and a
++ rising edge generates a key up event.
++ When this is 0 (active high), this is
++ reversed. The default is 1 (active low)
++ gpio_pull Desired pull-up/down state (off, down, up)
++ Default is "up". Note that the default pin
++ (GPIO3) has an external pullup
++ label Set a label for the key
++ keycode Set the key code for the button
++
++
++Name: gpio-poweroff
++Info: Drives a GPIO high or low on poweroff (including halt). Enabling this
++ overlay will prevent the ability to boot by driving GPIO3 low.
++Load: dtoverlay=gpio-poweroff,<param>=<val>
++Params: gpiopin GPIO for signalling (default 26)
++
++ active_low Set if the power control device requires a
++ high->low transition to trigger a power-down.
++ Note that this will require the support of a
++ custom dt-blob.bin to prevent a power-down
++ during the boot process, and that a reboot
++ will also cause the pin to go low.
++
++
++Name: gpio-shutdown
++Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin
++ is configured as an input key that generates KEY_POWER events.
++ This event is handled by systemd-logind by initiating a
++ shutdown. Systemd versions older than 225 need an udev rule
++ enable listening to the input device:
++
++ ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \
++ SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \
++ ATTRS{keys}=="116", TAG+="power-switch"
++
++ This overlay only handles shutdown. After shutdown, the system
++ can be powered up again by driving GPIO3 low. The default
++ configuration uses GPIO3 with a pullup, so if you connect a
++ button between GPIO3 and GND (pin 5 and 6 on the 40-pin header),
++ you get a shutdown and power-up button.
++Load: dtoverlay=gpio-shutdown,<param>=<val>
++Params: gpio_pin GPIO pin to trigger on (default 3)
++
++ active_low When this is 1 (active low), a falling
++ edge generates a key down event and a
++ rising edge generates a key up event.
++ When this is 0 (active high), this is
++ reversed. The default is 1 (active low).
++
++ gpio_pull Desired pull-up/down state (off, down, up)
++ Default is "up".
++
++ Note that the default pin (GPIO3) has an
++ external pullup.
++
++
++Name: hifiberry-amp
++Info: Configures the HifiBerry Amp and Amp+ audio cards
++Load: dtoverlay=hifiberry-amp
++Params: <None>
++
++
++Name: hifiberry-dac
++Info: Configures the HifiBerry DAC audio card
++Load: dtoverlay=hifiberry-dac
++Params: <None>
++
++
++Name: hifiberry-dacplus
++Info: Configures the HifiBerry DAC+ audio card
++Load: dtoverlay=hifiberry-dacplus,<param>=<val>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=hifiberry-dacplus,24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24dB_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++ slave Force DAC+ Pro into slave mode, using Pi as
++ master for bit clock and frame clock.
++
++
++Name: hifiberry-digi
++Info: Configures the HifiBerry Digi and Digi+ audio card
++Load: dtoverlay=hifiberry-digi
++Params: <None>
++
++
++Name: hifiberry-digi-pro
++Info: Configures the HifiBerry Digi+ Pro audio card
++Load: dtoverlay=hifiberry-digi-pro
++Params: <None>
++
++
++Name: hy28a
++Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
++ Default values match Texy's display shield
++Load: dtoverlay=hy28a,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++ xohms Touchpanel sensitivity (X-plate resistance)
++
++ resetgpio GPIO used to reset controller
++
++ ledgpio GPIO used to control backlight
++
++
++Name: hy28b
++Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
++ Default values match Texy's display shield
++Load: dtoverlay=hy28b,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++ xohms Touchpanel sensitivity (X-plate resistance)
++
++ resetgpio GPIO used to reset controller
++
++ ledgpio GPIO used to control backlight
++
++
++Name: i2c-bcm2708
++Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus.
++Load: dtoverlay=i2c-bcm2708
++Params: <None>
++
++
++Name: i2c-gpio
++Info: Adds support for software i2c controller on gpio pins
++Load: dtoverlay=i2c-gpio,<param>=<val>
++Params: i2c_gpio_sda GPIO used for I2C data (default "23")
++
++ i2c_gpio_scl GPIO used for I2C clock (default "24")
++
++ i2c_gpio_delay_us Clock delay in microseconds
++ (default "2" = ~100kHz)
++
++ bus Set to a unique, non-zero value if wanting
++ multiple i2c-gpio busses. If set, will be used
++ as the preferred bus number (/dev/i2c-<n>). If
++ not set, the default value is 0, but the bus
++ number will be dynamically assigned - probably
++ 3.
++
++
++Name: i2c-mux
++Info: Adds support for a number of I2C bus multiplexers on i2c_arm
++Load: dtoverlay=i2c-mux,<param>=<val>
++Params: pca9542 Select the NXP PCA9542 device
++
++ pca9545 Select the NXP PCA9545 device
++
++ pca9548 Select the NXP PCA9548 device
++
++ addr Change I2C address of the device (default 0x70)
++
++
++[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
++
++
++Name: i2c-pwm-pca9685a
++Info: Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
++Load: dtoverlay=i2c-pwm-pca9685a,<param>=<val>
++Params: addr I2C address of PCA9685A (default 0x40)
++
++
++Name: i2c-rtc
++Info: Adds support for a number of I2C Real Time Clock devices
++Load: dtoverlay=i2c-rtc,<param>=<val>
++Params: abx80x Select one of the ABx80x family:
++ AB0801, AB0803, AB0804, AB0805,
++ AB1801, AB1803, AB1804, AB1805
++
++ ds1307 Select the DS1307 device
++
++ ds1339 Select the DS1339 device
++
++ ds3231 Select the DS3231 device
++
++ m41t62 Select the M41T62 device
++
++ mcp7940x Select the MCP7940x device
++
++ mcp7941x Select the MCP7941x device
++
++ pcf2127 Select the PCF2127 device
++
++ pcf8523 Select the PCF8523 device
++
++ pcf8563 Select the PCF8563 device
++
++ trickle-diode-type Diode type for trickle charge - "standard" or
++ "schottky" (ABx80x only)
++
++ trickle-resistor-ohms Resistor value for trickle charge (DS1339,
++ ABx80x)
++
++ wakeup-source Specify that the RTC can be used as a wakeup
++ source
++
++
++Name: i2c-rtc-gpio
++Info: Adds support for a number of I2C Real Time Clock devices
++ using the software i2c controller
++Load: dtoverlay=i2c-rtc-gpio,<param>=<val>
++Params: abx80x Select one of the ABx80x family:
++ AB0801, AB0803, AB0804, AB0805,
++ AB1801, AB1803, AB1804, AB1805
++
++ ds1307 Select the DS1307 device
++
++ ds1339 Select the DS1339 device
++
++ ds3231 Select the DS3231 device
++
++ mcp7940x Select the MCP7940x device
++
++ mcp7941x Select the MCP7941x device
++
++ pcf2127 Select the PCF2127 device
++
++ pcf8523 Select the PCF8523 device
++
++ pcf8563 Select the PCF8563 device
++
++ trickle-diode-type Diode type for trickle charge - "standard" or
++ "schottky" (ABx80x only)
++
++ trickle-resistor-ohms Resistor value for trickle charge (DS1339,
++ ABx80x)
++
++ wakeup-source Specify that the RTC can be used as a wakeup
++ source
++
++ i2c_gpio_sda GPIO used for I2C data (default "23")
++
++ i2c_gpio_scl GPIO used for I2C clock (default "24")
++
++ i2c_gpio_delay_us Clock delay in microseconds
++ (default "2" = ~100kHz)
++
++
++Name: i2c-sensor
++Info: Adds support for a number of I2C barometric pressure and temperature
++ sensors on i2c_arm
++Load: dtoverlay=i2c-sensor,<param>=<val>
++Params: addr Set the address for the BME280, BMP280, DS1621,
++ HDC100X, LM75, SHT3x or TMP102
++
++ bme280 Select the Bosch Sensortronic BME280
++ Valid addresses 0x76-0x77, default 0x76
++
++ bmp085 Select the Bosch Sensortronic BMP085
++
++ bmp180 Select the Bosch Sensortronic BMP180
++
++ bmp280 Select the Bosch Sensortronic BMP280
++ Valid addresses 0x76-0x77, default 0x76
++
++ ds1621 Select the Dallas Semiconductors DS1621 temp
++ sensor. Valid addresses 0x48-0x4f, default 0x48
++
++ hdc100x Select the Texas Instruments HDC100x temp sensor
++ Valid addresses 0x40-0x43, default 0x40
++
++ htu21 Select the HTU21 temperature and humidity sensor
++
++ lm75 Select the Maxim LM75 temperature sensor
++ Valid addresses 0x48-0x4f, default 0x4f
++
++ lm75addr Deprecated - use addr parameter instead
++
++ sht3x Select the Sensiron SHT3x temperature and
++ humidity sensor. Valid addresses 0x44-0x45,
++ default 0x44
++
++ si7020 Select the Silicon Labs Si7013/20/21 humidity/
++ temperature sensor
++
++ tmp102 Select the Texas Instruments TMP102 temp sensor
++ Valid addresses 0x48-0x4b, default 0x48
++
++ tsl4531 Select the AMS TSL4531 digital ambient light
++ sensor
++
++ veml6070 Select the Vishay VEML6070 ultraviolet light
++ sensor
++
++
++Name: i2c0-bcm2708
++Info: Change i2c0 pin usage. Not all pin combinations are usable on all
++ platforms - platforms other then Compute Modules can only use this
++ to disable transaction combining.
++Load: dtoverlay=i2c0-bcm2708,<param>=<val>
++Params: sda0_pin GPIO pin for SDA0 (deprecated - use pins_*)
++ scl0_pin GPIO pin for SCL0 (deprecated - use pins_*)
++ pins_0_1 Use pins 0 and 1 (default)
++ pins_28_29 Use pins 28 and 29
++ pins_44_45 Use pins 44 and 45
++ pins_46_47 Use pins 46 and 47
++ combine Allow transactions to be combined (default
++ "yes")
++
++
++Name: i2c1-bcm2708
++Info: Change i2c1 pin usage. Not all pin combinations are usable on all
++ platforms - platforms other then Compute Modules can only use this
++ to disable transaction combining.
++Info: Enable the i2c_bcm2708 driver for the i2c1 bus
++Load: dtoverlay=i2c1-bcm2708,<param>=<val>
++Params: sda1_pin GPIO pin for SDA1 (2 or 44 - default 2)
++ scl1_pin GPIO pin for SCL1 (3 or 45 - default 3)
++ pin_func Alternative pin function (4 (alt0), 6 (alt2) -
++ default 4)
++ combine Allow transactions to be combined (default
++ "yes")
++
++
++Name: i2s-gpio28-31
++Info: move I2S function block to GPIO 28 to 31
++Load: dtoverlay=i2s-gpio28-31
++Params: <None>
++
++
++Name: iqaudio-dac
++Info: Configures the IQaudio DAC audio card
++Load: dtoverlay=iqaudio-dac,<param>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=iqaudio-dac,24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24db_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++
++
++Name: iqaudio-dacplus
++Info: Configures the IQaudio DAC+ audio card
++Load: dtoverlay=iqaudio-dacplus,<param>=<val>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=iqaudio-dacplus,24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24db_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++ auto_mute_amp If specified, unmute/mute the IQaudIO amp when
++ starting/stopping audio playback.
++ unmute_amp If specified, unmute the IQaudIO amp once when
++ the DAC driver module loads.
++
++
++Name: iqaudio-digi-wm8804-audio
++Info: Configures the IQAudIO Digi WM8804 audio card
++Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
++Params: card_name Override the default, "IQAudIODigi", card name.
++ dai_name Override the default, "IQAudIO Digi", dai name.
++ dai_stream_name Override the default, "IQAudIO Digi HiFi",
++ dai stream name.
++
++
++Name: jedec-spi-nor
++Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
++ "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
++Load: dtoverlay=jedec-spi-nor,<param>=<val>
++Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
++ flash-fastr-spi<n>-<m> Enables flash device with fast read capability
++ on SPI<n>, CS#<m>.
++
++
++Name: justboom-dac
++Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
++ cards
++Load: dtoverlay=justboom-dac,<param>=<val>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=justboom-dac,24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24dB_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++
++
++Name: justboom-digi
++Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
++Load: dtoverlay=justboom-digi
++Params: <None>
++
++
++Name: lirc-rpi
++Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
++ Consult the module documentation for more details.
++Load: dtoverlay=lirc-rpi,<param>=<val>
++Params: gpio_out_pin GPIO for output (default "17")
++
++ gpio_in_pin GPIO for input (default "18")
++
++ gpio_in_pull Pull up/down/off on the input pin
++ (default "down")
++
++ sense Override the IR receive auto-detection logic:
++ "0" = force active-high
++ "1" = force active-low
++ "-1" = use auto-detection
++ (default "-1")
++
++ softcarrier Turn the software carrier "on" or "off"
++ (default "on")
++
++ invert "on" = invert the output pin (default "off")
++
++ debug "on" = enable additional debug messages
++ (default "off")
++
++
++Name: ltc294x
++Info: Adds support for the ltc294x family of battery gauges
++Load: dtoverlay=ltc294x,<param>=<val>
++Params: ltc2941 Select the ltc2941 device
++
++ ltc2942 Select the ltc2942 device
++
++ ltc2943 Select the ltc2943 device
++
++ ltc2944 Select the ltc2944 device
++
++ resistor-sense The sense resistor value in milli-ohms.
++ Can be a 32-bit negative value when the battery
++ has been connected to the wrong end of the
++ resistor.
++
++ prescaler-exponent Range and accuracy of the gauge. The value is
++ programmed into the chip only if it differs
++ from the current setting.
++ For LTC2941 only:
++ - Default value is 128
++ - the exponent is in the range 0-7 (default 7)
++ See the datasheet for more information.
++
++
++Name: mbed-dac
++Info: Configures the mbed AudioCODEC (TLV320AIC23B)
++Load: dtoverlay=mbed-dac
++Params: <None>
++
++
++Name: mcp23017
++Info: Configures the MCP23017 I2C GPIO expander
++Load: dtoverlay=mcp23017,<param>=<val>
++Params: gpiopin Gpio pin connected to the INTA output of the
++ MCP23017 (default: 4)
++
++ addr I2C address of the MCP23017 (default: 0x20)
++
++
++Name: mcp23s17
++Info: Configures the MCP23S08/17 SPI GPIO expanders.
++ If devices are present on SPI1 or SPI2, those interfaces must be enabled
++ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
++ If interrupts are enabled for a device on a given CS# on a SPI bus, that
++ device must be the only one present on that SPI bus/CS#.
++Load: dtoverlay=mcp23s17,<param>=<val>
++Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
++ devices present on SPI<n>, CS#<m>
++
++ s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
++ devices present on SPI<n>, CS#<m>
++
++ s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
++ MCP23S08 device on SPI<n>, CS#<m>, specifies
++ the GPIO pin to which INT output of MCP23S08
++ is connected.
++
++ s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
++ single MCP23S17 device on SPI<n>, CS#<m>,
++ specifies the GPIO pin to which either INTA
++ or INTB output of MCP23S17 is connected.
++
++
++Name: mcp2515-can0
++Info: Configures the MCP2515 CAN controller on spi0.0
++Load: dtoverlay=mcp2515-can0,<param>=<val>
++Params: oscillator Clock frequency for the CAN controller (Hz)
++
++ spimaxfrequency Maximum SPI frequence (Hz)
++
++ interrupt GPIO for interrupt signal
++
++
++Name: mcp2515-can1
++Info: Configures the MCP2515 CAN controller on spi0.1
++Load: dtoverlay=mcp2515-can1,<param>=<val>
++Params: oscillator Clock frequency for the CAN controller (Hz)
++
++ spimaxfrequency Maximum SPI frequence (Hz)
++
++ interrupt GPIO for interrupt signal
++
++
++Name: mcp3008
++Info: Configures MCP3008 A/D converters
++ For devices on spi1 or spi2, the interfaces should be enabled
++ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
++Load: dtoverlay=mcp3008,<param>[=<val>]
++Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
++ spi<n>-<m>-speed integer, set the spi bus speed for this device
++
++
++Name: mcp3202
++Info: Configures MCP3202 A/D converters
++ For devices on spi1 or spi2, the interfaces should be enabled
++ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
++Load: dtoverlay=mcp3202,<param>[=<val>]
++Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
++ spi<n>-<m>-speed integer, set the spi bus speed for this device
++
++
++Name: media-center
++Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
++Load: dtoverlay=media-center,<param>=<val>
++Params: speed Display SPI bus speed
++ rotate Display rotation {0,90,180,270}
++ fps Delay between frame updates
++ xohms Touchpanel sensitivity (X-plate resistance)
++ swapxy Swap x and y axis
++ backlight Change backlight GPIO pin {e.g. 12, 18}
++ gpio_out_pin GPIO for output (default "17")
++ gpio_in_pin GPIO for input (default "18")
++ gpio_in_pull Pull up/down/off on the input pin
++ (default "down")
++ sense Override the IR receive auto-detection logic:
++ "0" = force active-high
++ "1" = force active-low
++ "-1" = use auto-detection
++ (default "-1")
++ softcarrier Turn the software carrier "on" or "off"
++ (default "on")
++ invert "on" = invert the output pin (default "off")
++ debug "on" = enable additional debug messages
++ (default "off")
++
++
++Name: midi-uart0
++Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets
++ 31.25kbaud, the frequency required for MIDI
++Load: dtoverlay=midi-uart0
++Params: <None>
++
++
++Name: midi-uart1
++Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
++ 31.25kbaud, the frequency required for MIDI
++Load: dtoverlay=midi-uart1
++Params: <None>
++
++
++Name: mmc
++Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
++Load: dtoverlay=mmc,<param>=<val>
++Params: overclock_50 Clock (in MHz) to use when the MMC framework
++ requests 50MHz
++
++
++Name: mpu6050
++Info: Overlay for i2c connected mpu6050 imu
++Load: dtoverlay=mpu6050,<param>=<val>
++Params: interrupt GPIO pin for interrupt (default 4)
++
++
++Name: mz61581
++Info: MZ61581 display by Tontec
++Load: dtoverlay=mz61581,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ txbuflen Transmit buffer length (default 32768)
++
++ debug Debug output level {0-7}
++
++ xohms Touchpanel sensitivity (X-plate resistance)
++
++
++Name: papirus
++Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT)
++Load: dtoverlay=papirus,<param>=<val>
++Params: panel Display panel (required):
++ 1.44": e1144cs021
++ 2.0": e2200cs021
++ 2.7": e2271cs021
++
++ speed Display SPI bus speed
++
++
++[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
++
++
++[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
++
++
++[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
++
++
++Name: pi3-act-led
++Info: Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
++ from the VPU. There is a special driver for this with a separate DT
++ node, which has the unfortunate consequence of breaking the
++ act_led_gpio and act_led_activelow dtparams.
++ This overlay changes the GPIO controller back to the standard one and
++ restores the dtparams.
++Load: dtoverlay=pi3-act-led,<param>=<val>
++Params: activelow Set to "on" to invert the sense of the LED
++ (default "off")
++
++ gpio Set which GPIO to use for the activity LED
++ (in case you want to connect it to an external
++ device)
++ REQUIRED
++
++
++Name: pi3-disable-bt
++Info: Disable Pi3 Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15
++ N.B. To disable the systemd service that initialises the modem so it
++ doesn't use the UART, use 'sudo systemctl disable hciuart'.
++Load: dtoverlay=pi3-disable-bt
++Params: <None>
++
++
++Name: pi3-disable-wifi
++Info: Disable Pi3 onboard WiFi
++Load: dtoverlay=pi3-disable-wifi
++Params: <None>
++
++
++Name: pi3-miniuart-bt
++Info: Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
++ UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
++ usable baudrate.
++ N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
++ and replace ttyAMA0 with ttyS0, unless you have a system with udev rules
++ that create /dev/serial0 and /dev/serial1, in which case use
++ /dev/serial1 instead because it will always be correct. Furthermore,
++ you must also set core_freq=250 in config.txt or the miniuart will not
++ work.
++Load: dtoverlay=pi3-miniuart-bt
++Params: <None>
++
++
++Name: pibell
++Info: Configures the pibell audio card.
++Load: dtoverlay=pibell,<param>=<val>
++Params: alsaname Set the name as it appears in ALSA (default
++ "PiBell")
++
++
++Name: piscreen
++Info: PiScreen display by OzzMaker.com
++Load: dtoverlay=piscreen,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++ xohms Touchpanel sensitivity (X-plate resistance)
++
++
++Name: piscreen2r
++Info: PiScreen 2 with resistive TP display by OzzMaker.com
++Load: dtoverlay=piscreen2r,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++ xohms Touchpanel sensitivity (X-plate resistance)
++
++
++Name: pisound
++Info: Configures the Blokas Labs pisound card
++Load: dtoverlay=pisound
++Params: <None>
++
++
++Name: pitft22
++Info: Adafruit PiTFT 2.2" screen
++Load: dtoverlay=pitft22,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++
++Name: pitft28-capacitive
++Info: Adafruit PiTFT 2.8" capacitive touch screen
++Load: dtoverlay=pitft28-capacitive,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++ touch-sizex Touchscreen size x (default 240)
++
++ touch-sizey Touchscreen size y (default 320)
++
++ touch-invx Touchscreen inverted x axis
++
++ touch-invy Touchscreen inverted y axis
++
++ touch-swapxy Touchscreen swapped x y axis
++
++
++Name: pitft28-resistive
++Info: Adafruit PiTFT 2.8" resistive touch screen
++Load: dtoverlay=pitft28-resistive,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++
++Name: pitft35-resistive
++Info: Adafruit PiTFT 3.5" resistive touch screen
++Load: dtoverlay=pitft35-resistive,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++
++Name: pps-gpio
++Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
++Load: dtoverlay=pps-gpio,<param>=<val>
++Params: gpiopin Input GPIO (default "18")
++ assert_falling_edge When present, assert is indicated by a falling
++ edge, rather than by a rising edge (default
++ off)
++ capture_clear Generate clear events on the trailing edge
++ (default off)
++
++
++Name: pwm
++Info: Configures a single PWM channel
++ Legal pin,function combinations for each channel:
++ PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
++ PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
++ N.B.:
++ 1) Pin 18 is the only one available on all platforms, and
++ it is the one used by the I2S audio interface.
++ Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
++ 2) The onboard analogue audio output uses both PWM channels.
++ 3) So be careful mixing audio and PWM.
++ 4) Currently the clock must have been enabled and configured
++ by other means.
++Load: dtoverlay=pwm,<param>=<val>
++Params: pin Output pin (default 18) - see table
++ func Pin function (default 2 = Alt5) - see above
++ clock PWM clock frequency (informational)
++
++
++Name: pwm-2chan
++Info: Configures both PWM channels
++ Legal pin,function combinations for each channel:
++ PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
++ PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
++ N.B.:
++ 1) Pin 18 is the only one available on all platforms, and
++ it is the one used by the I2S audio interface.
++ Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
++ 2) The onboard analogue audio output uses both PWM channels.
++ 3) So be careful mixing audio and PWM.
++ 4) Currently the clock must have been enabled and configured
++ by other means.
++Load: dtoverlay=pwm-2chan,<param>=<val>
++Params: pin Output pin (default 18) - see table
++ pin2 Output pin for other channel (default 19)
++ func Pin function (default 2 = Alt5) - see above
++ func2 Function for pin2 (default 2 = Alt5)
++ clock PWM clock frequency (informational)
++
++
++Name: pwm-ir-tx
++Info: Use GPIO pin as pwm-assisted infrared transmitter output.
++ This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use
++ of PWM0 to reduce the CPU load during transmission compared to
++ gpio-ir-tx which uses bit-banging.
++ Legal pin,function combinations are:
++ 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
++Load: dtoverlay=pwm-ir-tx,<param>=<val>
++Params: gpio_pin Output GPIO (default 18)
++
++ func Pin function (default 2 = Alt5)
++
++
++Name: qca7000
++Info: I2SE's Evaluation Board for PLC Stamp micro
++Load: dtoverlay=qca7000,<param>=<val>
++Params: int_pin GPIO pin for interrupt signal (default 23)
++
++ speed SPI bus speed (default 12 MHz)
++
++
++Name: rotary-encoder
++Info: Overlay for GPIO connected rotary encoder.
++Load: dtoverlay=rotary-encoder,<param>=<val>
++Params: pin_a GPIO connected to rotary encoder channel A
++ (default 4).
++ pin_b GPIO connected to rotary encoder channel B
++ (default 17).
++ relative_axis register a relative axis rather than an
++ absolute one. Relative axis will only
++ generate +1/-1 events on the input device,
++ hence no steps need to be passed.
++ linux_axis the input subsystem axis to map to this
++ rotary encoder. Defaults to 0 (ABS_X / REL_X)
++ rollover Automatic rollover when the rotary value
++ becomes greater than the specified steps or
++ smaller than 0. For absolute axis only.
++ steps-per-period Number of steps (stable states) per period.
++ The values have the following meaning:
++ 1: Full-period mode (default)
++ 2: Half-period mode
++ 4: Quarter-period mode
++ steps Number of steps in a full turnaround of the
++ encoder. Only relevant for absolute axis.
++ Defaults to 24 which is a typical value for
++ such devices.
++ wakeup Boolean, rotary encoder can wake up the
++ system.
++ encoding String, the method used to encode steps.
++ Supported are "gray" (the default and more
++ common) and "binary".
++
++
++Name: rpi-backlight
++Info: Raspberry Pi official display backlight driver
++Load: dtoverlay=rpi-backlight
++Params: <None>
++
++
++Name: rpi-cirrus-wm5102
++Info: Configures the Cirrus Logic Audio Card
++Load: dtoverlay=rpi-cirrus-wm5102
++Params: <None>
++
++
++Name: rpi-dac
++Info: Configures the RPi DAC audio card
++Load: dtoverlay=rpi-dac
++Params: <None>
++
++
++Name: rpi-display
++Info: RPi-Display - 2.8" Touch Display by Watterott
++Load: dtoverlay=rpi-display,<param>=<val>
++Params: speed Display SPI bus speed
++ rotate Display rotation {0,90,180,270}
++ fps Delay between frame updates
++ debug Debug output level {0-7}
++ xohms Touchpanel sensitivity (X-plate resistance)
++ swapxy Swap x and y axis
++ backlight Change backlight GPIO pin {e.g. 12, 18}
++
++
++Name: rpi-ft5406
++Info: Official Raspberry Pi display touchscreen
++Load: dtoverlay=rpi-ft5406,<param>=<val>
++Params: touchscreen-size-x Touchscreen X resolution (default 800)
++ touchscreen-size-y Touchscreen Y resolution (default 600);
++ touchscreen-inverted-x Invert touchscreen X coordinates (default 0);
++ touchscreen-inverted-y Invert touchscreen Y coordinates (default 0);
++ touchscreen-swapped-x-y Swap X and Y cordinates (default 0);
++
++
++Name: rpi-proto
++Info: Configures the RPi Proto audio card
++Load: dtoverlay=rpi-proto
++Params: <None>
++
++
++Name: rpi-sense
++Info: Raspberry Pi Sense HAT
++Load: dtoverlay=rpi-sense
++Params: <None>
++
++
++Name: rpi-tv
++Info: Raspberry Pi TV HAT
++Load: dtoverlay=rpi-tv
++Params: <None>
++
++
++Name: rra-digidac1-wm8741-audio
++Info: Configures the Red Rocks Audio DigiDAC1 soundcard
++Load: dtoverlay=rra-digidac1-wm8741-audio
++Params: <None>
++
++
++Name: sc16is750-i2c
++Info: Overlay for the NXP SC16IS750 UART with I2C Interface
++ Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
++ select another address, please refer to table 10 in reference manual.
++Load: dtoverlay=sc16is750-i2c,<param>=<val>
++Params: int_pin GPIO used for IRQ (default 24)
++ addr Address (default 0x48)
++
++
++Name: sc16is752-i2c
++Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface
++ Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
++ select another address, please refer to table 10 in reference manual.
++Load: dtoverlay=sc16is752-i2c,<param>=<val>
++Params: int_pin GPIO used for IRQ (default 24)
++ addr Address (default 0x48)
++ xtal On-board crystal frequency (default 14745600)
++
++
++Name: sc16is752-spi1
++Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
++ Enables the chip on SPI1.
++ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
++ A+, B+, Zero and PI2 B; as well as the Compute Module.
++
++Load: dtoverlay=sc16is752-spi1,<param>=<val>
++Params: int_pin GPIO used for IRQ (default 24)
++
++
++Name: sdhost
++Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
++ N.B. This overlay is designed for situations where the mmc driver is
++ the default, so it disables the other (mmc) interface - this will kill
++ WiFi on a Pi3. If this isn't what you want, either use the sdtweak
++ overlay or the new sd_* dtparams of the base DTBs.
++Load: dtoverlay=sdhost,<param>=<val>
++Params: overclock_50 Clock (in MHz) to use when the MMC framework
++ requests 50MHz
++
++ force_pio Disable DMA support (default off)
++
++ pio_limit Number of blocks above which to use DMA
++ (default 1)
++
++ debug Enable debug output (default off)
++
++
++Name: sdio
++Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
++ and enables SDIO via GPIOs 22-27.
++Load: dtoverlay=sdio,<param>=<val>
++Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
++ framework requests 50MHz
++
++ poll_once Disable SDIO-device polling every second
++ (default on: polling once at boot-time)
++
++ bus_width Set the SDIO host bus width (default 4 bits)
++
++
++Name: sdio-1bit
++Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
++ and enables 1-bit SDIO via GPIOs 22-25.
++Load: dtoverlay=sdio-1bit,<param>=<val>
++Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
++ framework requests 50MHz
++
++ poll_once Disable SDIO-device polling every second
++ (default on: polling once at boot-time)
++
++
++Name: sdtweak
++Info: Tunes the bcm2835-sdhost SD/MMC driver
++ N.B. This functionality is now available via the sd_* dtparams in the
++ base DTB.
++Load: dtoverlay=sdtweak,<param>=<val>
++Params: overclock_50 Clock (in MHz) to use when the MMC framework
++ requests 50MHz
++
++ force_pio Disable DMA support (default off)
++
++ pio_limit Number of blocks above which to use DMA
++ (default 1)
++
++ debug Enable debug output (default off)
++
++
++Name: smi
++Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
++Load: dtoverlay=smi
++Params: <None>
++
++
++Name: smi-dev
++Info: Enables the userspace interface for the SMI driver
++Load: dtoverlay=smi-dev
++Params: <None>
++
++
++Name: smi-nand
++Info: Enables access to NAND flash via the SMI interface
++Load: dtoverlay=smi-nand
++Params: <None>
++
++
++Name: spi-gpio35-39
++Info: Move SPI function block to GPIO 35 to 39
++Load: dtoverlay=spi-gpio35-39
++Params: <None>
++
++
++Name: spi-rtc
++Info: Adds support for a number of SPI Real Time Clock devices
++Load: dtoverlay=spi-rtc,<param>=<val>
++Params: pcf2123 Select the PCF2123 device
++
++
++Name: spi0-cs
++Info: Allows the (software) CS pins for SPI0 to be changed
++Load: dtoverlay=spi0-cs,<param>=<val>
++Params: cs0_pin GPIO pin for CS0 (default 8)
++ cs1_pin GPIO pin for CS1 (default 7)
++
++
++Name: spi0-hw-cs
++Info: Re-enables hardware CS/CE (chip selects) for SPI0
++Load: dtoverlay=spi0-hw-cs
++Params: <None>
++
++
++Name: spi1-1cs
++Info: Enables spi1 with a single chip select (CS) line and associated spidev
++ dev node. The gpio pin number for the CS line and spidev device node
++ creation are configurable.
++ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
++ A+, B+, Zero and PI2 B; as well as the Compute Module.
++Load: dtoverlay=spi1-1cs,<param>=<val>
++Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
++ cs0_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev1.0 (default
++ is 'okay' or enabled).
++
++
++Name: spi1-2cs
++Info: Enables spi1 with two chip select (CS) lines and associated spidev
++ dev nodes. The gpio pin numbers for the CS lines and spidev device node
++ creation are configurable.
++ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
++ A+, B+, Zero and PI2 B; as well as the Compute Module.
++Load: dtoverlay=spi1-2cs,<param>=<val>
++Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
++ cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
++ cs0_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev1.0 (default
++ is 'okay' or enabled).
++ cs1_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev1.1 (default
++ is 'okay' or enabled).
++
++
++Name: spi1-3cs
++Info: Enables spi1 with three chip select (CS) lines and associated spidev
++ dev nodes. The gpio pin numbers for the CS lines and spidev device node
++ creation are configurable.
++ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
++ A+, B+, Zero and PI2 B; as well as the Compute Module.
++Load: dtoverlay=spi1-3cs,<param>=<val>
++Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
++ cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
++ cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
++ cs0_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev1.0 (default
++ is 'okay' or enabled).
++ cs1_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev1.1 (default
++ is 'okay' or enabled).
++ cs2_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev1.2 (default
++ is 'okay' or enabled).
++
++
++Name: spi2-1cs
++Info: Enables spi2 with a single chip select (CS) line and associated spidev
++ dev node. The gpio pin number for the CS line and spidev device node
++ creation are configurable.
++ N.B.: spi2 is only accessible with the Compute Module.
++Load: dtoverlay=spi2-1cs,<param>=<val>
++Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
++ cs0_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev2.0 (default
++ is 'okay' or enabled).
++
++
++Name: spi2-2cs
++Info: Enables spi2 with two chip select (CS) lines and associated spidev
++ dev nodes. The gpio pin numbers for the CS lines and spidev device node
++ creation are configurable.
++ N.B.: spi2 is only accessible with the Compute Module.
++Load: dtoverlay=spi2-2cs,<param>=<val>
++Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
++ cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
++ cs0_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev2.0 (default
++ is 'okay' or enabled).
++ cs1_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev2.1 (default
++ is 'okay' or enabled).
++
++
++Name: spi2-3cs
++Info: Enables spi2 with three chip select (CS) lines and associated spidev
++ dev nodes. The gpio pin numbers for the CS lines and spidev device node
++ creation are configurable.
++ N.B.: spi2 is only accessible with the Compute Module.
++Load: dtoverlay=spi2-3cs,<param>=<val>
++Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
++ cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
++ cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
++ cs0_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev2.0 (default
++ is 'okay' or enabled).
++ cs1_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev2.1 (default
++ is 'okay' or enabled).
++ cs2_spidev Set to 'disabled' to stop the creation of a
++ userspace device node /dev/spidev2.2 (default
++ is 'okay' or enabled).
++
++
++Name: superaudioboard
++Info: Configures the SuperAudioBoard sound card
++Load: dtoverlay=superaudioboard,<param>=<val>
++Params: gpiopin GPIO pin for codec reset
++
++
++Name: sx150x
++Info: Configures the Semtech SX150X I2C GPIO expanders.
++Load: dtoverlay=sx150x,<param>=<val>
++Params: sx150<x>-<n>-<m> Enables SX150X device on I2C#<n> with slave
++ address <m>. <x> may be 1-9. <n> may be 0 or 1.
++ Permissible values of <m> (which is denoted in
++ hex) depend on the device variant. For SX1501,
++ SX1502, SX1504 and SX1505, <m> may be 20 or 21.
++ For SX1503 and SX1506, <m> may be 20. For
++ SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
++ For SX1508, <m> may be 20, 21, 22 or 23.
++
++ sx150<x>-<n>-<m>-int-gpio
++ Integer, enables interrupts on SX150X device on
++ I2C#<n> with slave address <m>, specifies
++ the GPIO pin to which NINT output of SX150X is
++ connected.
++
++
++Name: tinylcd35
++Info: 3.5" Color TFT Display by www.tinylcd.com
++ Options: Touch, RTC, keypad
++Load: dtoverlay=tinylcd35,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++ touch Enable touch panel
++
++ touchgpio Touch controller IRQ GPIO
++
++ xohms Touchpanel: Resistance of X-plate in ohms
++
++ rtc-pcf PCF8563 Real Time Clock
++
++ rtc-ds DS1307 Real Time Clock
++
++ keypad Enable keypad
++
++ Examples:
++ Display with touchpanel, PCF8563 RTC and keypad:
++ dtoverlay=tinylcd35,touch,rtc-pcf,keypad
++ Old touch display:
++ dtoverlay=tinylcd35,touch,touchgpio=3
++
++
++Name: uart0
++Info: Change the pin usage of uart0
++Load: dtoverlay=uart0,<param>=<val>
++Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14)
++
++ rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15)
++
++ pin_func Alternative pin function - 4(Alt0) for 14&15,
++ 7(Alt3) for 32&33, 6(Alt2) for 36&37
++
++
++Name: uart1
++Info: Change the pin usage of uart1
++Load: dtoverlay=uart1,<param>=<val>
++Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14)
++
++ rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
++
++
++Name: upstream
++Info: Allow usage of downstream .dtb with upstream kernel. Comprises
++ vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays.
++Load: dtoverlay=upstream
++Params: <None>
++
++
++Name: upstream-aux-interrupt
++Info: Allow usage of downstream .dtb with upstream kernel by binding AUX
++ devices directly to the shared AUX interrupt line. One of the parts
++ of the 'upstream' overlay
++Load: dtoverlay=upstream-aux-interrupt
++Params: <None>
++
++
++Name: vc4-fkms-v3d
++Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
++ display stack.
++Load: dtoverlay=vc4-fkms-v3d,<param>
++Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
++ cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
++ cma-128 CMA is 128MB, 128MB-aligned
++ cma-96 CMA is 96MB, 128MB-aligned
++ cma-64 CMA is 64MB, 64MB-aligned
++
++
++Name: vc4-kms-v3d
++Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
++ booting to GUI while this overlay is in use will cause interesting
++ lockups.
++Load: dtoverlay=vc4-kms-v3d,<param>
++Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
++ cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
++ cma-128 CMA is 128MB, 128MB-aligned
++ cma-96 CMA is 96MB, 128MB-aligned
++ cma-64 CMA is 64MB, 64MB-aligned
++
++
++Name: vga666
++Info: Overlay for the Fen Logic VGA666 board
++ This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
++ after the kernel has started.
++Load: dtoverlay=vga666
++Params: <None>
++
++
++Name: w1-gpio
++Info: Configures the w1-gpio Onewire interface module.
++ Use this overlay if you *don't* need a GPIO to drive an external pullup.
++Load: dtoverlay=w1-gpio,<param>=<val>
++Params: gpiopin GPIO for I/O (default "4")
++
++ pullup Non-zero, "on", or "y" to enable the parasitic
++ power (2-wire, power-on-data) feature
++
++
++Name: w1-gpio-pullup
++Info: Configures the w1-gpio Onewire interface module.
++ Use this overlay if you *do* need a GPIO to drive an external pullup.
++Load: dtoverlay=w1-gpio-pullup,<param>=<val>
++Params: gpiopin GPIO for I/O (default "4")
++
++ pullup Non-zero, "on", or "y" to enable the parasitic
++ power (2-wire, power-on-data) feature
++
++ extpullup GPIO for external pullup (default "5")
++
++
++Name: wittypi
++Info: Configures the wittypi RTC module.
++Load: dtoverlay=wittypi,<param>=<val>
++Params: led_gpio GPIO for LED (default "17")
++ led_trigger Choose which activity the LED tracks (default
++ "default-on")
++
++
++Troubleshooting
++===============
++
++If you are experiencing problems that you think are DT-related, enable DT
++diagnostic output by adding this to /boot/config.txt:
++
++ dtdebug=on
++
++and rebooting. Then run:
++
++ sudo vcdbg log msg
++
++and look for relevant messages.
++
++Further reading
++===============
++
++This is only meant to be a quick introduction to the subject of Device Tree on
++Raspberry Pi. There is a more complete explanation here:
++
++http://www.raspberrypi.org/documentation/configuration/device-tree.md
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
+@@ -0,0 +1,40 @@
++// Definitions for ADAU1977 ADC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c>;
++
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ adau1977: codec at 11 {
++ compatible = "adi,adau1977";
++ reg = <0x11>;
++ reset-gpios = <&gpio 5 0>;
++ AVDD-supply = <&vdd_3v3_reg>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "adi,adau1977-adc";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
+@@ -0,0 +1,52 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ adau7002_codec: adau7002-codec {
++ #sound-dai-cells = <0>;
++ compatible = "adi,adau7002";
++/* IOVDD-supply = <&supply>;*/
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ sound_overlay: __overlay__ {
++ compatible = "simple-audio-card";
++ simple-audio-card,format = "i2s";
++ simple-audio-card,name = "adau7002";
++ simple-audio-card,bitclock-slave = <&dailink0_slave>;
++ simple-audio-card,frame-slave = <&dailink0_slave>;
++ simple-audio-card,widgets =
++ "Microphone", "Microphone Jack";
++ simple-audio-card,routing =
++ "PDM_DAT", "Microphone Jack";
++ status = "okay";
++ simple-audio-card,cpu {
++ sound-dai = <&i2s>;
++ };
++ dailink0_slave: simple-audio-card,codec {
++ sound-dai = <&adau7002_codec>;
++ };
++ };
++ };
++
++
++ __overrides__ {
++ card-name = <&sound_overlay>,"simple-audio-card,name";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
+@@ -0,0 +1,98 @@
++/*
++ * 2016 - Erik Sejr
++ */
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++ /* ----------- ADS1015 ------------ */
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++ ads1015: ads1015 {
++ compatible = "ti,ads1015";
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x48>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target-path = "i2c_arm/ads1015";
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_a: channel_a {
++ reg = <4>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_b: channel_b {
++ reg = <5>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment at 3 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_c: channel_c {
++ reg = <6>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment at 4 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_d: channel_d {
++ reg = <7>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ __overrides__ {
++ addr = <&ads1015>,"reg:0";
++ cha_enable = <0>,"=1";
++ cha_cfg = <&channel_a>,"reg:0";
++ cha_gain = <&channel_a>,"ti,gain:0";
++ cha_datarate = <&channel_a>,"ti,datarate:0";
++ chb_enable = <0>,"=2";
++ chb_cfg = <&channel_b>,"reg:0";
++ chb_gain = <&channel_b>,"ti,gain:0";
++ chb_datarate = <&channel_b>,"ti,datarate:0";
++ chc_enable = <0>,"=3";
++ chc_cfg = <&channel_c>,"reg:0";
++ chc_gain = <&channel_c>,"ti,gain:0";
++ chc_datarate = <&channel_c>,"ti,datarate:0";
++ chd_enable = <0>,"=4";
++ chd_cfg = <&channel_d>,"reg:0";
++ chd_gain = <&channel_d>,"ti,gain:0";
++ chd_datarate = <&channel_d>,"ti,datarate:0";
++ };
++
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
+@@ -0,0 +1,103 @@
++/*
++ * TI ADS1115 multi-channel ADC overlay
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ads1115: ads1115 {
++ compatible = "ti,ads1115";
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x48>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target-path = "i2c_arm/ads1115";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ channel_a: channel_a {
++ reg = <4>;
++ ti,gain = <1>;
++ ti,datarate = <7>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target-path = "i2c_arm/ads1115";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ channel_b: channel_b {
++ reg = <5>;
++ ti,gain = <1>;
++ ti,datarate = <7>;
++ };
++ };
++ };
++
++ fragment at 3 {
++ target-path = "i2c_arm/ads1115";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ channel_c: channel_c {
++ reg = <6>;
++ ti,gain = <1>;
++ ti,datarate = <7>;
++ };
++ };
++ };
++
++ fragment at 4 {
++ target-path = "i2c_arm/ads1115";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ channel_d: channel_d {
++ reg = <7>;
++ ti,gain = <1>;
++ ti,datarate = <7>;
++ };
++ };
++ };
++
++ __overrides__ {
++ addr = <&ads1115>,"reg:0";
++ cha_enable = <0>,"=1";
++ cha_cfg = <&channel_a>,"reg:0";
++ cha_gain = <&channel_a>,"ti,gain:0";
++ cha_datarate = <&channel_a>,"ti,datarate:0";
++ chb_enable = <0>,"=2";
++ chb_cfg = <&channel_b>,"reg:0";
++ chb_gain = <&channel_b>,"ti,gain:0";
++ chb_datarate = <&channel_b>,"ti,datarate:0";
++ chc_enable = <0>,"=3";
++ chc_cfg = <&channel_c>,"reg:0";
++ chc_gain = <&channel_c>,"ti,gain:0";
++ chc_datarate = <&channel_c>,"ti,datarate:0";
++ chd_enable = <0>,"=4";
++ chd_cfg = <&channel_d>,"reg:0";
++ chd_gain = <&channel_d>,"ti,gain:0";
++ chd_datarate = <&channel_d>,"ti,datarate:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
+@@ -0,0 +1,89 @@
++/*
++ * Generic Device Tree overlay for the ADS7846 touch controller
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ ads7846_pins: ads7846_pins {
++ brcm,pins = <255>; /* illegal default value */
++ brcm,function = <0>; /* in */
++ brcm,pull = <0>; /* none */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ads7846: ads7846 at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&ads7846_pins>;
++
++ spi-max-frequency = <2000000>;
++ interrupts = <255 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 255 0>;
++
++ /* driver defaults */
++ ti,x-min = /bits/ 16 <0>;
++ ti,y-min = /bits/ 16 <0>;
++ ti,x-max = /bits/ 16 <0x0FFF>;
++ ti,y-max = /bits/ 16 <0x0FFF>;
++ ti,pressure-min = /bits/ 16 <0>;
++ ti,pressure-max = /bits/ 16 <0xFFFF>;
++ ti,x-plate-ohms = /bits/ 16 <400>;
++ };
++ };
++ };
++ __overrides__ {
++ cs = <&ads7846>,"reg:0";
++ speed = <&ads7846>,"spi-max-frequency:0";
++ penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
++ <&ads7846>,"interrupts:0",
++ <&ads7846>,"pendown-gpio:4";
++ penirq_pull = <&ads7846_pins>,"brcm,pull:0";
++ swapxy = <&ads7846>,"ti,swap-xy?";
++ xmin = <&ads7846>,"ti,x-min;0";
++ ymin = <&ads7846>,"ti,y-min;0";
++ xmax = <&ads7846>,"ti,x-max;0";
++ ymax = <&ads7846>,"ti,y-max;0";
++ pmin = <&ads7846>,"ti,pressure-min;0";
++ pmax = <&ads7846>,"ti,pressure-max;0";
++ xohms = <&ads7846>,"ti,x-plate-ohms;0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
+@@ -0,0 +1,49 @@
++// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122 at 4c {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4c>;
++ AVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ CPVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ frag2: __overlay__ {
++ compatible = "iqaudio,iqaudio-dac";
++ card_name = "Akkordion";
++ dai_name = "IQaudIO DAC";
++ dai_stream_name = "IQaudIO DAC HiFi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
+@@ -0,0 +1,59 @@
++/*
++ * Definitions for Allo Boss DAC board
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/clocks";
++ __overlay__ {
++ boss_osc: boss_osc {
++ compatible = "allo,dac-clk";
++ #clock-cells = <0>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122 at 4d {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ clocks = <&boss_osc>;
++ reg = <0x4d>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&sound>;
++ boss_dac: __overlay__ {
++ compatible = "allo,boss-dac";
++ i2s-controller = <&i2s>;
++ mute-gpios = <&gpio 6 1>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
++ slave = <&boss_dac>,"allo,slave?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
+@@ -0,0 +1,44 @@
++// Definitions for Allo DigiOne
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804 at 3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ PVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ wlf,reset-gpio = <&gpio 17 0>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "allo,allo-digione";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ clock44-gpio = <&gpio 5 0>;
++ clock48-gpio = <&gpio 6 0>;
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
+@@ -0,0 +1,54 @@
++/*
++ * Definitions for Allo Piano DAC (2.0/2.1) boards
++ *
++ * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
++ * (left/right) and the other provides a subwoofer output, using DSP on the
++ * chip for digital high/low pass crossover.
++ * The initial support for this hardware, that doesn't require any codec driver
++ * modifications, uses only one DAC chip for stereo (left/right) output, the
++ * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5142 at 4c {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5142";
++ reg = <0x4c>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ piano_dac: __overlay__ {
++ compatible = "allo,piano-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain =
++ <&piano_dac>,"allo,24db_digital_gain?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
+@@ -0,0 +1,55 @@
++// Definitions for Piano DAC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ allo_pcm5122_4c: pcm5122 at 4c {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4c>;
++ status = "okay";
++ };
++ allo_pcm5122_4d: pcm5122 at 4d {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4d>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ piano_dac: __overlay__ {
++ compatible = "allo,piano-dac-plus";
++ audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
++ i2s-controller = <&i2s>;
++ mute1-gpios = <&gpio 6 1>;
++ mute2-gpios = <&gpio 25 1>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain =
++ <&piano_dac>,"allo,24db_digital_gain?";
++ glb_mclk =
++ <&piano_dac>,"allo,glb_mclk?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
+@@ -0,0 +1,57 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "simple-audio-card";
++ simple-audio-card,name = "ApplePi-DAC";
++
++ status = "okay";
++
++ playback_link: simple-audio-card,dai-link at 1 {
++ format = "i2s";
++
++ p_cpu_dai: cpu {
++ sound-dai = <&i2s>;
++ dai-tdm-slot-num = <2>;
++ dai-tdm-slot-width = <32>;
++ };
++
++ p_codec_dai: codec {
++ sound-dai = <&codec_out>;
++ };
++ };
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ codec_out: pcm1794a-codec {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm1794a";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2s>;
++ __overlay__ {
++ #sound-dai-cells = <0>;
++ status = "okay";
++ };
++ };
++};
++
++/*
++ Written by: Leonid Ayzenshtat
++ Company: Orchard Audio (www.orchardaudio.com)
++
++ compile with:
++ dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts
++*/
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
+@@ -0,0 +1,57 @@
++/dts-v1/;
++/plugin/;
++
++/* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++
++ lowpan0: at86rf233 at 0 {
++ compatible = "atmel,at86rf233";
++ reg = <0>;
++ interrupt-parent = <&gpio>;
++ interrupts = <23 4>; /* active high */
++ reset-gpio = <&gpio 24 1>;
++ sleep-gpio = <&gpio 25 1>;
++ spi-max-frequency = <3000000>;
++ xtal-trim = /bits/ 8 <0xf>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&gpio>;
++ __overlay__ {
++ lowpan0_pins: lowpan0_pins {
++ brcm,pins = <23 24 25>;
++ brcm,function = <0 1 1>; /* in out out */
++ };
++ };
++ };
++
++ __overrides__ {
++ interrupt = <&lowpan0>, "interrupts:0",
++ <&lowpan0_pins>, "brcm,pins:0";
++ reset = <&lowpan0>, "reset-gpio:4",
++ <&lowpan0_pins>, "brcm,pins:4";
++ sleep = <&lowpan0>, "sleep-gpio:4",
++ <&lowpan0_pins>, "brcm,pins:8";
++ speed = <&lowpan0>, "spi-max-frequency:0";
++ trim = <&lowpan0>, "xtal-trim.0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
+@@ -0,0 +1,59 @@
++// Definitions for audioinjector.net audio add on soundcard
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ cs42448: cs42448 at 48 {
++ #sound-dai-cells = <0>;
++ compatible = "cirrus,cs42448";
++ reg = <0x48>;
++ clocks = <&cs42448_mclk>;
++ clock-names = "mclk";
++ VA-supply = <&vdd_5v0_reg>;
++ VD-supply = <&vdd_3v3_reg>;
++ VLS-supply = <&vdd_3v3_reg>;
++ VLC-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++
++ cs42448_mclk: codec-mclk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <49152000>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ snd: __overlay__ {
++ compatible = "ai,audioinjector-octo-soundcard";
++ mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
++ <&gpio 24 0>;
++ reset-gpios = <&gpio 5 0>;
++ i2s-controller = <&i2s>;
++ codec = <&cs42448>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ non-stop-clocks = <&snd>, "non-stop-clocks?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for audioinjector.net audio add on soundcard
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8731 at 1a {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8731";
++ reg = <0x1a>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "ai,audioinjector-pi-soundcard";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
+@@ -0,0 +1,19 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&audio_pins>;
++ frag0: __overlay__ {
++ brcm,pins = < 12 13 >;
++ brcm,function = < 4 >; /* alt0 alt0 */
++ };
++ };
++
++ __overrides__ {
++ swap_lr = <&frag0>, "swap_lr?";
++ enable_jack = <&frag0>, "enable_jack?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
+@@ -0,0 +1,23 @@
++// Definitions for BMP085/BMP180 digital barometric pressure and temperature sensors from Bosch Sensortec
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ bmp085 at 77 {
++ compatible = "bosch,bmp085";
++ reg = <0x77>;
++ default-oversampling = <3>;
++ status = "okay";
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts
+@@ -0,0 +1,39 @@
++/*
++ * Overlay for the DHT11/21/22 humidity/temperature sensor modules.
++ */
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++
++ dht11: dht11 at 0 {
++ compatible = "dht11";
++ pinctrl-names = "default";
++ pinctrl-0 = <&dht11_pins>;
++ gpios = <&gpio 4 0>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ dht11_pins: dht11_pins {
++ brcm,pins = <4>;
++ brcm,function = <0>; // in
++ brcm,pull = <0>; // off
++ };
++ };
++ };
++
++ __overrides__ {
++ gpiopin = <&dht11_pins>,"brcm,pins:0",
++ <&dht11>,"gpios:4";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for Dion Audio LOCO DAC-AMP
++
++/*
++ * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ pcm5102a-codec {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5102a";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "dionaudio,loco-pcm5242-tpa3118";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
+@@ -0,0 +1,49 @@
++/*
++ * Definitions for Dion Audio LOCO-V2 DAC-AMP
++ * eg. dtoverlay=dionaudio-loco-v2
++ *
++ * PCM5242 DAC (in software mode) and TPA3255 AMP.
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&sound>;
++ frag0: __overlay__ {
++ compatible = "dionaudio,dionaudio-loco-v2";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122 at 4c {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4d>;
++ status = "okay";
++ };
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
+@@ -0,0 +1,31 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ // There is no DPI driver module, but we need a platform device
++ // node (that doesn't already use pinctrl) to hang the pinctrl
++ // reference on - leds will do
++
++ fragment at 0 {
++ target = <&leds>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&dpi18_pins>;
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ dpi18_pins: dpi18_pins {
++ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
++ 12 13 14 15 16 17 18 19 20
++ 21>;
++ brcm,function = <6>; /* alt2 */
++ brcm,pull = <0>; /* no pull */
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
+@@ -0,0 +1,31 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ // There is no DPI driver module, but we need a platform device
++ // node (that doesn't already use pinctrl) to hang the pinctrl
++ // reference on - leds will do
++
++ fragment at 0 {
++ target = <&leds>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&dpi24_pins>;
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ dpi24_pins: dpi24_pins {
++ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
++ 12 13 14 15 16 17 18 19 20
++ 21 22 23 24 25 26 27>;
++ brcm,function = <6>; /* alt2 */
++ brcm,pull = <0>; /* no pull */
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
+@@ -0,0 +1,20 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&usb>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ __overlay__ {
++ compatible = "brcm,bcm2708-usb";
++ reg = <0x7e980000 0x10000>,
++ <0x7e006000 0x1000>;
++ interrupts = <2 0>,
++ <1 9>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
+@@ -0,0 +1,28 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&usb>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ dwc2_usb: __overlay__ {
++ compatible = "brcm,bcm2835-usb";
++ reg = <0x7e980000 0x10000>;
++ interrupts = <1 9>;
++ dr_mode = "otg";
++ g-np-tx-fifo-size = <32>;
++ g-rx-fifo-size = <256>;
++ g-tx-fifo-size = <512 512 512 512 512 256 256>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ dr_mode = <&dwc2_usb>, "dr_mode";
++ g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0";
++ g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
+@@ -0,0 +1,53 @@
++// Overlay for the Microchip ENC28J60 Ethernet Controller
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++
++ eth1: enc28j60 at 0{
++ compatible = "microchip,enc28j60";
++ reg = <0>; /* CE0 */
++ pinctrl-names = "default";
++ pinctrl-0 = <ð1_pins>;
++ interrupt-parent = <&gpio>;
++ interrupts = <25 0x2>; /* falling edge */
++ spi-max-frequency = <12000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&gpio>;
++ __overlay__ {
++ eth1_pins: eth1_pins {
++ brcm,pins = <25>;
++ brcm,function = <0>; /* in */
++ brcm,pull = <0>; /* none */
++ };
++ };
++ };
++
++ __overrides__ {
++ int_pin = <ð1>, "interrupts:0",
++ <ð1_pins>, "brcm,pins:0";
++ speed = <ð1>, "spi-max-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
+@@ -0,0 +1,47 @@
++// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
++// Interrupt pin: 39
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&spi2>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++
++ eth1: enc28j60 at 0{
++ compatible = "microchip,enc28j60";
++ reg = <0>; /* CE0 */
++ pinctrl-names = "default";
++ pinctrl-0 = <ð1_pins>;
++ interrupt-parent = <&gpio>;
++ interrupts = <39 0x2>; /* falling edge */
++ spi-max-frequency = <12000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ eth1_pins: eth1_pins {
++ brcm,pins = <39>;
++ brcm,function = <0>; /* in */
++ brcm,pull = <0>; /* none */
++ };
++ };
++ };
++
++ __overrides__ {
++ int_pin = <ð1>, "interrupts:0",
++ <ð1_pins>, "brcm,pins:0";
++ speed = <ð1>, "spi-max-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
+@@ -0,0 +1,48 @@
++// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ exc3000_pins: exc3000_pins {
++ brcm,pins = <4>; // interrupt
++ brcm,function = <0>; // in
++ brcm,pull = <2>; // pull-up
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ exc3000: exc3000 at 2a {
++ compatible = "eeti,exc3000";
++ reg = <0x2a>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&exc3000_pins>;
++ interrupt-parent = <&gpio>;
++ interrupts = <4 8>; // active low level-sensitive
++ touchscreen-size-x = <4096>;
++ touchscreen-size-y = <4096>;
++ };
++ };
++ };
++
++ __overrides__ {
++ interrupt = <&exc3000_pins>,"brcm,pins:0",
++ <&exc3000>,"interrupts:0";
++ sizex = <&exc3000>,"touchscreen-size-x:0";
++ sizey = <&exc3000>,"touchscreen-size-y:0";
++ invx = <&exc3000>,"touchscreen-inverted-x?";
++ invy = <&exc3000>,"touchscreen-inverted-y?";
++ swapxy = <&exc3000>,"touchscreen-swapped-x-y?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
+@@ -0,0 +1,70 @@
++// Definitions for Fe-Pi Audio
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&clocks>;
++ __overlay__ {
++ sgtl5000_mclk: sgtl5000_mclk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <12288000>;
++ clock-output-names = "sgtl5000-mclk";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&soc>;
++ __overlay__ {
++ reg_1v8: reg_1v8 at 0 {
++ compatible = "regulator-fixed";
++ regulator-name = "1V8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ sgtl5000 at 0a {
++ #sound-dai-cells = <0>;
++ compatible = "fepi,sgtl5000";
++ reg = <0x0a>;
++ clocks = <&sgtl5000_mclk>;
++ micbias-resistor-k-ohms = <2>;
++ micbias-voltage-m-volts = <3000>;
++ VDDA-supply = <&vdd_3v3_reg>;
++ VDDIO-supply = <&vdd_3v3_reg>;
++ VDDD-supply = <®_1v8>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 4 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "fe-pi,fe-pi-audio";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts
+@@ -0,0 +1,46 @@
++// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ goodix_pins: goodix_pins {
++ brcm,pins = <4 17>; // interrupt and reset
++ brcm,function = <0 0>; // in
++ brcm,pull = <2 2>; // pull-up
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ gt9271: gt9271 at 14 {
++ compatible = "goodix,gt9271";
++ reg = <0x14>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&goodix_pins>;
++ interrupt-parent = <&gpio>;
++ interrupts = <4 2>; // high-to-low edge triggered
++ irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header
++ reset-gpios = <&gpio 17 0>; // Pin11 on GPIO header
++ };
++ };
++ };
++
++ __overrides__ {
++ interrupt = <&goodix_pins>,"brcm,pins:0",
++ <>9271>,"interrupts:0",
++ <>9271>,"irq-gpios:4";
++ reset = <&goodix_pins>,"brcm,pins:4",
++ <>9271>,"reset-gpios:4";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
+@@ -0,0 +1,49 @@
++// Definitions for Google voiceHAT v1 soundcard overlay
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ googlevoicehat_pins: googlevoicehat_pins {
++ brcm,pins = <16>;
++ brcm,function = <1>; /* out */
++ brcm,pull = <0>; /* up */
++ };
++ };
++ };
++
++
++ fragment at 2 {
++ target-path = "/";
++ __overlay__ {
++ voicehat-codec {
++ #sound-dai-cells = <0>;
++ compatible = "google,voicehat";
++ pinctrl-names = "default";
++ pinctrl-0 = <&googlevoicehat_pins>;
++ sdmode-gpios= <&gpio 16 0>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "googlevoicehat,googlevoicehat-soundcard";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
+@@ -0,0 +1,48 @@
++// Definitions for ir-gpio module
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ gpio_ir: ir-receiver at 12 {
++ compatible = "gpio-ir-receiver";
++ pinctrl-names = "default";
++ pinctrl-0 = <&gpio_ir_pins>;
++
++ // pin number, high or low
++ gpios = <&gpio 18 1>;
++
++ // parameter for keymap name
++ linux,rc-map-name = "rc-rc6-mce";
++
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ gpio_ir_pins: gpio_ir_pins at 12 {
++ brcm,pins = <18>; // pin 18
++ brcm,function = <0>; // in
++ brcm,pull = <1>; // down
++ };
++ };
++ };
++
++ __overrides__ {
++ // parameters
++ gpio_pin = <&gpio_ir>,"gpios:4", // pin number
++ <&gpio_ir>,"reg:0",
++ <&gpio_ir_pins>,"brcm,pins:0",
++ <&gpio_ir_pins>,"reg:0";
++ gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
++
++ rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
+@@ -0,0 +1,48 @@
++// Definitions for gpio-key module
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ // Configure the gpio pin controller
++ target = <&gpio>;
++ __overlay__ {
++ pin_state: button_pins at 0 {
++ brcm,pins = <3>; // gpio number
++ brcm,function = <0>; // 0 = input, 1 = output
++ brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
++ };
++ };
++ };
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ button: button at 0 {
++ compatible = "gpio-keys";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pin_state>;
++ status = "okay";
++
++ key: key {
++ linux,code = <116>;
++ gpios = <&gpio 3 1>;
++ label = "KEY_POWER";
++ };
++ };
++ };
++ };
++
++ __overrides__ {
++ gpio = <&key>,"gpios:4",
++ <&button>,"reg:0",
++ <&pin_state>,"brcm,pins:0",
++ <&pin_state>,"reg:0";
++ label = <&key>,"label";
++ keycode = <&key>,"linux,code:0";
++ gpio_pull = <&pin_state>,"brcm,pull:0";
++ active_low = <&key>,"gpios:8";
++ };
++
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
+@@ -0,0 +1,34 @@
++// Definitions for gpio-poweroff module
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ power_ctrl: power_ctrl {
++ compatible = "gpio-poweroff";
++ gpios = <&gpio 26 0>;
++ force;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ power_ctrl_pins: power_ctrl_pins {
++ brcm,pins = <26>;
++ brcm,function = <1>; // out
++ };
++ };
++ };
++
++ __overrides__ {
++ gpiopin = <&power_ctrl>,"gpios:4",
++ <&power_ctrl_pins>,"brcm,pins:0";
++ active_low = <&power_ctrl>,"gpios:8";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
+@@ -0,0 +1,80 @@
++// Definitions for gpio-poweroff module
++/dts-v1/;
++/plugin/;
++
++// This overlay sets up an input device that generates KEY_POWER events
++// when a given GPIO pin changes. It defaults to using GPIO3, which can
++// also be used to wake up (start) the Rpi again after shutdown. Since
++// wakeup is active-low, this defaults to active-low with a pullup
++// enabled, but all of this can be changed using overlay parameters (but
++// note that GPIO3 has an external pullup on at least some boards).
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ // Configure the gpio pin controller
++ target = <&gpio>;
++ __overlay__ {
++ // Define a pinctrl state, that sets up the gpio
++ // as an input with a pullup enabled. This does
++ // not take effect by itself, only when referenced
++ // by a "pinctrl client", as is done below. See:
++ // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
++ // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
++ pin_state: shutdown_button_pins {
++ brcm,pins = <3>; // gpio number
++ brcm,function = <0>; // 0 = input, 1 = output
++ brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
++ };
++ };
++ };
++ fragment at 1 {
++ // Add a new device to the /soc devicetree node
++ target-path = "/soc";
++ __overlay__ {
++ shutdown_button {
++ // Let the gpio-keys driver handle this device. See:
++ // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt
++ compatible = "gpio-keys";
++
++ // Declare a single pinctrl state (referencing the one declared above) and name it
++ // default, so it is activated automatically.
++ pinctrl-names = "default";
++ pinctrl-0 = <&pin_state>;
++
++ // Enable this device
++ status = "okay";
++
++ // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER
++ // (keycode 116, see
++ // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190)
++ button: shutdown {
++ label = "shutdown";
++ linux,code = <116>; // KEY_POWER
++ gpios = <&gpio 3 1>;
++ };
++ };
++ };
++ };
++
++ // This defines parameters that can be specified when loading
++ // the overlay. Each foo = line specifies one parameter, named
++ // foo. The rest of the specification gives properties where the
++ // parameter value is inserted into (changing the values above
++ // or adding new ones).
++ __overrides__ {
++ // Allow overriding the GPIO number.
++ gpio_pin = <&button>,"gpios:4",
++ <&pin_state>,"brcm,pins:0";
++
++ // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup
++ // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least
++ // on some boards).
++ gpio_pull = <&pin_state>,"brcm,pull:0";
++
++ // Allow setting the active_low flag. 0 = active high, 1 = active low
++ active_low = <&button>,"gpios:8";
++ };
++
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for HiFiBerry Amp/Amp+
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ tas5713 at 1b {
++ #sound-dai-cells = <0>;
++ compatible = "ti,tas5713";
++ reg = <0x1b>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "hifiberry,hifiberry-amp";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
+@@ -0,0 +1,34 @@
++// Definitions for HiFiBerry DAC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ pcm5102a-codec {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5102a";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "hifiberry,hifiberry-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
+@@ -0,0 +1,59 @@
++// Definitions for HiFiBerry DAC+
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/clocks";
++ __overlay__ {
++ dacpro_osc: dacpro_osc {
++ compatible = "hifiberry,dacpro-clk";
++ #clock-cells = <0>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122 at 4d {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4d>;
++ clocks = <&dacpro_osc>;
++ AVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ CPVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&sound>;
++ hifiberry_dacplus: __overlay__ {
++ compatible = "hifiberry,hifiberry-dacplus";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain =
++ <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
++ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
+@@ -0,0 +1,41 @@
++// Definitions for HiFiBerry Digi
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804 at 3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ PVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "hifiberry,hifiberry-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
+@@ -0,0 +1,43 @@
++// Definitions for HiFiBerry Digi Pro
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804 at 3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ PVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "hifiberry,hifiberry-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ clock44-gpio = <&gpio 5 0>;
++ clock48-gpio = <&gpio 6 0>;
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
+@@ -0,0 +1,93 @@
++/*
++ * Device Tree overlay for HY28A display
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ hy28a_pins: hy28a_pins {
++ brcm,pins = <17 25 18>;
++ brcm,function = <0 1 1>; /* in out out */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ hy28a: hy28a at 0{
++ compatible = "ilitek,ili9320";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&hy28a_pins>;
++
++ spi-max-frequency = <32000000>;
++ spi-cpol;
++ spi-cpha;
++ rotate = <270>;
++ bgr;
++ fps = <50>;
++ buswidth = <8>;
++ startbyte = <0x70>;
++ reset-gpios = <&gpio 25 0>;
++ led-gpios = <&gpio 18 1>;
++ debug = <0>;
++ };
++
++ hy28a_ts: hy28a-ts at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++
++ spi-max-frequency = <2000000>;
++ interrupts = <17 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 17 0>;
++ ti,x-plate-ohms = /bits/ 16 <100>;
++ ti,pressure-max = /bits/ 16 <255>;
++ };
++ };
++ };
++ __overrides__ {
++ speed = <&hy28a>,"spi-max-frequency:0";
++ rotate = <&hy28a>,"rotate:0";
++ fps = <&hy28a>,"fps:0";
++ debug = <&hy28a>,"debug:0";
++ xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
++ resetgpio = <&hy28a>,"reset-gpios:4",
++ <&hy28a_pins>, "brcm,pins:4";
++ ledgpio = <&hy28a>,"led-gpios:4",
++ <&hy28a_pins>, "brcm,pins:8";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
+@@ -0,0 +1,148 @@
++/*
++ * Device Tree overlay for HY28b display shield by Texy
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ hy28b_pins: hy28b_pins {
++ brcm,pins = <17 25 18>;
++ brcm,function = <0 1 1>; /* in out out */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ hy28b: hy28b at 0{
++ compatible = "ilitek,ili9325";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&hy28b_pins>;
++
++ spi-max-frequency = <48000000>;
++ spi-cpol;
++ spi-cpha;
++ rotate = <270>;
++ bgr;
++ fps = <50>;
++ buswidth = <8>;
++ startbyte = <0x70>;
++ reset-gpios = <&gpio 25 0>;
++ led-gpios = <&gpio 18 1>;
++
++ gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
++
++ init = <0x10000e7 0x0010
++ 0x1000000 0x0001
++ 0x1000001 0x0100
++ 0x1000002 0x0700
++ 0x1000003 0x1030
++ 0x1000004 0x0000
++ 0x1000008 0x0207
++ 0x1000009 0x0000
++ 0x100000a 0x0000
++ 0x100000c 0x0001
++ 0x100000d 0x0000
++ 0x100000f 0x0000
++ 0x1000010 0x0000
++ 0x1000011 0x0007
++ 0x1000012 0x0000
++ 0x1000013 0x0000
++ 0x2000032
++ 0x1000010 0x1590
++ 0x1000011 0x0227
++ 0x2000032
++ 0x1000012 0x009c
++ 0x2000032
++ 0x1000013 0x1900
++ 0x1000029 0x0023
++ 0x100002b 0x000e
++ 0x2000032
++ 0x1000020 0x0000
++ 0x1000021 0x0000
++ 0x2000032
++ 0x1000050 0x0000
++ 0x1000051 0x00ef
++ 0x1000052 0x0000
++ 0x1000053 0x013f
++ 0x1000060 0xa700
++ 0x1000061 0x0001
++ 0x100006a 0x0000
++ 0x1000080 0x0000
++ 0x1000081 0x0000
++ 0x1000082 0x0000
++ 0x1000083 0x0000
++ 0x1000084 0x0000
++ 0x1000085 0x0000
++ 0x1000090 0x0010
++ 0x1000092 0x0000
++ 0x1000093 0x0003
++ 0x1000095 0x0110
++ 0x1000097 0x0000
++ 0x1000098 0x0000
++ 0x1000007 0x0133
++ 0x1000020 0x0000
++ 0x1000021 0x0000
++ 0x2000064>;
++ debug = <0>;
++ };
++
++ hy28b_ts: hy28b-ts at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++
++ spi-max-frequency = <2000000>;
++ interrupts = <17 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 17 0>;
++ ti,x-plate-ohms = /bits/ 16 <100>;
++ ti,pressure-max = /bits/ 16 <255>;
++ };
++ };
++ };
++ __overrides__ {
++ speed = <&hy28b>,"spi-max-frequency:0";
++ rotate = <&hy28b>,"rotate:0";
++ fps = <&hy28b>,"fps:0";
++ debug = <&hy28b>,"debug:0";
++ xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
++ resetgpio = <&hy28b>,"reset-gpios:4",
++ <&hy28b_pins>, "brcm,pins:4";
++ ledgpio = <&hy28b>,"led-gpios:4",
++ <&hy28b_pins>, "brcm,pins:8";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
+@@ -0,0 +1,13 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ compatible = "brcm,bcm2708-i2c";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
+@@ -0,0 +1,43 @@
++// Overlay for i2c_gpio bitbanging host bus.
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ i2c_gpio: i2c at 0 {
++ compatible = "i2c-gpio";
++ gpios = <&gpio 23 0 /* sda */
++ &gpio 24 0 /* scl */
++ >;
++ i2c-gpio,delay-us = <2>; /* ~100 kHz */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/aliases";
++ __overlay__ {
++ i2c_gpio = "/i2c at 0";
++ };
++ };
++
++ fragment at 2 {
++ target-path = "/__symbols__";
++ __overlay__ {
++ i2c_gpio = "/i2c at 0";
++ };
++ };
++
++ __overrides__ {
++ i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
++ i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
++ i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
++ bus = <&i2c_gpio>, "reg:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
+@@ -0,0 +1,139 @@
++// Umbrella I2C Mux overlay
++
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pca9542: mux at 70 {
++ compatible = "nxp,pca9542";
++ reg = <0x70>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ i2c at 0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ };
++ i2c at 1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ };
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pca9545: mux at 70 {
++ compatible = "nxp,pca9545";
++ reg = <0x70>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ i2c at 0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ };
++ i2c at 1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ };
++ i2c at 2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ };
++ i2c at 3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ };
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pca9548: mux at 70 {
++ compatible = "nxp,pca9548";
++ reg = <0x70>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ i2c at 0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ };
++ i2c at 1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ };
++ i2c at 2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ };
++ i2c at 3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ };
++ i2c at 4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++ };
++ i2c at 5 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <5>;
++ };
++ i2c at 6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ };
++ i2c at 7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ };
++ };
++ };
++ };
++
++ __overrides__ {
++ pca9542 = <0>, "+0";
++ pca9545 = <0>, "+1";
++ pca9548 = <0>, "+2";
++
++ addr = <&pca9542>,"reg:0",
++ <&pca9545>,"reg:0",
++ <&pca9548>,"reg:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
+@@ -0,0 +1,26 @@
++// Definitions for NXP PCA9685A I2C PWM controller on ARM I2C bus.
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pca: pca at 40 {
++ compatible = "nxp,pca9685";
++ #pwm-cells = <2>;
++ reg = <0x40>;
++ status = "okay";
++ };
++ };
++ };
++ __overrides__ {
++ addr = <&pca>,"reg:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
+@@ -0,0 +1,183 @@
++// Definitions for several I2C based Real Time Clocks
++// Available through i2c-gpio
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ i2c_gpio: i2c-gpio-rtc at 0 {
++ compatible = "i2c-gpio";
++ gpios = <&gpio 23 0 /* sda */
++ &gpio 24 0 /* scl */
++ >;
++ i2c-gpio,delay-us = <2>; /* ~100 kHz */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ abx80x: abx80x at 69 {
++ compatible = "abracon,abx80x";
++ reg = <0x69>;
++ abracon,tc-diode = "standard";
++ abracon,tc-resistor = <0>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ds1307: ds1307 at 68 {
++ compatible = "maxim,ds1307";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ds1339: ds1339 at 68 {
++ compatible = "dallas,ds1339";
++ trickle-resistor-ohms = <0>;
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ds3231: ds3231 at 68 {
++ compatible = "maxim,ds3231";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 5 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ mcp7940x: mcp7940x at 6f {
++ compatible = "microchip,mcp7940x";
++ reg = <0x6f>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 6 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ mcp7941x: mcp7941x at 6f {
++ compatible = "microchip,mcp7941x";
++ reg = <0x6f>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 7 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcf2127: pcf2127 at 51 {
++ compatible = "nxp,pcf2127";
++ reg = <0x51>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 8 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcf8523: pcf8523 at 68 {
++ compatible = "nxp,pcf8523";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 9 {
++ target = <&i2c_gpio>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcf8563: pcf8563 at 51 {
++ compatible = "nxp,pcf8563";
++ reg = <0x51>;
++ status = "okay";
++ };
++ };
++ };
++
++ __overrides__ {
++ abx80x = <0>,"+1";
++ ds1307 = <0>,"+2";
++ ds1339 = <0>,"+3";
++ ds3231 = <0>,"+4";
++ mcp7940x = <0>,"+5";
++ mcp7941x = <0>,"+6";
++ pcf2127 = <0>,"+7";
++ pcf8523 = <0>,"+8";
++ pcf8563 = <0>,"+9";
++ trickle-diode-type = <&abx80x>,"abracon,tc-diode";
++ trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
++ <&abx80x>,"abracon,tc-resistor";
++ wakeup-source = <&ds1339>,"wakeup-source?",
++ <&ds3231>,"wakeup-source?",
++ <&mcp7940x>,"wakeup-source?",
++ <&mcp7941x>,"wakeup-source?";
++ i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
++ i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
++ i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
+@@ -0,0 +1,181 @@
++// Definitions for several I2C based Real Time Clocks
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ abx80x: abx80x at 69 {
++ compatible = "abracon,abx80x";
++ reg = <0x69>;
++ abracon,tc-diode = "standard";
++ abracon,tc-resistor = <0>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ds1307: ds1307 at 68 {
++ compatible = "maxim,ds1307";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ds1339: ds1339 at 68 {
++ compatible = "dallas,ds1339";
++ trickle-resistor-ohms = <0>;
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ds3231: ds3231 at 68 {
++ compatible = "maxim,ds3231";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ mcp7940x: mcp7940x at 6f {
++ compatible = "microchip,mcp7940x";
++ reg = <0x6f>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 5 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ mcp7941x: mcp7941x at 6f {
++ compatible = "microchip,mcp7941x";
++ reg = <0x6f>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 6 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcf2127: pcf2127 at 51 {
++ compatible = "nxp,pcf2127";
++ reg = <0x51>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 7 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcf8523: pcf8523 at 68 {
++ compatible = "nxp,pcf8523";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 8 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcf8563: pcf8563 at 51 {
++ compatible = "nxp,pcf8563";
++ reg = <0x51>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 9 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ m41t62: m41t62 at 68 {
++ compatible = "st,m41t62";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ __overrides__ {
++ abx80x = <0>,"+0";
++ ds1307 = <0>,"+1";
++ ds1339 = <0>,"+2";
++ ds3231 = <0>,"+3";
++ mcp7940x = <0>,"+4";
++ mcp7941x = <0>,"+5";
++ pcf2127 = <0>,"+6";
++ pcf8523 = <0>,"+7";
++ pcf8563 = <0>,"+8";
++ m41t62 = <0>,"+9";
++ trickle-diode-type = <&abx80x>,"abracon,tc-diode";
++ trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
++ <&abx80x>,"abracon,tc-resistor";
++ wakeup-source = <&ds1339>,"wakeup-source?",
++ <&ds3231>,"wakeup-source?",
++ <&mcp7940x>,"wakeup-source?",
++ <&mcp7941x>,"wakeup-source?",
++ <&m41t62>,"wakeup-source?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
+@@ -0,0 +1,223 @@
++// Definitions for I2C based sensors using the Industrial IO or HWMON interface.
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ bme280: bme280 at 76 {
++ compatible = "bosch,bme280";
++ reg = <0x76>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ bmp085: bmp085 at 77 {
++ compatible = "bosch,bmp085";
++ reg = <0x77>;
++ default-oversampling = <3>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ bmp180: bmp180 at 77 {
++ compatible = "bosch,bmp180";
++ reg = <0x77>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ bmp280: bmp280 at 76 {
++ compatible = "bosch,bmp280";
++ reg = <0x76>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ htu21: htu21 at 40 {
++ compatible = "htu21";
++ reg = <0x40>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 5 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ lm75: lm75 at 4f {
++ compatible = "lm75";
++ reg = <0x4f>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 6 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ si7020: si7020 at 40 {
++ compatible = "si7020";
++ reg = <0x40>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 7 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ tmp102: tmp102 at 48 {
++ compatible = "ti,tmp102";
++ reg = <0x48>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 8 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ hdc100x: hdc100x at 40 {
++ compatible = "hdc100x";
++ reg = <0x40>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 9 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ tsl4531: tsl4531 at 29 {
++ compatible = "tsl4531";
++ reg = <0x29>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 10 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ veml6070: veml6070 at 38 {
++ compatible = "veml6070";
++ reg = <0x38>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 11 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ sht3x: sht3x at 44 {
++ compatible = "sht3x";
++ reg = <0x44>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 12 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ds1621: ds1621 at 48 {
++ compatible = "ds1621";
++ reg = <0x48>;
++ status = "okay";
++ };
++ };
++ };
++
++ __overrides__ {
++ addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0",
++ <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0",
++ <&ds1621>,"reg:0";
++ bme280 = <0>,"+0";
++ bmp085 = <0>,"+1";
++ bmp180 = <0>,"+2";
++ bmp280 = <0>,"+3";
++ htu21 = <0>,"+4";
++ lm75 = <0>,"+5";
++ lm75addr = <&lm75>,"reg:0";
++ si7020 = <0>,"+6";
++ tmp102 = <0>,"+7";
++ hdc100x = <0>,"+8";
++ tsl4531 = <0>,"+9";
++ veml6070 = <0>,"+10";
++ sht3x = <0>,"+11";
++ ds1621 = <0>,"+12";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
+@@ -0,0 +1,69 @@
++/*
++ * Device tree overlay for i2c_bcm2708, i2c0 bus
++ *
++ * Compile:
++ * dtc -@ -I dts -O dtb -o i2c0-bcm2708-overlay.dtb i2c0-bcm2708-overlay.dts
++ */
++
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c0_pins>;
++ frag1: __overlay__ {
++ brcm,pins = <0 1>;
++ brcm,function = <4>; /* alt0 */
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c0_pins>;
++ __dormant__ {
++ brcm,pins = <28 29>;
++ brcm,function = <4>; /* alt0 */
++ };
++ };
++
++ fragment at 3 {
++ target = <&i2c0_pins>;
++ __dormant__ {
++ brcm,pins = <44 45>;
++ brcm,function = <5>; /* alt1 */
++ };
++ };
++
++ fragment at 4 {
++ target = <&i2c0_pins>;
++ __dormant__ {
++ brcm,pins = <46 47>;
++ brcm,function = <4>; /* alt0 */
++ };
++ };
++
++ fragment at 5 {
++ target = <&i2c0>;
++ __dormant__ {
++ compatible = "brcm,bcm2708-i2c";
++ };
++ };
++
++ __overrides__ {
++ sda0_pin = <&frag1>,"brcm,pins:0";
++ scl0_pin = <&frag1>,"brcm,pins:4";
++ pins_0_1 = <0>,"+1-2-3-4";
++ pins_28_29 = <0>,"-1+2-3-4";
++ pins_44_45 = <0>,"-1-2+3-4";
++ pins_46_47 = <0>,"-1-2-3+4";
++ combine = <0>, "!5";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
+@@ -0,0 +1,43 @@
++/*
++ * Device tree overlay for i2c_bcm2708, i2c1 bus
++ *
++ * Compile:
++ * dtc -@ -I dts -O dtb -o i2c1-bcm2708-overlay.dtb i2c1-bcm2708-overlay.dts
++ */
++
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c1>;
++ __overlay__ {
++ pinctrl-0 = <&i2c1_pins>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1_pins>;
++ pins: __overlay__ {
++ brcm,pins = <2 3>;
++ brcm,function = <4>; /* alt 0 */
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c1>;
++ __dormant__ {
++ compatible = "brcm,bcm2708-i2c";
++ };
++ };
++
++ __overrides__ {
++ sda1_pin = <&pins>,"brcm,pins:0";
++ scl1_pin = <&pins>,"brcm,pins:4";
++ pin_func = <&pins>,"brcm,function:0";
++ combine = <0>, "!2";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
+@@ -0,0 +1,18 @@
++/*
++ * Device tree overlay to move i2s to gpio 28 to 31 on CM
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&i2s_pins>;
++ __overlay__ {
++ brcm,pins = <28 29 30 31>;
++ brcm,function = <6>; /* alt2 */
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
+@@ -0,0 +1,46 @@
++// Definitions for IQaudIO DAC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122 at 4c {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4c>;
++ AVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ CPVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ frag2: __overlay__ {
++ compatible = "iqaudio,iqaudio-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
+@@ -0,0 +1,49 @@
++// Definitions for IQaudIO DAC+
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122 at 4c {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4c>;
++ AVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ CPVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ iqaudio_dac: __overlay__ {
++ compatible = "iqaudio,iqaudio-dac";
++ i2s-controller = <&i2s>;
++ mute-gpios = <&gpio 22 0>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
++ auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
++ unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
+@@ -0,0 +1,47 @@
++// Definitions for IQAudIO Digi WM8804 audio board
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804 at 3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ DVDD-supply = <&vdd_3v3_reg>;
++ PVDD-supply = <&vdd_3v3_reg>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ wm8804_digi: __overlay__ {
++ compatible = "iqaudio,wm8804-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ card_name = <&wm8804_digi>,"wm8804-digi,card-name";
++ dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
++ dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
+@@ -0,0 +1,46 @@
++// Definitions for JustBoom DAC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122 at 4d {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4d>;
++ AVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ CPVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ frag2: __overlay__ {
++ compatible = "justboom,justboom-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
+@@ -0,0 +1,41 @@
++// Definitions for JustBoom Digi
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804 at 3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ PVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "justboom,justboom-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts
+@@ -0,0 +1,57 @@
++// Definitions for lirc-rpi module
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ lirc_rpi: lirc_rpi {
++ compatible = "rpi,lirc-rpi";
++ pinctrl-names = "default";
++ pinctrl-0 = <&lirc_pins>;
++ status = "okay";
++
++ // Override autodetection of IR receiver circuit
++ // (0 = active high, 1 = active low, -1 = no override )
++ rpi,sense = <0xffffffff>;
++
++ // Software carrier
++ // (0 = off, 1 = on)
++ rpi,softcarrier = <1>;
++
++ // Invert output
++ // (0 = off, 1 = on)
++ rpi,invert = <0>;
++
++ // Enable debugging messages
++ // (0 = off, 1 = on)
++ rpi,debug = <0>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ lirc_pins: lirc_pins {
++ brcm,pins = <17 18>;
++ brcm,function = <1 0>; // out in
++ brcm,pull = <0 1>; // off down
++ };
++ };
++ };
++
++ __overrides__ {
++ gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
++ gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
++ gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
++
++ sense = <&lirc_rpi>,"rpi,sense:0";
++ softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
++ invert = <&lirc_rpi>,"rpi,invert:0";
++ debug = <&lirc_rpi>,"rpi,debug:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
+@@ -0,0 +1,64 @@
++// Definitions for mbed DAC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ tlv320aic23: codec at 1a {
++ #sound-dai-cells = <0>;
++ reg = <0x1a>;
++ compatible = "ti,tlv320aic23";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "simple-audio-card";
++ i2s-controller = <&i2s>;
++ status = "okay";
++
++ simple-audio-card,name = "mbed-DAC";
++
++ simple-audio-card,widgets =
++ "Microphone", "Mic Jack",
++ "Line", "Line In",
++ "Headphone", "Headphone Jack";
++
++ simple-audio-card,routing =
++ "Headphone Jack", "LHPOUT",
++ "Headphone Jack", "RHPOUT",
++ "LLINEIN", "Line In",
++ "RLINEIN", "Line In",
++ "MICIN", "Mic Jack";
++
++ simple-audio-card,format = "i2s";
++
++ simple-audio-card,cpu {
++ sound-dai = <&i2s>;
++ };
++
++ sound_master: simple-audio-card,codec {
++ sound-dai = <&tlv320aic23>;
++ system-clock-frequency = <12288000>;
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
+@@ -0,0 +1,54 @@
++// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&i2c1>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ mcp23017_pins: mcp23017_pins {
++ brcm,pins = <4>;
++ brcm,function = <0>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp23017: mcp at 20 {
++ compatible = "microchip,mcp23017";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells=<2>;
++ interrupt-parent = <&gpio>;
++ interrupts = <4 2>;
++ interrupt-controller;
++ microchip,irq-mirror;
++
++ status = "okay";
++ };
++ };
++ };
++
++ __overrides__ {
++ gpiopin = <&mcp23017_pins>,"brcm,pins:0",
++ <&mcp23017>,"interrupts:0";
++ addr = <&mcp23017>,"reg:0";
++ };
++};
++
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
+@@ -0,0 +1,732 @@
++// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
++
++// dtparams:
++// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
++// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
++// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
++// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
++//
++// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
++// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
++//
++// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
++// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
++//
++// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
++// dtoverlay=spi1-2cs
++// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ // disable spi-dev on spi0.0
++ fragment at 0 {
++ target = <&spidev0>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi0.1
++ fragment at 1 {
++ target = <&spidev1>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.0
++ fragment at 2 {
++ target-path = "spi1/spidev at 0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.1
++ fragment at 3 {
++ target-path = "spi1/spidev at 1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.2
++ fragment at 4 {
++ target-path = "spi1/spidev at 2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.0
++ fragment at 5 {
++ target-path = "spi2/spidev at 0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.1
++ fragment at 6 {
++ target-path = "spi2/spidev at 1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.2
++ fragment at 7 {
++ target-path = "spi2/spidev at 2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // enable one or more mcp23s08s on spi0.0
++ fragment at 8 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_00: mcp23s08 at 0 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi0.1
++ fragment at 9 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_01: mcp23s08 at 1 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi1.0
++ fragment at 10 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_10: mcp23s08 at 0 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi1.1
++ fragment at 11 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_11: mcp23s08 at 1 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi1.2
++ fragment at 12 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_12: mcp23s08 at 2 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi2.0
++ fragment at 13 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_20: mcp23s08 at 0 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi2.1
++ fragment at 14 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_21: mcp23s08 at 1 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi2.2
++ fragment at 15 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_22: mcp23s08 at 2 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi0.0
++ fragment at 16 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_00: mcp23s17 at 0 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi0.1
++ fragment at 17 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_01: mcp23s17 at 1 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi1.0
++ fragment at 18 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_10: mcp23s17 at 0 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi1.1
++ fragment at 19 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_11: mcp23s17 at 1 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi1.2
++ fragment at 20 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_12: mcp23s17 at 2 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi2.0
++ fragment at 21 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_20: mcp23s17 at 0 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi2.1
++ fragment at 22 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_21: mcp23s17 at 1 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi2.2
++ fragment at 23 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_22: mcp23s17 at 2 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
++ fragment at 24 {
++ target = <&gpio>;
++ __dormant__ {
++ spi0_0_int_pins: spi0_0_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
++ fragment at 25 {
++ target = <&gpio>;
++ __dormant__ {
++ spi0_1_int_pins: spi0_1_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
++ fragment at 26 {
++ target = <&gpio>;
++ __dormant__ {
++ spi1_0_int_pins: spi1_0_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
++ fragment at 27 {
++ target = <&gpio>;
++ __dormant__ {
++ spi1_1_int_pins: spi1_1_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
++ fragment at 28 {
++ target = <&gpio>;
++ __dormant__ {
++ spi1_2_int_pins: spi1_2_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
++ fragment at 29 {
++ target = <&gpio>;
++ __dormant__ {
++ spi2_0_int_pins: spi2_0_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
++ fragment at 30 {
++ target = <&gpio>;
++ __dormant__ {
++ spi2_1_int_pins: spi2_1_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
++ fragment at 31 {
++ target = <&gpio>;
++ __dormant__ {
++ spi2_2_int_pins: spi2_2_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi0.0.
++ // Use default active low interrupt signalling.
++ fragment at 32 {
++ target = <&mcp23s08_00>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi0.1.
++ // Use default active low interrupt signalling.
++ fragment at 33 {
++ target = <&mcp23s08_01>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi1.0.
++ // Use default active low interrupt signalling.
++ fragment at 34 {
++ target = <&mcp23s08_10>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi1.1.
++ // Use default active low interrupt signalling.
++ fragment at 35 {
++ target = <&mcp23s08_11>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi1.2.
++ // Use default active low interrupt signalling.
++ fragment at 36 {
++ target = <&mcp23s08_12>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi2.0.
++ // Use default active low interrupt signalling.
++ fragment at 37 {
++ target = <&mcp23s08_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi2.1.
++ // Use default active low interrupt signalling.
++ fragment at 38 {
++ target = <&mcp23s08_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi2.2.
++ // Use default active low interrupt signalling.
++ fragment at 39 {
++ target = <&mcp23s08_22>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi0.0.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Use default active low interrupt signalling.
++ fragment at 40 {
++ target = <&mcp23s17_00>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi0.1.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment at 41 {
++ target = <&mcp23s17_01>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi1.0.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment at 42 {
++ target = <&mcp23s17_10>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi1.1.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment at 43 {
++ target = <&mcp23s17_11>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi1.2.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment at 44 {
++ target = <&mcp23s17_12>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi2.0.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment at 45 {
++ target = <&mcp23s17_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi2.1.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment at 46 {
++ target = <&mcp23s17_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi2.2.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment at 47 {
++ target = <&mcp23s17_22>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ __overrides__ {
++ s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
++ s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
++ s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
++ s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
++ s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
++ s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
++ s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
++ s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
++ s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
++ s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
++ s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
++ s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
++ s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
++ s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
++ s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
++ s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
++ s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
++ s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
++ s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
++ s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
++ s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
++ s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
++ s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
++ s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
++ s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
++ s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
++ s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
++ s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
++ s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
++ s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
++ s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
++ s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
++ };
++};
++
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
+@@ -0,0 +1,73 @@
++/*
++ * Device tree overlay for mcp251x/can0 on spi0.0
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++ /* disable spi-dev for spi0.0 */
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ /* the interrupt pin of the can-controller */
++ fragment at 2 {
++ target = <&gpio>;
++ __overlay__ {
++ can0_pins: can0_pins {
++ brcm,pins = <25>;
++ brcm,function = <0>; /* input */
++ };
++ };
++ };
++
++ /* the clock/oscillator of the can-controller */
++ fragment at 3 {
++ target-path = "/clocks";
++ __overlay__ {
++ /* external oscillator of mcp2515 on SPI0.0 */
++ can0_osc: can0_osc {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <16000000>;
++ };
++ };
++ };
++
++ /* the spi config of the can-controller itself binding everything together */
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ can0: mcp2515 at 0 {
++ reg = <0>;
++ compatible = "microchip,mcp2515";
++ pinctrl-names = "default";
++ pinctrl-0 = <&can0_pins>;
++ spi-max-frequency = <10000000>;
++ interrupt-parent = <&gpio>;
++ interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
++ clocks = <&can0_osc>;
++ };
++ };
++ };
++ __overrides__ {
++ oscillator = <&can0_osc>,"clock-frequency:0";
++ spimaxfrequency = <&can0>,"spi-max-frequency:0";
++ interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
+@@ -0,0 +1,73 @@
++/*
++ * Device tree overlay for mcp251x/can1 on spi0.1 edited by petit_miner
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++ /* disable spi-dev for spi0.1 */
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ /* the interrupt pin of the can-controller */
++ fragment at 2 {
++ target = <&gpio>;
++ __overlay__ {
++ can1_pins: can1_pins {
++ brcm,pins = <25>;
++ brcm,function = <0>; /* input */
++ };
++ };
++ };
++
++ /* the clock/oscillator of the can-controller */
++ fragment at 3 {
++ target-path = "/clocks";
++ __overlay__ {
++ /* external oscillator of mcp2515 on spi0.1 */
++ can1_osc: can1_osc {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <16000000>;
++ };
++ };
++ };
++
++ /* the spi config of the can-controller itself binding everything together */
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ can1: mcp2515 at 1 {
++ reg = <1>;
++ compatible = "microchip,mcp2515";
++ pinctrl-names = "default";
++ pinctrl-0 = <&can1_pins>;
++ spi-max-frequency = <10000000>;
++ interrupt-parent = <&gpio>;
++ interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
++ clocks = <&can1_osc>;
++ };
++ };
++ };
++ __overrides__ {
++ oscillator = <&can1_osc>,"clock-frequency:0";
++ spimaxfrequency = <&can1>,"spi-max-frequency:0";
++ interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
+@@ -0,0 +1,205 @@
++/*
++ * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spidev0>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev1>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target-path = "spi1/spidev at 0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target-path = "spi1/spidev at 1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 4 {
++ target-path = "spi1/spidev at 2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 5 {
++ target-path = "spi2/spidev at 0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 6 {
++ target-path = "spi2/spidev at 1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 7 {
++ target-path = "spi2/spidev at 2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 8 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3008_00: mcp3008 at 0 {
++ compatible = "mcp3008";
++ reg = <0>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 9 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3008_01: mcp3008 at 1 {
++ compatible = "mcp3008";
++ reg = <1>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 10 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3008_10: mcp3008 at 0 {
++ compatible = "mcp3008";
++ reg = <0>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 11 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3008_11: mcp3008 at 1 {
++ compatible = "mcp3008";
++ reg = <1>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 12 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3008_12: mcp3008 at 2 {
++ compatible = "mcp3008";
++ reg = <2>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 13 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3008_20: mcp3008 at 0 {
++ compatible = "mcp3008";
++ reg = <0>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 14 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3008_21: mcp3008 at 1 {
++ compatible = "mcp3008";
++ reg = <1>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 15 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3008_22: mcp3008 at 2 {
++ compatible = "mcp3008";
++ reg = <2>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ __overrides__ {
++ spi0-0-present = <0>, "+0+8";
++ spi0-1-present = <0>, "+1+9";
++ spi1-0-present = <0>, "+2+10";
++ spi1-1-present = <0>, "+3+11";
++ spi1-2-present = <0>, "+4+12";
++ spi2-0-present = <0>, "+5+13";
++ spi2-1-present = <0>, "+6+14";
++ spi2-2-present = <0>, "+7+15";
++ spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0";
++ spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0";
++ spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0";
++ spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0";
++ spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0";
++ spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0";
++ spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0";
++ spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
+@@ -0,0 +1,205 @@
++/*
++ * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spidev0>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev1>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target-path = "spi1/spidev at 0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target-path = "spi1/spidev at 1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 4 {
++ target-path = "spi1/spidev at 2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 5 {
++ target-path = "spi2/spidev at 0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 6 {
++ target-path = "spi2/spidev at 1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 7 {
++ target-path = "spi2/spidev at 2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 8 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3202_00: mcp3202 at 0 {
++ compatible = "mcp3202";
++ reg = <0>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 9 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3202_01: mcp3202 at 1 {
++ compatible = "mcp3202";
++ reg = <1>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 10 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3202_10: mcp3202 at 0 {
++ compatible = "mcp3202";
++ reg = <0>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 11 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3202_11: mcp3202 at 1 {
++ compatible = "mcp3202";
++ reg = <1>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 12 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3202_12: mcp3202 at 2 {
++ compatible = "mcp3202";
++ reg = <2>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 13 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3202_20: mcp3202 at 0 {
++ compatible = "mcp3202";
++ reg = <0>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 14 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3202_21: mcp3202 at 1 {
++ compatible = "mcp3202";
++ reg = <1>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ fragment at 15 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp3202_22: mcp3202 at 2 {
++ compatible = "mcp3202";
++ reg = <2>;
++ spi-max-frequency = <1600000>;
++ };
++ };
++ };
++
++ __overrides__ {
++ spi0-0-present = <0>, "+0+8";
++ spi0-1-present = <0>, "+1+9";
++ spi1-0-present = <0>, "+2+10";
++ spi1-1-present = <0>, "+3+11";
++ spi1-2-present = <0>, "+4+12";
++ spi2-0-present = <0>, "+5+13";
++ spi2-1-present = <0>, "+6+14";
++ spi2-2-present = <0>, "+7+15";
++ spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
++ spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
++ spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
++ spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
++ spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
++ spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
++ spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
++ spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts
+@@ -0,0 +1,134 @@
++/*
++ * Device Tree overlay for Media Center HAT by Pi Supply
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++
++ spidev at 0{
++ status = "disabled";
++ };
++
++ spidev at 1{
++ status = "disabled";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ rpi_display_pins: rpi_display_pins {
++ brcm,pins = <12 23 24 25>;
++ brcm,function = <1 1 1 0>; /* out out out in */
++ brcm,pull = <0 0 0 2>; /* - - - up */
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ rpidisplay: rpi-display at 0{
++ compatible = "ilitek,ili9341";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&rpi_display_pins>;
++
++ spi-max-frequency = <32000000>;
++ rotate = <90>;
++ bgr;
++ fps = <30>;
++ buswidth = <8>;
++ reset-gpios = <&gpio 23 0>;
++ dc-gpios = <&gpio 24 0>;
++ led-gpios = <&gpio 12 1>;
++ debug = <0>;
++ };
++
++ rpidisplay_ts: rpi-display-ts at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++
++ spi-max-frequency = <2000000>;
++ interrupts = <25 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 25 0>;
++ ti,x-plate-ohms = /bits/ 16 <60>;
++ ti,pressure-max = /bits/ 16 <255>;
++ };
++ };
++ };
++
++ fragment at 3 {
++ target-path = "/";
++ __overlay__ {
++ lirc_rpi: lirc_rpi {
++ compatible = "rpi,lirc-rpi";
++ pinctrl-names = "default";
++ pinctrl-0 = <&lirc_pins>;
++ status = "okay";
++
++ // Override autodetection of IR receiver circuit
++ // (0 = active high, 1 = active low, -1 = no override )
++ rpi,sense = <0xffffffff>;
++
++ // Software carrier
++ // (0 = off, 1 = on)
++ rpi,softcarrier = <1>;
++
++ // Invert output
++ // (0 = off, 1 = on)
++ rpi,invert = <0>;
++
++ // Enable debugging messages
++ // (0 = off, 1 = on)
++ rpi,debug = <0>;
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&gpio>;
++ __overlay__ {
++ lirc_pins: lirc_pins {
++ brcm,pins = <6 5>;
++ brcm,function = <1 0>; // out in
++ brcm,pull = <0 1>; // off down
++ };
++ };
++ };
++
++ __overrides__ {
++ speed = <&rpidisplay>,"spi-max-frequency:0";
++ rotate = <&rpidisplay>,"rotate:0";
++ fps = <&rpidisplay>,"fps:0";
++ debug = <&rpidisplay>,"debug:0",
++ <&lirc_rpi>,"rpi,debug:0";
++ xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
++ swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
++ backlight = <&rpidisplay>,"led-gpios:4",
++ <&rpi_display_pins>,"brcm,pins:0";
++
++ gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
++ gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
++ gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
++
++ sense = <&lirc_rpi>,"rpi,sense:0";
++ softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
++ invert = <&lirc_rpi>,"rpi,invert:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
+@@ -0,0 +1,36 @@
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/bcm2835.h>
++
++/*
++ * Fake a higher clock rate to get a larger divisor, and thereby a lower
++ * baudrate. The real clock is 48MHz, which we scale so that requesting
++ * 38.4kHz results in an actual 31.25kHz.
++ *
++ * 48000000*38400/31250 = 58982400
++ */
++
++/{
++ compatible = "brcm,bcm2835";
++
++ fragment at 0 {
++ target-path = "/clocks";
++ __overlay__ {
++ midi_clk: midi_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-output-names = "uart0_pclk";
++ clock-frequency = <58982400>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&uart0>;
++ __overlay__ {
++ clocks = <&midi_clk>,
++ <&clocks BCM2835_CLOCK_VPU>;
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
+@@ -0,0 +1,43 @@
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/bcm2835-aux.h>
++
++/*
++ * Fake a higher clock rate to get a larger divisor, and thereby a lower
++ * baudrate. The real clock is 48MHz, which we scale so that requesting
++ * 38.4kHz results in an actual 31.25kHz.
++ *
++ * 48000000*38400/31250 = 58982400
++ */
++
++/{
++ compatible = "brcm,bcm2835";
++
++ fragment at 0 {
++ target-path = "/clocks";
++ __overlay__ {
++ midi_clk: clock at 5 {
++ compatible = "fixed-factor-clock";
++ #clock-cells = <0>;
++ clocks = <&aux BCM2835_AUX_CLOCK_UART>;
++ clock-mult = <38400>;
++ clock-div = <31250>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&uart1>;
++ __overlay__ {
++ clocks = <&midi_clk>;
++ };
++ };
++
++ fragment at 2 {
++ target = <&aux>;
++ __overlay__ {
++ clock-output-names = "aux_uart", "aux_spi1", "aux_spi2";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts
+@@ -0,0 +1,39 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&mmc>;
++ frag0: __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc_pins>;
++ bus-width = <4>;
++ brcm,overclock-50 = <0>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ mmc_pins: mmc_pins {
++ brcm,pins = <48 49 50 51 52 53>;
++ brcm,function = <7>; /* alt3 */
++ brcm,pull = <0 2 2 2 2 2>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sdhost>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ __overrides__ {
++ overclock_50 = <&frag0>,"brcm,overclock-50:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
+@@ -0,0 +1,28 @@
++// Definitions for MPU6050
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++ clock-frequency = <400000>;
++
++ mpu6050: mpu6050 at 68 {
++ compatible = "invensense,mpu6050";
++ reg = <0x68>;
++ interrupt-parent = <&gpio>;
++ interrupts = <4 1>;
++ };
++ };
++ };
++
++ __overrides__ {
++ interrupt = <&mpu6050>,"interrupts:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
+@@ -0,0 +1,117 @@
++/*
++ * Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ mz61581_pins: mz61581_pins {
++ brcm,pins = <4 15 18 25>;
++ brcm,function = <0 1 1 1>; /* in out out out */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mz61581: mz61581 at 0{
++ compatible = "samsung,s6d02a1";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&mz61581_pins>;
++
++ spi-max-frequency = <128000000>;
++ spi-cpol;
++ spi-cpha;
++
++ width = <320>;
++ height = <480>;
++ rotate = <270>;
++ bgr;
++ fps = <30>;
++ buswidth = <8>;
++ txbuflen = <32768>;
++
++ reset-gpios = <&gpio 15 0>;
++ dc-gpios = <&gpio 25 0>;
++ led-gpios = <&gpio 18 0>;
++
++ init = <0x10000b0 00
++ 0x1000011
++ 0x20000ff
++ 0x10000b3 0x02 0x00 0x00 0x00
++ 0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
++ 0x10000c1 0x08 0x16 0x08 0x08
++ 0x10000c4 0x11 0x07 0x03 0x03
++ 0x10000c6 0x00
++ 0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
++ 0x1000035 0x00
++ 0x1000036 0xa0
++ 0x100003a 0x55
++ 0x1000044 0x00 0x01
++ 0x10000d0 0x07 0x07 0x1d 0x03
++ 0x10000d1 0x03 0x30 0x10
++ 0x10000d2 0x03 0x14 0x04
++ 0x1000029
++ 0x100002c>;
++
++ /* This is a workaround to make sure the init sequence slows down and doesn't fail */
++ debug = <3>;
++ };
++
++ mz61581_ts: mz61581_ts at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++
++ spi-max-frequency = <2000000>;
++ interrupts = <4 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 4 0>;
++
++ ti,x-plate-ohms = /bits/ 16 <60>;
++ ti,pressure-max = /bits/ 16 <255>;
++ };
++ };
++ };
++ __overrides__ {
++ speed = <&mz61581>, "spi-max-frequency:0";
++ rotate = <&mz61581>, "rotate:0";
++ fps = <&mz61581>, "fps:0";
++ txbuflen = <&mz61581>, "txbuflen:0";
++ debug = <&mz61581>, "debug:0";
++ xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts
+@@ -0,0 +1,89 @@
++/* PaPiRus ePaper Screen by Pi Supply */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ display_temp: lm75 at 48 {
++ compatible = "lm75b";
++ reg = <0x48>;
++ status = "okay";
++ #thermal-sensor-cells = <0>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ thermal-zones {
++ display {
++ polling-delay-passive = <0>;
++ polling-delay = <0>;
++ thermal-sensors = <&display_temp>;
++ };
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++
++ spidev at 0{
++ status = "disabled";
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ repaper_pins: repaper_pins {
++ brcm,pins = <14 15 23 24 25>;
++ brcm,function = <1 1 1 1 0>; /* out out out out in */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ repaper: repaper at 0{
++ compatible = "not_set";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&repaper_pins>;
++
++ spi-max-frequency = <8000000>;
++
++ panel-on-gpios = <&gpio 23 0>;
++ border-gpios = <&gpio 14 0>;
++ discharge-gpios = <&gpio 15 0>;
++ reset-gpios = <&gpio 24 0>;
++ busy-gpios = <&gpio 25 0>;
++
++ repaper-thermal-zone = "display";
++ };
++ };
++ };
++
++ __overrides__ {
++ panel = <&repaper>, "compatible";
++ speed = <&repaper>, "spi-max-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
+@@ -0,0 +1,27 @@
++/dts-v1/;
++/plugin/;
++
++/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
++ from the VPU. There is a special driver for this with a separate DT node,
++ which has the unfortunate consequence of breaking the act_led_gpio and
++ act_led_activelow dtparams.
++
++ This overlay changes the GPIO controller back to the standard one and
++ restores the dtparams.
++*/
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&act_led>;
++ frag0: __overlay__ {
++ gpios = <&gpio 0 0>;
++ };
++ };
++
++ __overrides__ {
++ gpio = <&frag0>,"gpios:4";
++ activelow = <&frag0>,"gpios:8";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
+@@ -0,0 +1,46 @@
++/dts-v1/;
++/plugin/;
++
++/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15.
++ To disable the systemd service that initialises the modem so it doesn't use
++ the UART:
++
++ sudo systemctl disable hciuart
++*/
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&uart1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 1 {
++ target = <&uart0>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins>;
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target = <&uart0_pins>;
++ __overlay__ {
++ brcm,pins;
++ brcm,function;
++ brcm,pull;
++ };
++ };
++
++ fragment at 3 {
++ target-path = "/aliases";
++ __overlay__ {
++ serial0 = "/soc/serial at 7e201000";
++ serial1 = "/soc/serial at 7e215040";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
+@@ -0,0 +1,13 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&mmc>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
+@@ -0,0 +1,74 @@
++/dts-v1/;
++/plugin/;
++
++/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
++ UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
++ usable baudrate.
++
++ It is also necessary to edit /lib/systemd/system/hciuart.service and
++ replace ttyAMA0 with ttyS0, unless you have a system with udev rules
++ that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1
++ instead because it will always be correct.
++
++ If cmdline.txt uses the alias serial0 to refer to the user-accessable port
++ then the firmware will replace with the appropriate port whether or not
++ this overlay is used.
++*/
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&uart0>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&uart1>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>;
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target = <&uart0_pins>;
++ __overlay__ {
++ brcm,pins;
++ brcm,function;
++ brcm,pull;
++ };
++ };
++
++ fragment at 3 {
++ target = <&uart1_pins>;
++ __overlay__ {
++ brcm,pins = <32 33>;
++ brcm,function = <2>; /* alt5=UART1 */
++ brcm,pull = <0 2>;
++ };
++ };
++
++ fragment at 4 {
++ target = <&gpio>;
++ __overlay__ {
++ fake_bt_cts: fake_bt_cts {
++ brcm,pins = <31>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment at 5 {
++ target-path = "/aliases";
++ __overlay__ {
++ serial0 = "/soc/serial at 7e201000";
++ serial1 = "/soc/serial at 7e215040";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
+@@ -0,0 +1,102 @@
++/*
++ * Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ piscreen_pins: piscreen_pins {
++ brcm,pins = <17 25 24 22>;
++ brcm,function = <0 1 1 1>; /* in out out out */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ piscreen: piscreen at 0{
++ compatible = "ilitek,ili9486";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&piscreen_pins>;
++
++ spi-max-frequency = <24000000>;
++ rotate = <270>;
++ bgr;
++ fps = <30>;
++ buswidth = <8>;
++ regwidth = <16>;
++ reset-gpios = <&gpio 25 0>;
++ dc-gpios = <&gpio 24 0>;
++ led-gpios = <&gpio 22 1>;
++ debug = <0>;
++
++ init = <0x10000b0 0x00
++ 0x1000011
++ 0x20000ff
++ 0x100003a 0x55
++ 0x1000036 0x28
++ 0x10000c2 0x44
++ 0x10000c5 0x00 0x00 0x00 0x00
++ 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
++ 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
++ 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
++ 0x1000011
++ 0x1000029>;
++ };
++
++ piscreen_ts: piscreen-ts at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++
++ spi-max-frequency = <2000000>;
++ interrupts = <17 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 17 0>;
++ ti,swap-xy;
++ ti,x-plate-ohms = /bits/ 16 <100>;
++ ti,pressure-max = /bits/ 16 <255>;
++ };
++ };
++ };
++ __overrides__ {
++ speed = <&piscreen>,"spi-max-frequency:0";
++ rotate = <&piscreen>,"rotate:0";
++ fps = <&piscreen>,"fps:0";
++ debug = <&piscreen>,"debug:0";
++ xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
+@@ -0,0 +1,106 @@
++ /*
++ * Device Tree overlay for PiScreen2 3.5" TFT with resistive touch by Ozzmaker.com
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ piscreen2_pins: piscreen2_pins {
++ brcm,pins = <17 25 24 22>;
++ brcm,function = <0 1 1 1>; /* in out out out */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ piscreen2: piscreen2 at 0{
++ compatible = "ilitek,ili9486";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&piscreen2_pins>;
++ bgr;
++ spi-max-frequency = <64000000>;
++ rotate = <90>;
++ fps = <30>;
++ buswidth = <8>;
++ regwidth = <16>;
++ txbuflen = <32768>;
++ reset-gpios = <&gpio 25 0>;
++ dc-gpios = <&gpio 24 0>;
++ led-gpios = <&gpio 22 1>;
++ debug = <0>;
++
++ init = <0x10000b0 0x00
++ 0x1000011
++ 0x20000ff
++ 0x100003a 0x55
++ 0x1000036 0x28
++ 0x10000c0 0x11 0x09
++ 0x10000c1 0x41
++ 0x10000c5 0x00 0x00 0x00 0x00
++ 0x10000b6 0x00 0x02
++ 0x10000f7 0xa9 0x51 0x2c 0x2
++ 0x10000be 0x00 0x04
++ 0x10000e9 0x00
++ 0x1000011
++ 0x1000029>;
++
++ };
++
++ piscreen2_ts: piscreen2-ts at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++
++ spi-max-frequency = <2000000>;
++ interrupts = <17 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 17 0>;
++ ti,swap-xy;
++ ti,x-plate-ohms = /bits/ 16 <100>;
++ ti,pressure-max = /bits/ 16 <255>;
++ };
++ };
++ };
++ __overrides__ {
++ speed = <&piscreen2>,"spi-max-frequency:0";
++ rotate = <&piscreen2>,"rotate:0";
++ fps = <&piscreen2>,"fps:0";
++ debug = <&piscreen2>,"debug:0";
++ xohms = <&piscreen2_ts>,"ti,x-plate-ohms;0";
++ };
++};
++
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
+@@ -0,0 +1,120 @@
++/*
++ * Pisound Linux kernel module.
++ * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; version 2 of the
++ * License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 3 {
++ target = <&spi0>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pisound_spi: pisound_spi at 0{
++ compatible = "blokaslabs,pisound-spi";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins>;
++ spi-max-frequency = <1000000>;
++ };
++ };
++ };
++
++ fragment at 4 {
++ target-path = "/";
++ __overlay__ {
++ pcm5102a-codec {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5102a";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 5 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "blokaslabs,pisound";
++ i2s-controller = <&i2s>;
++ status = "okay";
++
++ pinctrl-0 = <&pisound_button_pins>;
++
++ osr-gpios =
++ <&gpio 13 GPIO_ACTIVE_HIGH>,
++ <&gpio 26 GPIO_ACTIVE_HIGH>,
++ <&gpio 16 GPIO_ACTIVE_HIGH>;
++
++ reset-gpios =
++ <&gpio 12 GPIO_ACTIVE_HIGH>,
++ <&gpio 24 GPIO_ACTIVE_HIGH>;
++
++ data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
++
++ button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ fragment at 6 {
++ target = <&gpio>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pisound_button_pins>;
++
++ pisound_button_pins: pisound_button_pins {
++ brcm,pins = <17>;
++ brcm,function = <0>; // Input
++ brcm,pull = <2>; // Pull-Up
++ };
++ };
++ };
++
++ fragment at 7 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
+@@ -0,0 +1,69 @@
++/*
++ * Device Tree overlay for pitft by Adafruit
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++
++ spidev at 0{
++ status = "disabled";
++ };
++
++ spidev at 1{
++ status = "disabled";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ pitft_pins: pitft_pins {
++ brcm,pins = <25>;
++ brcm,function = <1>; /* out */
++ brcm,pull = <0>; /* none */
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pitft: pitft at 0{
++ compatible = "ilitek,ili9340";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pitft_pins>;
++
++ spi-max-frequency = <32000000>;
++ rotate = <90>;
++ fps = <25>;
++ bgr;
++ buswidth = <8>;
++ dc-gpios = <&gpio 25 0>;
++ debug = <0>;
++ };
++
++ };
++ };
++
++ __overrides__ {
++ speed = <&pitft>,"spi-max-frequency:0";
++ rotate = <&pitft>,"rotate:0";
++ fps = <&pitft>,"fps:0";
++ debug = <&pitft>,"debug:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
+@@ -0,0 +1,91 @@
++/*
++ * Device Tree overlay for Adafruit PiTFT 2.8" capacitive touch screen
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&gpio>;
++ __overlay__ {
++ pitft_pins: pitft_pins {
++ brcm,pins = <24 25>;
++ brcm,function = <0 1>; /* in out */
++ brcm,pull = <2 0>; /* pullup none */
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pitft: pitft at 0{
++ compatible = "ilitek,ili9340";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pitft_pins>;
++
++ spi-max-frequency = <32000000>;
++ rotate = <90>;
++ fps = <25>;
++ bgr;
++ buswidth = <8>;
++ dc-gpios = <&gpio 25 0>;
++ debug = <0>;
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&i2c1>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ft6236: ft6236 at 38 {
++ compatible = "focaltech,ft6236";
++ reg = <0x38>;
++
++ interrupt-parent = <&gpio>;
++ interrupts = <24 2>;
++ touchscreen-size-x = <240>;
++ touchscreen-size-y = <320>;
++ };
++ };
++ };
++
++ __overrides__ {
++ speed = <&pitft>,"spi-max-frequency:0";
++ rotate = <&pitft>,"rotate:0";
++ fps = <&pitft>,"fps:0";
++ debug = <&pitft>,"debug:0";
++ touch-sizex = <&ft6236>,"touchscreen-size-x?";
++ touch-sizey = <&ft6236>,"touchscreen-size-y?";
++ touch-invx = <&ft6236>,"touchscreen-inverted-x?";
++ touch-invy = <&ft6236>,"touchscreen-inverted-y?";
++ touch-swapxy = <&ft6236>,"touchscreen-swapped-x-y?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
+@@ -0,0 +1,121 @@
++/*
++ * Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ pitft_pins: pitft_pins {
++ brcm,pins = <24 25>;
++ brcm,function = <0 1>; /* in out */
++ brcm,pull = <2 0>; /* pullup none */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pitft: pitft at 0{
++ compatible = "ilitek,ili9340";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pitft_pins>;
++
++ spi-max-frequency = <32000000>;
++ rotate = <90>;
++ fps = <25>;
++ bgr;
++ buswidth = <8>;
++ dc-gpios = <&gpio 25 0>;
++ debug = <0>;
++ };
++
++ pitft_ts at 1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "st,stmpe610";
++ reg = <1>;
++
++ spi-max-frequency = <500000>;
++ irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
++ interrupts = <24 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++
++ stmpe_touchscreen {
++ compatible = "st,stmpe-ts";
++ st,sample-time = <4>;
++ st,mod-12b = <1>;
++ st,ref-sel = <0>;
++ st,adc-freq = <2>;
++ st,ave-ctrl = <3>;
++ st,touch-det-delay = <4>;
++ st,settling = <2>;
++ st,fraction-z = <7>;
++ st,i-drive = <0>;
++ };
++
++ stmpe_gpio: stmpe_gpio {
++ #gpio-cells = <2>;
++ compatible = "st,stmpe-gpio";
++ /*
++ * only GPIO2 is wired/available
++ * and it is wired to the backlight
++ */
++ st,norequest-mask = <0x7b>;
++ };
++ };
++ };
++ };
++
++ fragment at 5 {
++ target-path = "/soc";
++ __overlay__ {
++ backlight {
++ compatible = "gpio-backlight";
++ gpios = <&stmpe_gpio 2 0>;
++ default-on;
++ };
++ };
++ };
++
++ __overrides__ {
++ speed = <&pitft>,"spi-max-frequency:0";
++ rotate = <&pitft>,"rotate:0";
++ fps = <&pitft>,"fps:0";
++ debug = <&pitft>,"debug:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
+@@ -0,0 +1,121 @@
++/*
++ * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ pitft_pins: pitft_pins {
++ brcm,pins = <24 25>;
++ brcm,function = <0 1>; /* in out */
++ brcm,pull = <2 0>; /* pullup none */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pitft: pitft at 0{
++ compatible = "himax,hx8357d";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pitft_pins>;
++
++ spi-max-frequency = <32000000>;
++ rotate = <90>;
++ fps = <25>;
++ bgr;
++ buswidth = <8>;
++ dc-gpios = <&gpio 25 0>;
++ debug = <0>;
++ };
++
++ pitft_ts at 1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "st,stmpe610";
++ reg = <1>;
++
++ spi-max-frequency = <500000>;
++ irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
++ interrupts = <24 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++
++ stmpe_touchscreen {
++ compatible = "st,stmpe-ts";
++ st,sample-time = <4>;
++ st,mod-12b = <1>;
++ st,ref-sel = <0>;
++ st,adc-freq = <2>;
++ st,ave-ctrl = <3>;
++ st,touch-det-delay = <4>;
++ st,settling = <2>;
++ st,fraction-z = <7>;
++ st,i-drive = <0>;
++ };
++
++ stmpe_gpio: stmpe_gpio {
++ #gpio-cells = <2>;
++ compatible = "st,stmpe-gpio";
++ /*
++ * only GPIO2 is wired/available
++ * and it is wired to the backlight
++ */
++ st,norequest-mask = <0x7b>;
++ };
++ };
++ };
++ };
++
++ fragment at 5 {
++ target-path = "/soc";
++ __overlay__ {
++ backlight {
++ compatible = "gpio-backlight";
++ gpios = <&stmpe_gpio 2 0>;
++ default-on;
++ };
++ };
++ };
++
++ __overrides__ {
++ speed = <&pitft>,"spi-max-frequency:0";
++ rotate = <&pitft>,"rotate:0";
++ fps = <&pitft>,"fps:0";
++ debug = <&pitft>,"debug:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
+@@ -0,0 +1,38 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ pps: pps at 12 {
++ compatible = "pps-gpio";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pps_pins>;
++ gpios = <&gpio 18 0>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ pps_pins: pps_pins at 12 {
++ brcm,pins = <18>;
++ brcm,function = <0>; // in
++ brcm,pull = <0>; // off
++ };
++ };
++ };
++
++ __overrides__ {
++ gpiopin = <&pps>,"gpios:4",
++ <&pps>,"reg:0",
++ <&pps_pins>,"brcm,pins:0",
++ <&pps_pins>,"reg:0";
++ assert_falling_edge = <&pps>,"assert-falling-edge?";
++ capture_clear = <&pps>,"capture-clear?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
+@@ -0,0 +1,47 @@
++/dts-v1/;
++/plugin/;
++
++/*
++This is the 2-channel overlay - only use it if you need both channels.
++
++Legal pin,function combinations for each channel:
++ PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
++ PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
++
++N.B.:
++ 1) Pin 18 is the only one available on all platforms, and
++ it is the one used by the I2S audio interface.
++ Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
++ 2) The onboard analogue audio output uses both PWM channels.
++ 3) So be careful mixing audio and PWM.
++*/
++
++/ {
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ pwm_pins: pwm_pins {
++ brcm,pins = <18 19>;
++ brcm,function = <2 2>; /* Alt5 */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&pwm>;
++ frag1: __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm_pins>;
++ assigned-clock-rates = <100000000>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ pin = <&pwm_pins>,"brcm,pins:0";
++ pin2 = <&pwm_pins>,"brcm,pins:4";
++ func = <&pwm_pins>,"brcm,function:0";
++ func2 = <&pwm_pins>,"brcm,function:4";
++ clock = <&frag1>,"assigned-clock-rates:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
+@@ -0,0 +1,43 @@
++/dts-v1/;
++/plugin/;
++
++/*
++Legal pin,function combinations for each channel:
++ PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
++ PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
++
++N.B.:
++ 1) Pin 18 is the only one available on all platforms, and
++ it is the one used by the I2S audio interface.
++ Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
++ 2) The onboard analogue audio output uses both PWM channels.
++ 3) So be careful mixing audio and PWM.
++*/
++
++/ {
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ pwm_pins: pwm_pins {
++ brcm,pins = <18>;
++ brcm,function = <2>; /* Alt5 */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&pwm>;
++ frag1: __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm_pins>;
++ assigned-clock-rates = <100000000>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ pin = <&pwm_pins>,"brcm,pins:0";
++ func = <&pwm_pins>,"brcm,function:0";
++ clock = <&frag1>,"assigned-clock-rates:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
+@@ -0,0 +1,52 @@
++// Overlay for the Qualcomm Atheros QCA7000 on I2SE's PLC Stamp micro EVK
++// Visit: https://www.i2se.com/product/plc-stamp-micro-evk for details
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++
++ spidev at 0 {
++ status = "disabled";
++ };
++
++ eth1: qca7000 at 0 {
++ compatible = "qca,qca7000";
++ reg = <0>; /* CE0 */
++ pinctrl-names = "default";
++ pinctrl-0 = <ð1_pins>;
++ interrupt-parent = <&gpio>;
++ interrupts = <23 0x1>; /* rising edge */
++ spi-max-frequency = <12000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ eth1_pins: eth1_pins {
++ brcm,pins = <23>;
++ brcm,function = <0>; /* in */
++ brcm,pull = <0>; /* none */
++ };
++ };
++ };
++
++ __overrides__ {
++ int_pin = <ð1>, "interrupts:0",
++ <ð1_pins>, "brcm,pins:0";
++ speed = <ð1>, "spi-max-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
+@@ -0,0 +1,59 @@
++// Device tree overlay for GPIO connected rotary encoder.
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ rotary_pins: rotary_pins at 4 {
++ brcm,pins = <4 17>; /* gpio 4 17 */
++ brcm,function = <0 0>; /* input */
++ brcm,pull = <2 2>; /* pull-up */
++ };
++
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ rotary: rotary at 4 {
++ compatible = "rotary-encoder";
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&rotary_pins>;
++ gpios = <&gpio 4 0>, <&gpio 17 0>;
++ linux,axis = <0>; /* REL_X */
++ rotary-encoder,encoding = "gray";
++ rotary-encoder,steps = <24>; /* 24 default */
++ rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */
++ };
++ };
++
++ };
++
++ __overrides__ {
++ pin_a = <&rotary>,"gpios:4",
++ <&rotary_pins>,"brcm,pins:0",
++ /* modify reg values to allow multiple instantiation */
++ <&rotary>,"reg:0",
++ <&rotary_pins>,"reg:0";
++ pin_b = <&rotary>,"gpios:16",
++ <&rotary_pins>,"brcm,pins:4";
++ relative_axis = <&rotary>,"rotary-encoder,relative-axis?";
++ linux_axis = <&rotary>,"linux,axis:0";
++ rollover = <&rotary>,"rotary-encoder,rollover?";
++ steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0";
++ steps = <&rotary>,"rotary-encoder,steps:0";
++ wakeup = <&rotary>,"wakeup-source?";
++ encoding = <&rotary>,"rotary-encoder,encoding";
++ /* legacy parameters*/
++ rotary0_pin_a = <&rotary>,"gpios:4",
++ <&rotary_pins>,"brcm,pins:0";
++ rotary0_pin_b = <&rotary>,"gpios:16",
++ <&rotary_pins>,"brcm,pins:4";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
+@@ -0,0 +1,21 @@
++/*
++ * Devicetree overlay for mailbox-driven Raspberry Pi DSI Display
++ * backlight controller
++ */
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ rpi_backlight: rpi_backlight {
++ compatible = "raspberrypi,rpi-backlight";
++ firmware = <&firmware>;
++ status = "okay";
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
+@@ -0,0 +1,146 @@
++// Definitions for the Cirrus Logic Audio Card
++/dts-v1/;
++/plugin/;
++#include <dt-bindings/pinctrl/bcm2835.h>
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/mfd/arizona.h>
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ wlf_pins: wlf_pins {
++ brcm,pins = <17 22 27 8>;
++ brcm,function = <
++ BCM2835_FSEL_GPIO_OUT
++ BCM2835_FSEL_GPIO_OUT
++ BCM2835_FSEL_GPIO_IN
++ BCM2835_FSEL_GPIO_OUT
++ >;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target-path = "/";
++ __overlay__ {
++ rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 {
++ compatible = "regulator-fixed";
++ regulator-name = "RPi-Cirrus 1v8";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-always-on;
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&spi0>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ spidev at 0{
++ status = "disabled";
++ };
++
++ spidev at 1{
++ status = "disabled";
++ };
++
++ wm5102 at 1{
++ compatible = "wlf,wm5102";
++ reg = <1>;
++
++ spi-max-frequency = <500000>;
++
++ interrupt-parent = <&gpio>;
++ interrupts = <27 8>;
++ interrupt-controller;
++ #interrupt-cells = <2>;
++
++ gpio-controller;
++ #gpio-cells = <2>;
++
++ LDOVDD-supply = <&rpi_cirrus_reg_1v8>;
++ AVDD-supply = <&rpi_cirrus_reg_1v8>;
++ DBVDD1-supply = <&rpi_cirrus_reg_1v8>;
++ DBVDD2-supply = <&vdd_3v3_reg>;
++ DBVDD3-supply = <&vdd_3v3_reg>;
++ CPVDD-supply = <&rpi_cirrus_reg_1v8>;
++ SPKVDDL-supply = <&vdd_5v0_reg>;
++ SPKVDDR-supply = <&vdd_5v0_reg>;
++ DCVDD-supply = <&arizona_ldo1>;
++
++ wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>;
++ wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>;
++ wlf,gpio-defaults = <
++ ARIZONA_GP_DEFAULT
++ ARIZONA_GP_DEFAULT
++ ARIZONA_GP_DEFAULT
++ ARIZONA_GP_DEFAULT
++ ARIZONA_GP_DEFAULT
++ >;
++ wlf,micd-configs = <0 1 0>;
++ wlf,dmic-ref = <
++ ARIZONA_DMIC_MICVDD
++ ARIZONA_DMIC_MICBIAS2
++ ARIZONA_DMIC_MICVDD
++ ARIZONA_DMIC_MICVDD
++ >;
++ wlf,inmode = <
++ ARIZONA_INMODE_DIFF
++ ARIZONA_INMODE_DMIC
++ ARIZONA_INMODE_SE
++ ARIZONA_INMODE_DIFF
++ >;
++ status = "okay";
++
++ arizona_ldo1: ldo1 {
++ regulator-name = "LDO1";
++ // default constraints as in
++ // arizona-ldo1.c
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1800000>;
++ };
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&i2c1>;
++ __overlay__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ wm8804 at 3b {
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ PVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
++ };
++ };
++ };
++
++ fragment at 5 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "wlf,rpi-cirrus";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
+@@ -0,0 +1,34 @@
++// Definitions for RPi DAC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ pcm1794a-codec {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm1794a";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "rpi,rpi-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
+@@ -0,0 +1,91 @@
++/*
++ * Device Tree overlay for rpi-display by Watterott
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ rpi_display_pins: rpi_display_pins {
++ brcm,pins = <18 23 24 25>;
++ brcm,function = <1 1 1 0>; /* out out out in */
++ brcm,pull = <0 0 0 2>; /* - - - up */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ rpidisplay: rpi-display at 0{
++ compatible = "ilitek,ili9341";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&rpi_display_pins>;
++
++ spi-max-frequency = <32000000>;
++ rotate = <270>;
++ bgr;
++ fps = <30>;
++ buswidth = <8>;
++ reset-gpios = <&gpio 23 0>;
++ dc-gpios = <&gpio 24 0>;
++ led-gpios = <&gpio 18 1>;
++ debug = <0>;
++ };
++
++ rpidisplay_ts: rpi-display-ts at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++
++ spi-max-frequency = <2000000>;
++ interrupts = <25 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 25 0>;
++ ti,x-plate-ohms = /bits/ 16 <60>;
++ ti,pressure-max = /bits/ 16 <255>;
++ };
++ };
++ };
++ __overrides__ {
++ speed = <&rpidisplay>,"spi-max-frequency:0";
++ rotate = <&rpidisplay>,"rotate:0";
++ fps = <&rpidisplay>,"fps:0";
++ debug = <&rpidisplay>,"debug:0";
++ xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
++ swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
++ backlight = <&rpidisplay>,"led-gpios:4",
++ <&rpi_display_pins>,"brcm,pins:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
+@@ -0,0 +1,30 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ rpi_ft5406: rpi_ft5406 {
++ compatible = "rpi,rpi-ft5406";
++ firmware = <&firmware>;
++ status = "okay";
++ touchscreen-size-x = <800>;
++ touchscreen-size-y = <480>;
++ touchscreen-inverted-x = <0>;
++ touchscreen-inverted-y = <0>;
++ touchscreen-swapped-x-y = <0>;
++ };
++ };
++ };
++
++ __overrides__ {
++ touchscreen-size-x = <&rpi_ft5406>,"touchscreen-size-x:0";
++ touchscreen-size-y = <&rpi_ft5406>,"touchscreen-size-y:0";
++ touchscreen-inverted-x = <&rpi_ft5406>,"touchscreen-inverted-x:0";
++ touchscreen-inverted-y = <&rpi_ft5406>,"touchscreen-inverted-y:0";
++ touchscreen-swapped-x-y = <&rpi_ft5406>,"touchscreen-swapped-x-y:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for Rpi-Proto
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8731 at 1a {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8731";
++ reg = <0x1a>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "rpi,rpi-proto";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
+@@ -0,0 +1,47 @@
++// rpi-sense HAT
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ rpi-sense at 46 {
++ compatible = "rpi,rpi-sense";
++ reg = <0x46>;
++ keys-int-gpios = <&gpio 23 1>;
++ status = "okay";
++ };
++
++ lsm9ds1-magn at 1c {
++ compatible = "st,lsm9ds1-magn";
++ reg = <0x1c>;
++ status = "okay";
++ };
++
++ lsm9ds1-accel6a {
++ compatible = "st,lsm9ds1-accel";
++ reg = <0x6a>;
++ status = "okay";
++ };
++
++ lps25h-press at 5c {
++ compatible = "st,lps25h-press";
++ reg = <0x5c>;
++ status = "okay";
++ };
++
++ hts221-humid at 5f {
++ compatible = "st,hts221-humid";
++ reg = <0x5f>;
++ status = "okay";
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
+@@ -0,0 +1,31 @@
++// rpi-tv HAT
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++
++ spidev at 0 {
++ status = "disabled";
++ };
++
++ cxd2880 at 0 {
++ compatible = "sony,cxd2880";
++ reg = <0>; /* CE0 */
++ spi-max-frequency = <50000000>;
++ status = "okay";
++ };
++ };
++ };
++
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
+@@ -0,0 +1,49 @@
++// Definitions for RRA DigiDAC1 Audio card
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804 at 3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ PVDD-supply = <&vdd_3v3_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ };
++
++ wm8742: wm8741 at 1a {
++ compatible = "wlf,wm8741";
++ reg = <0x1a>;
++ status = "okay";
++ AVDD-supply = <&vdd_5v0_reg>;
++ DVDD-supply = <&vdd_3v3_reg>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "rra,digidac1-soundcard";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
+@@ -0,0 +1,37 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ sc16is750: sc16is750 at 48 {
++ compatible = "nxp,sc16is750";
++ reg = <0x48>; /* address */
++ clocks = <&sc16is750_clk>;
++ interrupt-parent = <&gpio>;
++ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
++ #gpio-cells = <2>;
++
++ sc16is750_clk: sc16is750_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <14745600>;
++ };
++ };
++ };
++ };
++
++
++ __overrides__ {
++ int_pin = <&sc16is750>,"interrupts:0";
++ addr = <&sc16is750>,"reg:0";
++ };
++
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
+@@ -0,0 +1,61 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi1_pins: spi1_pins {
++ brcm,pins = <19 20 21>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi1_cs_pins: spi1_cs_pins {
++ brcm,pins = <18>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi1>;
++ frag1: __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
++ cs-gpios = <&gpio 18 1>;
++ status = "okay";
++
++ sc16is752: sc16is752 at 0 {
++ compatible = "nxp,sc16is752";
++ reg = <0>; /* CE0 */
++ clocks = <&sc16is752_clk>;
++ interrupt-parent = <&gpio>;
++ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
++ #gpio-controller;
++ #gpio-cells = <2>;
++ spi-max-frequency = <4000000>;
++
++ sc16is752_clk: sc16is752_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <14745600>;
++ };
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ int_pin = <&sc16is752>,"interrupts:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
+@@ -0,0 +1,31 @@
++/dts-v1/;
++/plugin/;
++
++/* Provide backwards compatible aliases for the old sdhost dtparams. */
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&sdhost>;
++ frag0: __overlay__ {
++ brcm,overclock-50 = <0>;
++ brcm,pio-limit = <1>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&mmc>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ __overrides__ {
++ overclock_50 = <&frag0>,"brcm,overclock-50:0";
++ force_pio = <&frag0>,"brcm,force-pio?";
++ pio_limit = <&frag0>,"brcm,pio-limit:0";
++ debug = <&frag0>,"brcm,debug?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts
+@@ -0,0 +1,63 @@
++/dts-v1/;
++/plugin/;
++
++/* Enable 1-bit SDIO from MMC interface via GPIOs 22-25. Includes sdhost overlay. */
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&mmc>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 1 {
++ target = <&soc>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ sdio_1bit: sdio at 7e300000 {
++ compatible = "brcm,bcm2835-mmc",
++ "brcm,bcm2835-sdhci";
++ reg = <0x7e300000 0x100>;
++ interrupts = <2 30>;
++ clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>;
++ dmas = <&dma 11>;
++ dma-names = "rx-tx";
++ brcm,overclock-50 = <0>;
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdio_1bit_pins>;
++ non-removable;
++ bus-width = <1>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&gpio>;
++ __overlay__ {
++ sdio_1bit_pins: sdio_1bit_pins {
++ brcm,pins = <22 23 24 25>;
++ brcm,function = <7>; /* ALT3 = SD1 */
++ brcm,pull = <0 2 2 2>;
++ };
++ };
++ };
++
++ fragment at 3 {
++ target-path = "/aliases";
++ __overlay__ {
++ mmc1 = "/soc/sdio at 7e300000";
++ };
++ };
++
++
++ __overrides__ {
++ poll_once = <&sdio_1bit>,"non-removable?";
++ sdio_overclock = <&sdio_1bit>,"brcm,overclock-50:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts
+@@ -0,0 +1,63 @@
++/dts-v1/;
++/plugin/;
++
++/* Enable SDIO from MMC interface via GPIOs 22-27. Includes sdhost overlay. */
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&mmc>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 1 {
++ target = <&soc>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ sdio_ovl: sdio at 7e300000 {
++ compatible = "brcm,bcm2835-mmc",
++ "brcm,bcm2835-sdhci";
++ reg = <0x7e300000 0x100>;
++ interrupts = <2 30>;
++ clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>;
++ dmas = <&dma 11>;
++ dma-names = "rx-tx";
++ brcm,overclock-50 = <0>;
++ status = "okay";
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdio_ovl_pins>;
++ non-removable;
++ bus-width = <1>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&gpio>;
++ __overlay__ {
++ sdio_ovl_pins: sdio_ovl_pins {
++ brcm,pins = <22 23 24 25 26 27>;
++ brcm,function = <7>; /* ALT3 = SD1 */
++ brcm,pull = <0 2 2 2 2 2>;
++ };
++ };
++ };
++
++ fragment at 3 {
++ target-path = "/aliases";
++ __overlay__ {
++ mmc1 = "/soc/sdio at 7e300000";
++ };
++ };
++
++ __overrides__ {
++ poll_once = <&sdio_ovl>,"non-removable?";
++ bus_width = <&sdio_ovl>,"bus-width:0";
++ sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts
+@@ -0,0 +1,23 @@
++/dts-v1/;
++/plugin/;
++
++/* Provide backwards compatible aliases for the old sdhost dtparams. */
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&sdhost>;
++ frag0: __overlay__ {
++ brcm,overclock-50 = <0>;
++ brcm,pio-limit = <1>;
++ };
++ };
++
++ __overrides__ {
++ overclock_50 = <&frag0>,"brcm,overclock-50:0";
++ force_pio = <&frag0>,"brcm,force-pio?";
++ pio_limit = <&frag0>,"brcm,pio-limit:0";
++ debug = <&frag0>,"brcm,debug?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
+@@ -0,0 +1,18 @@
++// Description: Overlay to enable character device interface for SMI.
++// Author: Luke Wren <luke at raspberrypi.org>
++
++/dts-v1/;
++/plugin/;
++
++/{
++ fragment at 0 {
++ target = <&soc>;
++ __overlay__ {
++ smi_dev {
++ compatible = "brcm,bcm2835-smi-dev";
++ smi_handle = <&smi>;
++ status = "okay";
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
+@@ -0,0 +1,69 @@
++// Description: Overlay to enable NAND flash through
++// the secondary memory interface
++// Author: Luke Wren
++
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&smi>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&smi_pins>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&soc>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ nand: flash at 0 {
++ compatible = "brcm,bcm2835-smi-nand";
++ smi_handle = <&smi>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ status = "okay";
++
++ partition at 0 {
++ label = "stage2";
++ // 128k
++ reg = <0 0x20000>;
++ read-only;
++ };
++ partition at 1 {
++ label = "firmware";
++ // 16M
++ reg = <0x20000 0x1000000>;
++ read-only;
++ };
++ partition at 2 {
++ label = "root";
++ // 2G (will need to use 64 bit for >=4G)
++ reg = <0x1020000 0x80000000>;
++ };
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&gpio>;
++ __overlay__ {
++ smi_pins: smi_pins {
++ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
++ 12 13 14 15>;
++ /* Alt 1: SMI */
++ brcm,function = <5 5 5 5 5 5 5 5 5 5 5
++ 5 5 5 5 5>;
++ /* /CS, /WE and /OE are pulled high, as they are
++ generally active low signals */
++ brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/smi-overlay.dts
+@@ -0,0 +1,37 @@
++// Description: Overlay to enable the secondary memory interface peripheral
++// Author: Luke Wren
++
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&smi>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&smi_pins>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ smi_pins: smi_pins {
++ /* Don't configure the top two address bits, as
++ these are already used as ID_SD and ID_SC */
++ brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
++ 16 17 18 19 20 21 22 23 24 25>;
++ /* Alt 0: SMI */
++ brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
++ 5 5 5 5 5 5 5 5 5>;
++ /* /CS, /WE and /OE are pulled high, as they are
++ generally active low signals */
++ brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0
++ 0 0 0 0 0 0 0>;
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
+@@ -0,0 +1,31 @@
++/*
++ * Device tree overlay to move spi0 to gpio 35 to 39 on CM
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ cs-gpios = <&gpio 36 1>, <&gpio 35 1>;
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi0_cs_pins>;
++ __overlay__ {
++ brcm,pins = <36 35>;
++ };
++ };
++
++ fragment at 2 {
++ target = <&spi0_pins>;
++ __overlay__ {
++ brcm,pins = <37 38 39>;
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
+@@ -0,0 +1,33 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&spidev0>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ rtc-pcf2123 at 0 {
++ compatible = "nxp,rtc-pcf2123";
++ spi-max-frequency = <5000000>;
++ spi-cs-high = <1>;
++ reg = <0>;
++ };
++ };
++ };
++
++ __overrides__ {
++ pcf2123 = <0>, "=0=1";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
+@@ -0,0 +1,29 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0_cs_pins>;
++ frag0: __overlay__ {
++ brcm,pins = <8 7>;
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi0>;
++ frag1: __overlay__ {
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cs0_pin = <&frag0>,"brcm,pins:0",
++ <&frag1>,"cs-gpios:4";
++ cs1_pin = <&frag0>,"brcm,pins:4",
++ <&frag1>,"cs-gpios:16";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
+@@ -0,0 +1,26 @@
++/*
++ * Device tree overlay to re-enable hardware CS for SPI0
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ cs-gpios = <0>, <0>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi0_cs_pins>;
++ __overlay__ {
++ brcm,pins = <8 7>;
++ brcm,function = <4>; /* alt0 */
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
+@@ -0,0 +1,57 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi1_pins: spi1_pins {
++ brcm,pins = <19 20 21>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi1_cs_pins: spi1_cs_pins {
++ brcm,pins = <18>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi1>;
++ frag1: __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
++ cs-gpios = <&gpio 18 1>;
++ status = "okay";
++
++ spidev1_0: spidev at 0 {
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
++ <&frag1>,"cs-gpios:4";
++ cs0_spidev = <&spidev1_0>,"status";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
+@@ -0,0 +1,69 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi1_pins: spi1_pins {
++ brcm,pins = <19 20 21>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi1_cs_pins: spi1_cs_pins {
++ brcm,pins = <18 17>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi1>;
++ frag1: __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
++ cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
++ status = "okay";
++
++ spidev1_0: spidev at 0 {
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++
++ spidev1_1: spidev at 1 {
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
++ <&frag1>,"cs-gpios:4";
++ cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
++ <&frag1>,"cs-gpios:16";
++ cs0_spidev = <&spidev1_0>,"status";
++ cs1_spidev = <&spidev1_1>,"status";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
+@@ -0,0 +1,81 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi1_pins: spi1_pins {
++ brcm,pins = <19 20 21>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi1_cs_pins: spi1_cs_pins {
++ brcm,pins = <18 17 16>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi1>;
++ frag1: __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
++ cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
++ status = "okay";
++
++ spidev1_0: spidev at 0 {
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++
++ spidev1_1: spidev at 1 {
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++
++ spidev1_2: spidev at 2 {
++ compatible = "spidev";
++ reg = <2>; /* CE2 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
++ <&frag1>,"cs-gpios:4";
++ cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
++ <&frag1>,"cs-gpios:16";
++ cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
++ <&frag1>,"cs-gpios:28";
++ cs0_spidev = <&spidev1_0>,"status";
++ cs1_spidev = <&spidev1_1>,"status";
++ cs2_spidev = <&spidev1_2>,"status";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
+@@ -0,0 +1,57 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi2_pins: spi2_pins {
++ brcm,pins = <40 41 42>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi2_cs_pins: spi2_cs_pins {
++ brcm,pins = <43>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi2>;
++ frag1: __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
++ cs-gpios = <&gpio 43 1>;
++ status = "okay";
++
++ spidev2_0: spidev at 0 {
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
++ <&frag1>,"cs-gpios:4";
++ cs0_spidev = <&spidev2_0>,"status";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
+@@ -0,0 +1,69 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi2_pins: spi2_pins {
++ brcm,pins = <40 41 42>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi2_cs_pins: spi2_cs_pins {
++ brcm,pins = <43 44>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi2>;
++ frag1: __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
++ cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
++ status = "okay";
++
++ spidev2_0: spidev at 0 {
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++
++ spidev2_1: spidev at 1 {
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
++ <&frag1>,"cs-gpios:4";
++ cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
++ <&frag1>,"cs-gpios:16";
++ cs0_spidev = <&spidev2_0>,"status";
++ cs1_spidev = <&spidev2_1>,"status";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
+@@ -0,0 +1,81 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi2_pins: spi2_pins {
++ brcm,pins = <40 41 42>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi2_cs_pins: spi2_cs_pins {
++ brcm,pins = <43 44 45>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi2>;
++ frag1: __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
++ cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
++ status = "okay";
++
++ spidev2_0: spidev at 0 {
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++
++ spidev2_1: spidev at 1 {
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++
++ spidev2_2: spidev at 2 {
++ compatible = "spidev";
++ reg = <2>; /* CE2 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
++ <&frag1>,"cs-gpios:4";
++ cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
++ <&frag1>,"cs-gpios:16";
++ cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
++ <&frag1>,"cs-gpios:28";
++ cs0_spidev = <&spidev2_0>,"status";
++ cs1_spidev = <&spidev2_1>,"status";
++ cs2_spidev = <&spidev2_2>,"status";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
+@@ -0,0 +1,224 @@
++/*
++ * tinylcd35-overlay.dts
++ *
++ * -------------------------------------------------
++ * www.tinlylcd.com
++ * -------------------------------------------------
++ * Device---Driver-----BUS GPIO's
++ * display tinylcd35 spi0.0 25 24 18
++ * touch ads7846 spi0.1 5
++ * rtc ds1307 i2c1-0068
++ * rtc pcf8563 i2c1-0051
++ * keypad gpio-keys --------- 17 22 27 23 28
++ *
++ *
++ * TinyLCD.com 3.5 inch TFT
++ *
++ * Version 001
++ * 5/3/2015 -- Noralf Trønnes Initial Device tree framework
++ * 10/3/2015 -- tinylcd at gmail.com added ds1307 support.
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 3 {
++ target = <&gpio>;
++ __overlay__ {
++ tinylcd35_pins: tinylcd35_pins {
++ brcm,pins = <25 24 18>;
++ brcm,function = <1>; /* out */
++ };
++ tinylcd35_ts_pins: tinylcd35_ts_pins {
++ brcm,pins = <5>;
++ brcm,function = <0>; /* in */
++ };
++ keypad_pins: keypad_pins {
++ brcm,pins = <4 17 22 23 27>;
++ brcm,function = <0>; /* in */
++ brcm,pull = <1>; /* down */
++ };
++ };
++ };
++
++ fragment at 4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ tinylcd35: tinylcd35 at 0{
++ compatible = "neosec,tinylcd";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&tinylcd35_pins>,
++ <&tinylcd35_ts_pins>;
++
++ spi-max-frequency = <48000000>;
++ rotate = <270>;
++ fps = <20>;
++ bgr;
++ buswidth = <8>;
++ reset-gpios = <&gpio 25 0>;
++ dc-gpios = <&gpio 24 0>;
++ led-gpios = <&gpio 18 1>;
++ debug = <0>;
++
++ init = <0x10000B0 0x80
++ 0x10000C0 0x0A 0x0A
++ 0x10000C1 0x01 0x01
++ 0x10000C2 0x33
++ 0x10000C5 0x00 0x42 0x80
++ 0x10000B1 0xD0 0x11
++ 0x10000B4 0x02
++ 0x10000B6 0x00 0x22 0x3B
++ 0x10000B7 0x07
++ 0x1000036 0x58
++ 0x10000F0 0x36 0xA5 0xD3
++ 0x10000E5 0x80
++ 0x10000E5 0x01
++ 0x10000B3 0x00
++ 0x10000E5 0x00
++ 0x10000F0 0x36 0xA5 0x53
++ 0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
++ 0x100003A 0x55
++ 0x1000011
++ 0x2000001
++ 0x1000029>;
++ };
++
++ tinylcd35_ts: tinylcd35_ts at 1 {
++ compatible = "ti,ads7846";
++ reg = <1>;
++ status = "disabled";
++
++ spi-max-frequency = <2000000>;
++ interrupts = <5 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ pendown-gpio = <&gpio 5 0>;
++ ti,x-plate-ohms = /bits/ 16 <100>;
++ ti,pressure-max = /bits/ 16 <255>;
++ };
++ };
++ };
++
++ /* RTC */
++
++ fragment at 5 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++
++ pcf8563: pcf8563 at 51 {
++ compatible = "nxp,pcf8563";
++ reg = <0x51>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 6 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ status = "okay";
++
++ ds1307: ds1307 at 68 {
++ compatible = "maxim,ds1307";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++
++ /*
++ * Values for input event code is found under the
++ * 'Keys and buttons' heading in include/uapi/linux/input.h
++ */
++ fragment at 7 {
++ target-path = "/soc";
++ __overlay__ {
++ keypad: keypad {
++ compatible = "gpio-keys";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&keypad_pins>;
++ status = "disabled";
++ autorepeat;
++
++ button at 17 {
++ label = "GPIO KEY_UP";
++ linux,code = <103>;
++ gpios = <&gpio 17 0>;
++ };
++ button at 22 {
++ label = "GPIO KEY_DOWN";
++ linux,code = <108>;
++ gpios = <&gpio 22 0>;
++ };
++ button at 27 {
++ label = "GPIO KEY_LEFT";
++ linux,code = <105>;
++ gpios = <&gpio 27 0>;
++ };
++ button at 23 {
++ label = "GPIO KEY_RIGHT";
++ linux,code = <106>;
++ gpios = <&gpio 23 0>;
++ };
++ button at 4 {
++ label = "GPIO KEY_ENTER";
++ linux,code = <28>;
++ gpios = <&gpio 4 0>;
++ };
++ };
++ };
++ };
++
++ __overrides__ {
++ speed = <&tinylcd35>,"spi-max-frequency:0";
++ rotate = <&tinylcd35>,"rotate:0";
++ fps = <&tinylcd35>,"fps:0";
++ debug = <&tinylcd35>,"debug:0";
++ touch = <&tinylcd35_ts>,"status";
++ touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
++ <&tinylcd35_ts>,"interrupts:0",
++ <&tinylcd35_ts>,"pendown-gpio:4";
++ xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
++ rtc-pcf = <0>,"=5";
++ rtc-ds = <0>,"=6";
++ keypad = <&keypad>,"status";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts
+@@ -0,0 +1,32 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&uart0>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ uart0_pins: uart0_pins {
++ brcm,pins = <14 15>;
++ brcm,function = <4>; /* alt0 */
++ brcm,pull = <0 2>;
++ };
++ };
++ };
++
++ __overrides__ {
++ txd0_pin = <&uart0_pins>,"brcm,pins:0";
++ rxd0_pin = <&uart0_pins>,"brcm,pins:4";
++ pin_func = <&uart0_pins>,"brcm,function:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts
+@@ -0,0 +1,38 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&uart1>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ uart1_pins: uart1_pins {
++ brcm,pins = <14 15>;
++ brcm,function = <2>; /* alt5 */
++ brcm,pull = <0 2>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target-path = "/chosen";
++ __overlay__ {
++ bootargs = "8250.nr_uarts=1";
++ };
++ };
++
++ __overrides__ {
++ txd1_pin = <&uart1_pins>,"brcm,pins:0";
++ rxd1_pin = <&uart1_pins>,"brcm,pins:4";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
+@@ -0,0 +1,89 @@
++/*
++ * vc4-fkms-v3d-overlay.dts
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target-path = "/chosen";
++ __overlay__ {
++ bootargs = "cma=256M";
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=192M";
++ };
++ };
++
++ fragment at 2 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=128M";
++ };
++ };
++
++ fragment at 3 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=96M";
++ };
++ };
++
++ fragment at 4 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=64M";
++ };
++ };
++
++ fragment at 5 {
++ target = <&fb>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 6 {
++ target = <&firmwarekms>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 7 {
++ target = <&v3d>;
++ __overlay__ {
++ interrupts = <1 10>;
++ status = "okay";
++ };
++ };
++
++ fragment at 8 {
++ target = <&vc4>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 9 {
++ target-path = "/soc/dma";
++ __overlay__ {
++ brcm,dma-channel-mask = <0x7f35>;
++ };
++ };
++
++ __overrides__ {
++ cma-256 = <0>,"+0-1-2-3-4";
++ cma-192 = <0>,"-0+1-2-3-4";
++ cma-128 = <0>,"-0-1+2-3-4";
++ cma-96 = <0>,"-0-1-2+3-4";
++ cma-64 = <0>,"-0-1-2-3+4";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
+@@ -0,0 +1,151 @@
++/*
++ * vc4-kms-v3d-overlay.dts
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/bcm2835.h>
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target-path = "/chosen";
++ __overlay__ {
++ bootargs = "cma=256M";
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=192M";
++ };
++ };
++
++ fragment at 2 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=128M";
++ };
++ };
++
++ fragment at 3 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=96M";
++ };
++ };
++
++ fragment at 4 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=64M";
++ };
++ };
++
++ fragment at 5 {
++ target = <&i2c2>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 6 {
++ target = <&fb>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment at 7 {
++ target = <&pixelvalve0>;
++ __overlay__ {
++ interrupts = <2 13>; /* pwa0 */
++ status = "okay";
++ };
++ };
++
++ fragment at 8 {
++ target = <&pixelvalve1>;
++ __overlay__ {
++ interrupts = <2 14>; /* pwa1 */
++ status = "okay";
++ };
++ };
++
++ fragment at 9 {
++ target = <&pixelvalve2>;
++ __overlay__ {
++ interrupts = <2 10>; /* pixelvalve */
++ status = "okay";
++ };
++ };
++
++ fragment at 10 {
++ target = <&hvs>;
++ __overlay__ {
++ interrupts = <2 1>;
++ status = "okay";
++ };
++ };
++
++ fragment at 11 {
++ target = <&hdmi>;
++ __overlay__ {
++ interrupts = <2 8>, <2 9>;
++ status = "okay";
++ };
++ };
++
++ fragment at 12 {
++ target = <&v3d>;
++ __overlay__ {
++ interrupts = <1 10>;
++ status = "okay";
++ };
++ };
++
++ fragment at 13 {
++ target = <&vc4>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 14 {
++ target-path = "/soc/dma";
++ __overlay__ {
++ brcm,dma-channel-mask = <0x7f35>;
++ };
++ };
++
++
++ fragment at 15 {
++ target = <&clocks>;
++ __overlay__ {
++ claim-clocks = <
++ BCM2835_PLLD_DSI0
++ BCM2835_PLLD_DSI1
++ BCM2835_PLLH_AUX
++ BCM2835_PLLH_PIX
++ >;
++ };
++ };
++
++ fragment at 16 {
++ target = <&vec>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ cma-256 = <0>,"+0-1-2-3-4";
++ cma-192 = <0>,"-0+1-2-3-4";
++ cma-128 = <0>,"-0-1+2-3-4";
++ cma-96 = <0>,"-0-1-2+3-4";
++ cma-64 = <0>,"-0-1-2-3+4";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts
+@@ -0,0 +1,30 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ // There is no VGA driver module, but we need a platform device
++ // node (that doesn't already use pinctrl) to hang the pinctrl
++ // reference on - leds will do
++
++ fragment at 0 {
++ target = <&leds>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&vga666_pins>;
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ vga666_pins: vga666_pins {
++ brcm,pins = <2 3 4 5 6 7 8 9 10 11 12
++ 13 14 15 16 17 18 19 20 21>;
++ brcm,function = <6>; /* alt2 */
++ brcm,pull = <0>; /* no pull */
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
+@@ -0,0 +1,41 @@
++// Definitions for w1-gpio module (without external pullup)
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++
++ w1: onewire at 0 {
++ compatible = "w1-gpio";
++ pinctrl-names = "default";
++ pinctrl-0 = <&w1_pins>;
++ gpios = <&gpio 4 0>;
++ rpi,parasitic-power = <0>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ w1_pins: w1_pins at 0 {
++ brcm,pins = <4>;
++ brcm,function = <0>; // in (initially)
++ brcm,pull = <0>; // off
++ };
++ };
++ };
++
++ __overrides__ {
++ gpiopin = <&w1>,"gpios:4",
++ <&w1>,"reg:0",
++ <&w1_pins>,"brcm,pins:0",
++ <&w1_pins>,"reg:0";
++ pullup = <&w1>,"rpi,parasitic-power:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
+@@ -0,0 +1,43 @@
++// Definitions for w1-gpio module (with external pullup)
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++
++ w1: onewire at 0 {
++ compatible = "w1-gpio";
++ pinctrl-names = "default";
++ pinctrl-0 = <&w1_pins>;
++ gpios = <&gpio 4 0>, <&gpio 5 1>;
++ rpi,parasitic-power = <0>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ w1_pins: w1_pins at 0 {
++ brcm,pins = <4 5>;
++ brcm,function = <0 1>; // in out
++ brcm,pull = <0 0>; // off off
++ };
++ };
++ };
++
++ __overrides__ {
++ gpiopin = <&w1>,"gpios:4",
++ <&w1>,"reg:0",
++ <&w1_pins>,"brcm,pins:0",
++ <&w1_pins>,"reg:0";
++ extpullup = <&w1>,"gpios:16",
++ <&w1_pins>,"brcm,pins:4";
++ pullup = <&w1>,"rpi,parasitic-power:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
+@@ -0,0 +1,44 @@
++/*
++ * Device Tree overlay for Witty Pi extension board by UUGear
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment at 0 {
++ target = <&leds>;
++ __overlay__ {
++ compatible = "gpio-leds";
++ wittypi_led: wittypi_led {
++ label = "wittypi_led";
++ linux,default-trigger = "default-on";
++ gpios = <&gpio 17 0>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ rtc: ds1337 at 68 {
++ compatible = "dallas,ds1337";
++ reg = <0x68>;
++ wakeup-source;
++ };
++ };
++ };
++
++ __overrides__ {
++ led_gpio = <&wittypi_led>,"gpios:4";
++ led_trigger = <&wittypi_led>,"linux,default-trigger";
++ };
++
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
+@@ -0,0 +1,57 @@
++/*
++ * Definitions for Allo Katana DAC boards
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&i2s>;
++ __overlay__ {
++ #sound-dai-cells = <0>;
++ status = "okay";
++ cpu_port: port {
++ cpu_endpoint: endpoint {
++ remote-endpoint = <&codec_endpoint>;
++ bitclock-master = <&codec_endpoint>;
++ frame-master = <&codec_endpoint>;
++ dai-format = "i2s";
++ };
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ allo-katana-codec at 30 {
++ #sound-dai-cells = <0>;
++ compatible = "allo,allo-katana-codec";
++ reg = <0x30>;
++ port {
++ codec_endpoint: endpoint {
++ remote-endpoint = <&cpu_endpoint>;
++ };
++ };
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ katana_dac: __overlay__ {
++ compatible = "audio-graph-card";
++ label = "Allo Katana";
++ dais = <&cpu_port>;
++ status = "okay";
++ };
++ };
++};
++
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
+@@ -0,0 +1,79 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&mmc>;
++ sdio_wifi: __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdio_pins>;
++ bus-width = <4>;
++ brcm,overclock-50 = <35>;
++ status = "okay";
++ };
++ };
++
++ fragment at 1 {
++ target = <&gpio>;
++ __overlay__ {
++ sdio_pins: sdio_pins {
++ brcm,pins = <34 35 36 37 38 39>;
++ brcm,function = <7>; /* ALT3 = SD1 */
++ brcm,pull = <0 2 2 2 2 2>;
++ };
++
++ power_ctrl_pins: power_ctrl_pins {
++ brcm,pins = <40>;
++ brcm,function = <1>; // out
++ };
++ };
++ };
++
++ fragment at 2 {
++ target-path = "/";
++ __overlay__ {
++ // We should investigate how to switch to mmc-pwrseq-sd8787
++ // Currently that module requires two GPIOs to function since it
++ // targets a slightly different chip
++ power_ctrl: power_ctrl {
++ compatible = "gpio-poweroff";
++ gpios = <&gpio 40 1>;
++ force;
++ };
++
++ i2c_soft: i2c at 0 {
++ compatible = "i2c-gpio";
++ gpios = <&gpio 43 0 /* sda */ &gpio 42 0 /* scl */>;
++ i2c-gpio,delay-us = <2>; /* ~100 kHz */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&i2c_soft>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ gpio_expander: gpio_expander at 20 {
++ compatible = "nxp,pca9554";
++ gpio-controller;
++ #gpio-cells = <2>;
++ reg = <0x20>;
++ status = "okay";
++ };
++
++ // rtc clock
++ ds1307: ds1307 at 68 {
++ compatible = "maxim,ds1307";
++ reg = <0x68>;
++ status = "okay";
++ };
++ };
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
+@@ -0,0 +1,36 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ gpio_ir_tx_pins: gpio_ir_tx_pins at 12 {
++ brcm,pins = <18>;
++ brcm,function = <1>; // out
++ };
++ };
++ };
++
++ fragment at 1 {
++ target-path = "/";
++ __overlay__ {
++ gpio_ir_tx: gpio-ir-transmitter at 12 {
++ compatible = "gpio-ir-tx";
++ pinctrl-names = "default";
++ pinctrl-0 = <&gpio_ir_tx_pins>;
++ gpios = <&gpio 18 0>;
++ };
++ };
++ };
++
++ __overrides__ {
++ gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number
++ <&gpio_ir_tx>, "reg:0",
++ <&gpio_ir_tx_pins>, "brcm,pins:0",
++ <&gpio_ir_tx_pins>, "reg:0";
++ invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
+@@ -0,0 +1,309 @@
++// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
++
++// dtparams:
++// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
++// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
++//
++// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
++//
++// Example: A single flash device with fast read capability on SPI0, CS#0:
++// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ // disable spi-dev on spi0.0
++ fragment at 0 {
++ target = <&spidev0>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi0.1
++ fragment at 1 {
++ target = <&spidev1>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.0
++ fragment at 2 {
++ target-path = "spi1/spidev at 0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.1
++ fragment at 3 {
++ target-path = "spi1/spidev at 1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.2
++ fragment at 4 {
++ target-path = "spi1/spidev at 2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.0
++ fragment at 5 {
++ target-path = "spi2/spidev at 0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.1
++ fragment at 6 {
++ target-path = "spi2/spidev at 1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.2
++ fragment at 7 {
++ target-path = "spi2/spidev at 2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // enable flash on spi0.0
++ fragment at 8 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi_nor_00: spi_nor at 0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ };
++ };
++ };
++
++ // enable flash on spi0.1
++ fragment at 9 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi_nor_01: spi_nor at 1 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "jedec,spi-nor";
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ };
++ };
++ };
++
++ // enable flash on spi1.0
++ fragment at 10 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi_nor_10: spi_nor at 0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ };
++ };
++ };
++
++ // enable flash on spi1.1
++ fragment at 11 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi_nor_11: spi_nor at 1 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "jedec,spi-nor";
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ };
++ };
++ };
++
++ // enable flash on spi1.2
++ fragment at 12 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi_nor_12: spi_nor at 2 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "jedec,spi-nor";
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ };
++ };
++ };
++
++ // enable flash on spi2.0
++ fragment at 13 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi_nor_20: spi_nor at 0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ };
++ };
++ };
++
++ // enable flash on spi2.1
++ fragment at 14 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi_nor_21: spi_nor at 1 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "jedec,spi-nor";
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ };
++ };
++ };
++
++ // enable flash on spi2.2
++ fragment at 15 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi_nor_22: spi_nor at 2 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "jedec,spi-nor";
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ };
++ };
++ };
++
++ // Enable fast read for device on spi0.0.
++ // Use default active low interrupt signalling.
++ fragment at 16 {
++ target = <&spi_nor_00>;
++ __dormant__ {
++ m25p,fast-read;
++ };
++ };
++
++ // Enable fast read for device on spi0.1.
++ // Use default active low interrupt signalling.
++ fragment at 17 {
++ target = <&spi_nor_01>;
++ __dormant__ {
++ m25p,fast-read;
++ };
++ };
++
++ // Enable fast read for device on spi1.0.
++ // Use default active low interrupt signalling.
++ fragment at 18 {
++ target = <&spi_nor_10>;
++ __dormant__ {
++ m25p,fast-read;
++ };
++ };
++
++ // Enable fast read for device on spi1.1.
++ // Use default active low interrupt signalling.
++ fragment at 19 {
++ target = <&spi_nor_11>;
++ __dormant__ {
++ m25p,fast-read;
++ };
++ };
++
++ // Enable fast read for device on spi1.2.
++ // Use default active low interrupt signalling.
++ fragment at 20 {
++ target = <&spi_nor_12>;
++ __dormant__ {
++ m25p,fast-read;
++ };
++ };
++
++ // Enable fast read for device on spi2.0.
++ // Use default active low interrupt signalling.
++ fragment at 21 {
++ target = <&spi_nor_20>;
++ __dormant__ {
++ m25p,fast-read;
++ };
++ };
++
++ // Enable fast read for device on spi2.1.
++ // Use default active low interrupt signalling.
++ fragment at 22 {
++ target = <&spi_nor_21>;
++ __dormant__ {
++ m25p,fast-read;
++ };
++ };
++
++ // Enable fast read for device on spi2.2.
++ // Use default active low interrupt signalling.
++ fragment at 23 {
++ target = <&spi_nor_22>;
++ __dormant__ {
++ m25p,fast-read;
++ };
++ };
++
++ __overrides__ {
++ flash-spi0-0 = <0>,"+0+8";
++ flash-spi0-1 = <0>,"+1+9";
++ flash-spi1-0 = <0>,"+2+10";
++ flash-spi1-1 = <0>,"+3+11";
++ flash-spi1-2 = <0>,"+4+12";
++ flash-spi2-0 = <0>,"+5+13";
++ flash-spi2-1 = <0>,"+6+14";
++ flash-spi2-2 = <0>,"+7+15";
++ flash-fastr-spi0-0 = <0>,"+0+8+16";
++ flash-fastr-spi0-1 = <0>,"+1+9+17";
++ flash-fastr-spi1-0 = <0>,"+2+10+18";
++ flash-fastr-spi1-1 = <0>,"+3+11+19";
++ flash-fastr-spi1-2 = <0>,"+4+12+20";
++ flash-fastr-spi2-0 = <0>,"+5+13+21";
++ flash-fastr-spi2-1 = <0>,"+6+14+22";
++ flash-fastr-spi2-2 = <0>,"+7+15+23";
++ };
++};
++
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
+@@ -0,0 +1,86 @@
++/dts-v1/;
++/plugin/;
++
++
++/ {
++ compatible = "brcm,bcm2835";
++
++ fragment at 0 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ltc2941: ltc2941 at 64 {
++ compatible = "lltc,ltc2941";
++ reg = <0x64>;
++ lltc,resistor-sense = <50>;
++ lltc,prescaler-exponent = <7>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ltc2942: ltc2942 at 64 {
++ compatible = "lltc,ltc2942";
++ reg = <0x64>;
++ lltc,resistor-sense = <50>;
++ lltc,prescaler-exponent = <7>;
++ };
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ltc2943: ltc2943 at 64 {
++ compatible = "lltc,ltc2943";
++ reg = <0x64>;
++ lltc,resistor-sense = <50>;
++ lltc,prescaler-exponent = <7>;
++ };
++ };
++ };
++
++ fragment at 3 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ ltc2944: ltc2944 at 64 {
++ compatible = "lltc,ltc2944";
++ reg = <0x64>;
++ lltc,resistor-sense = <50>;
++ lltc,prescaler-exponent = <7>;
++ };
++ };
++ };
++
++ __overrides__ {
++ ltc2941 = <0>,"+0";
++ ltc2942 = <0>,"+1";
++ ltc2943 = <0>,"+2";
++ ltc2944 = <0>,"+3";
++ resistor-sense = <<c2941>, "lltc,resistor-sense:0",
++ <<c2942>, "lltc,resistor-sense:0",
++ <<c2943>, "lltc,resistor-sense:0",
++ <<c2944>, "lltc,resistor-sense:0";
++ prescaler-exponent = <<c2941>, "lltc,prescaler-exponent:0",
++ <<c2942>, "lltc,prescaler-exponent:0",
++ <<c2943>, "lltc,prescaler-exponent:0",
++ <<c2944>, "lltc,prescaler-exponent:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
+@@ -0,0 +1,81 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target-path = "/";
++ __overlay__ {
++ codec_out: spdif-transmitter {
++ #address-cells = <0>;
++ #size-cells = <0>;
++ #sound-dai-cells = <0>;
++ compatible = "linux,spdif-dit";
++ status = "okay";
++ };
++
++ codec_in: card-codec {
++ #sound-dai-cells = <0>;
++ compatible = "invensense,ics43432";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2s>;
++ __overlay__ {
++ #sound-dai-cells = <0>;
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target = <&sound>;
++ snd: __overlay__ {
++ compatible = "simple-audio-card";
++ simple-audio-card,name = "PiBell";
++
++ status="okay";
++
++ capture_link: simple-audio-card,dai-link at 0 {
++ format = "i2s";
++
++ r_cpu_dai: cpu {
++ sound-dai = <&i2s>;
++
++/* example TDM slot configuration
++ dai-tdm-slot-num = <2>;
++ dai-tdm-slot-width = <32>;
++*/
++ };
++
++ r_codec_dai: codec {
++ sound-dai = <&codec_in>;
++ };
++ };
++
++ playback_link: simple-audio-card,dai-link at 1 {
++ format = "i2s";
++
++ p_cpu_dai: cpu {
++ sound-dai = <&i2s>;
++
++/* example TDM slot configuration
++ dai-tdm-slot-num = <2>;
++ dai-tdm-slot-width = <32>;
++*/
++ };
++
++ p_codec_dai: codec {
++ sound-dai = <&codec_out>;
++ };
++ };
++ };
++ };
++
++ __overrides__ {
++ alsaname = <&snd>, "simple-audio-card,name";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
+@@ -0,0 +1,40 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&gpio>;
++ __overlay__ {
++ pwm0_pins: pwm0_pins {
++ brcm,pins = <18>;
++ brcm,function = <2>; /* Alt5 */
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&pwm>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm0_pins>;
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target-path = "/";
++ __overlay__ {
++ pwm-ir-transmitter {
++ compatible = "pwm-ir-tx";
++ pwms = <&pwm 0 100>;
++ };
++ };
++ };
++
++ __overrides__ {
++ gpio_pin = <&pwm0_pins>, "brcm,pins:0";
++ func = <&pwm0_pins>,"brcm,function:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
+@@ -0,0 +1,40 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835";
++
++ fragment at 0 {
++ target = <&i2c1>;
++
++ frag1: __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ sc16is752: sc16is752 at 48 {
++ compatible = "nxp,sc16is752";
++ reg = <0x48>; // i2c address
++ clocks = <&sc16is752_clk>;
++ interrupt-parent = <&gpio>;
++ interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */
++ gpio-controller;
++ #gpio-cells = <0>;
++ i2c-max-frequency = <400000>;
++ status = "okay";
++
++ sc16is752_clk: sc16is752_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <14745600>;
++ };
++ };
++ };
++ };
++
++ __overrides__ {
++ int_pin = <&sc16is752>,"interrupts:0";
++ addr = <&sc16is752>,"reg:0";
++ xtal = <&sc16is752>,"clock-frequency:0";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
+@@ -0,0 +1,73 @@
++// Definitions for SuperAudioBoard
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "simple-audio-card";
++ i2s-controller = <&i2s>;
++ status = "okay";
++
++ simple-audio-card,name = "SuperAudioBoard";
++
++ simple-audio-card,widgets =
++ "Line", "Line In",
++ "Line", "Line Out";
++
++ simple-audio-card,routing =
++ "Line Out","AOUTA+",
++ "Line Out","AOUTA-",
++ "Line Out","AOUTB+",
++ "Line Out","AOUTB-",
++ "AINA","Line In",
++ "AINB","Line In";
++
++ simple-audio-card,format = "i2s";
++
++ simple-audio-card,bitclock-master = <&sound_master>;
++ simple-audio-card,frame-master = <&sound_master>;
++
++ simple-audio-card,cpu {
++ sound-dai = <&i2s>;
++ dai-tdm-slot-num = <2>;
++ dai-tdm-slot-width = <32>;
++ };
++
++ sound_master: simple-audio-card,codec {
++ sound-dai = <&cs4271>;
++ system-clock-frequency = <24576000>;
++ };
++ };
++ };
++
++ fragment at 1 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment at 2 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ cs4271: cs4271 at 10 {
++ #sound-dai-cells = <0>;
++ compatible = "cirrus,cs4271";
++ reg = <0x10>;
++ status = "okay";
++ reset-gpio = <&gpio 26 0>; /* Pin 26, active high */
++ };
++ };
++ };
++ __overrides__ {
++ gpiopin = <&cs4271>,"reset-gpio:4";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
+@@ -0,0 +1,1706 @@
++// Definitions for SX150x I2C GPIO Expanders from Semtech
++
++// dtparams:
++// sx150<x>-<n>-<m> - Enables SX150X device on I2C#<n> with slave address <m>. <x> may be 1-9.
++// <n> may be 0 or 1. Permissible values of <m> (which is denoted in hex)
++// depend on the device variant.
++// For SX1501, SX1502, SX1504 and SX1505, <m> may be 20 or 21.
++// For SX1503 and SX1506, <m> may be 20.
++// For SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
++// For SX1508, <m> may be 20, 21, 22 or 23.
++// sx150<x>-<n>-<m>-int-gpio - Integer, enables interrupts on SX150X device on I2C#<n> with slave address <m>,
++// specifies the GPIO pin to which NINT output of SX150X is connected.
++//
++//
++// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25:
++// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25
++//
++// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used):
++// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ // Enable I2C#0 interface
++ fragment at 0 {
++ target = <&i2c0>;
++ __dormant__ {
++ status = "okay";
++ };
++ };
++
++ // Enable I2C#1 interface
++ fragment at 1 {
++ target = <&i2c1>;
++ __dormant__ {
++ status = "okay";
++ };
++ };
++
++ // Enable a SX1501 on I2C#0 at slave addr 0x20
++ fragment at 2 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1501_0_20: sx150x at 20 {
++ compatible = "semtech,sx1501q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1501 on I2C#1 at slave addr 0x20
++ fragment at 3 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1501_1_20: sx150x at 20 {
++ compatible = "semtech,sx1501q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1501 on I2C#0 at slave addr 0x21
++ fragment at 4 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1501_0_21: sx150x at 21 {
++ compatible = "semtech,sx1501q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1501 on I2C#1 at slave addr 0x21
++ fragment at 5 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1501_1_21: sx150x at 21 {
++ compatible = "semtech,sx1501q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1502 on I2C#0 at slave addr 0x20
++ fragment at 6 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1502_0_20: sx150x at 20 {
++ compatible = "semtech,sx1502q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1502 on I2C#1 at slave addr 0x20
++ fragment at 7 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1502_1_20: sx150x at 20 {
++ compatible = "semtech,sx1502q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1502 on I2C#0 at slave addr 0x21
++ fragment at 8 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1502_0_21: sx150x at 21 {
++ compatible = "semtech,sx1502q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1502 on I2C#1 at slave addr 0x21
++ fragment at 9 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1502_1_21: sx150x at 21 {
++ compatible = "semtech,sx1502q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1503 on I2C#0 at slave addr 0x20
++ fragment at 10 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1503_0_20: sx150x at 20 {
++ compatible = "semtech,sx1503q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1503 on I2C#1 at slave addr 0x20
++ fragment at 11 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1503_1_20: sx150x at 20 {
++ compatible = "semtech,sx1503q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1504 on I2C#0 at slave addr 0x20
++ fragment at 12 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1504_0_20: sx150x at 20 {
++ compatible = "semtech,sx1504q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1504 on I2C#1 at slave addr 0x20
++ fragment at 13 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1504_1_20: sx150x at 20 {
++ compatible = "semtech,sx1504q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1504 on I2C#0 at slave addr 0x21
++ fragment at 14 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1504_0_21: sx150x at 21 {
++ compatible = "semtech,sx1504q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1504 on I2C#1 at slave addr 0x21
++ fragment at 15 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1504_1_21: sx150x at 21 {
++ compatible = "semtech,sx1504q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1505 on I2C#0 at slave addr 0x20
++ fragment at 16 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1505_0_20: sx150x at 20 {
++ compatible = "semtech,sx1505q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1505 on I2C#1 at slave addr 0x20
++ fragment at 17 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1505_1_20: sx150x at 20 {
++ compatible = "semtech,sx1505q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1505 on I2C#0 at slave addr 0x21
++ fragment at 18 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1505_0_21: sx150x at 21 {
++ compatible = "semtech,sx1505q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1505 on I2C#1 at slave addr 0x21
++ fragment at 19 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1505_1_21: sx150x at 21 {
++ compatible = "semtech,sx1505q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1506 on I2C#0 at slave addr 0x20
++ fragment at 20 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1506_0_20: sx150x at 20 {
++ compatible = "semtech,sx1506q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1506 on I2C#1 at slave addr 0x20
++ fragment at 21 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1506_1_20: sx150x at 20 {
++ compatible = "semtech,sx1506q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1507 on I2C#0 at slave addr 0x3E
++ fragment at 22 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1507_0_3E: sx150x at 3E {
++ compatible = "semtech,sx1507q";
++ reg = <0x3E>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1507 on I2C#1 at slave addr 0x3E
++ fragment at 23 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1507_1_3E: sx150x at 3E {
++ compatible = "semtech,sx1507q";
++ reg = <0x3E>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1507 on I2C#0 at slave addr 0x3F
++ fragment at 24 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1507_0_3F: sx150x at 3F {
++ compatible = "semtech,sx1507q";
++ reg = <0x3F>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1507 on I2C#1 at slave addr 0x3F
++ fragment at 25 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1507_1_3F: sx150x at 3F {
++ compatible = "semtech,sx1507q";
++ reg = <0x3F>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1507 on I2C#0 at slave addr 0x70
++ fragment at 26 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1507_0_70: sx150x at 70 {
++ compatible = "semtech,sx1507q";
++ reg = <0x70>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1507 on I2C#1 at slave addr 0x70
++ fragment at 27 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1507_1_70: sx150x at 70 {
++ compatible = "semtech,sx1507q";
++ reg = <0x70>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1507 on I2C#0 at slave addr 0x71
++ fragment at 28 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1507_0_71: sx150x at 71 {
++ compatible = "semtech,sx1507q";
++ reg = <0x71>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1507 on I2C#1 at slave addr 0x71
++ fragment at 29 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1507_1_71: sx150x at 71 {
++ compatible = "semtech,sx1507q";
++ reg = <0x71>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1508 on I2C#0 at slave addr 0x20
++ fragment at 30 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1508_0_20: sx150x at 20 {
++ compatible = "semtech,sx1508q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1508 on I2C#1 at slave addr 0x20
++ fragment at 31 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1508_1_20: sx150x at 20 {
++ compatible = "semtech,sx1508q";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1508 on I2C#0 at slave addr 0x21
++ fragment at 32 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1508_0_21: sx150x at 21 {
++ compatible = "semtech,sx1508q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1508 on I2C#1 at slave addr 0x21
++ fragment at 33 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1508_1_21: sx150x at 21 {
++ compatible = "semtech,sx1508q";
++ reg = <0x21>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1508 on I2C#0 at slave addr 0x22
++ fragment at 34 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1508_0_22: sx150x at 22 {
++ compatible = "semtech,sx1508q";
++ reg = <0x22>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1508 on I2C#1 at slave addr 0x22
++ fragment at 35 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1508_1_22: sx150x at 22 {
++ compatible = "semtech,sx1508q";
++ reg = <0x22>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1508 on I2C#0 at slave addr 0x23
++ fragment at 36 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1508_0_23: sx150x at 23 {
++ compatible = "semtech,sx1508q";
++ reg = <0x23>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1508 on I2C#1 at slave addr 0x23
++ fragment at 37 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1508_1_23: sx150x at 23 {
++ compatible = "semtech,sx1508q";
++ reg = <0x23>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1509 on I2C#0 at slave addr 0x3E
++ fragment at 38 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1509_0_3E: sx150x at 3E {
++ compatible = "semtech,sx1509q";
++ reg = <0x3E>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1509 on I2C#1 at slave addr 0x3E
++ fragment at 39 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1509_1_3E: sx150x at 3E {
++ compatible = "semtech,sx1509q";
++ reg = <0x3E>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1509 on I2C#0 at slave addr 0x3F
++ fragment at 40 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1509_0_3F: sx150x at 3F {
++ compatible = "semtech,sx1509q";
++ reg = <0x3F>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1509 on I2C#1 at slave addr 0x3F
++ fragment at 41 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1509_1_3F: sx150x at 3F {
++ compatible = "semtech,sx1509q";
++ reg = <0x3F>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1509 on I2C#0 at slave addr 0x70
++ fragment at 42 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1509_0_70: sx150x at 70 {
++ compatible = "semtech,sx1509q";
++ reg = <0x70>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1509 on I2C#1 at slave addr 0x70
++ fragment at 43 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1509_1_70: sx150x at 70 {
++ compatible = "semtech,sx1509q";
++ reg = <0x70>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1509 on I2C#0 at slave addr 0x71
++ fragment at 44 {
++ target = <&i2c0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1509_0_71: sx150x at 71 {
++ compatible = "semtech,sx1509q";
++ reg = <0x71>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable a SX1509 on I2C#1 at slave addr 0x71
++ fragment at 45 {
++ target = <&i2c1>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ sx1509_1_71: sx150x at 71 {
++ compatible = "semtech,sx1509q";
++ reg = <0x71>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells = <2>;
++ interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter
++ 2nd word is 2 for falling-edge triggered */
++ status = "okay";
++ };
++ };
++ };
++
++ // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20
++ fragment at 46 {
++ target = <&sx1501_0_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20
++ fragment at 47 {
++ target = <&sx1501_1_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21
++ fragment at 48 {
++ target = <&sx1501_0_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21
++ fragment at 49 {
++ target = <&sx1501_1_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20
++ fragment at 50 {
++ target = <&sx1502_0_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20
++ fragment at 51 {
++ target = <&sx1502_1_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21
++ fragment at 52 {
++ target = <&sx1502_0_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21
++ fragment at 53 {
++ target = <&sx1502_1_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20
++ fragment at 54 {
++ target = <&sx1503_0_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20
++ fragment at 55 {
++ target = <&sx1503_1_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20
++ fragment at 56 {
++ target = <&sx1504_0_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20
++ fragment at 57 {
++ target = <&sx1504_1_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21
++ fragment at 58 {
++ target = <&sx1504_0_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21
++ fragment at 59 {
++ target = <&sx1504_1_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20
++ fragment at 60 {
++ target = <&sx1505_0_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20
++ fragment at 61 {
++ target = <&sx1505_1_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21
++ fragment at 62 {
++ target = <&sx1505_0_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21
++ fragment at 63 {
++ target = <&sx1505_1_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20
++ fragment at 64 {
++ target = <&sx1506_0_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20
++ fragment at 65 {
++ target = <&sx1506_1_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E
++ fragment at 66 {
++ target = <&sx1507_0_3E>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_3E_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E
++ fragment at 67 {
++ target = <&sx1507_1_3E>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_3E_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F
++ fragment at 68 {
++ target = <&sx1507_0_3F>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_3F_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F
++ fragment at 69 {
++ target = <&sx1507_1_3F>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_3F_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70
++ fragment at 70 {
++ target = <&sx1507_0_70>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_70_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70
++ fragment at 71 {
++ target = <&sx1507_1_70>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_70_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71
++ fragment at 72 {
++ target = <&sx1507_0_71>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_71_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71
++ fragment at 73 {
++ target = <&sx1507_1_71>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_71_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20
++ fragment at 74 {
++ target = <&sx1508_0_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20
++ fragment at 75 {
++ target = <&sx1508_1_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_20_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21
++ fragment at 76 {
++ target = <&sx1508_0_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21
++ fragment at 77 {
++ target = <&sx1508_1_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_21_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22
++ fragment at 78 {
++ target = <&sx1508_0_22>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_22_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22
++ fragment at 79 {
++ target = <&sx1508_1_22>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_22_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23
++ fragment at 80 {
++ target = <&sx1508_0_23>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_23_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23
++ fragment at 81 {
++ target = <&sx1508_1_23>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_23_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E
++ fragment at 82 {
++ target = <&sx1509_0_3E>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_3E_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E
++ fragment at 83 {
++ target = <&sx1509_1_3E>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_3E_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F
++ fragment at 84 {
++ target = <&sx1509_0_3F>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_3F_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F
++ fragment at 85 {
++ target = <&sx1509_1_3F>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_3F_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70
++ fragment at 86 {
++ target = <&sx1509_0_70>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_70_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70
++ fragment at 87 {
++ target = <&sx1509_1_70>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_70_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71
++ fragment at 88 {
++ target = <&sx1509_0_71>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_0_71_pins>;
++ };
++ };
++
++ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71
++ fragment at 89 {
++ target = <&sx1509_1_71>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ pinctrl-names = "default";
++ pinctrl-0 = <&sx150x_1_71_pins>;
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20
++ // Configure as a input with no pull-up/down
++ fragment at 90 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_0_20_pins: sx150x_0_20_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20
++ // Configure as a input with no pull-up/down
++ fragment at 91 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_1_20_pins: sx150x_1_20_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21
++ // Configure as a input with no pull-up/down
++ fragment at 92 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_0_21_pins: sx150x_0_21_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21
++ // Configure as a input with no pull-up/down
++ fragment at 93 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_1_21_pins: sx150x_1_21_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22
++ // Configure as a input with no pull-up/down
++ fragment at 94 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_0_22_pins: sx150x_0_22_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22
++ // Configure as a input with no pull-up/down
++ fragment at 95 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_1_22_pins: sx150x_1_22_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23
++ // Configure as a input with no pull-up/down
++ fragment at 96 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_0_23_pins: sx150x_0_23_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23
++ // Configure as a input with no pull-up/down
++ fragment at 97 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_1_23_pins: sx150x_1_23_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E
++ // Configure as a input with no pull-up/down
++ fragment at 98 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_0_3E_pins: sx150x_0_3E_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E
++ // Configure as a input with no pull-up/down
++ fragment at 99 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_1_3E_pins: sx150x_1_3E_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F
++ // Configure as a input with no pull-up/down
++ fragment at 100 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_0_3F_pins: sx150x_0_3F_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F
++ // Configure as a input with no pull-up/down
++ fragment at 101 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_1_3F_pins: sx150x_1_3F_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70
++ // Configure as a input with no pull-up/down
++ fragment at 102 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_0_70_pins: sx150x_0_70_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70
++ // Configure as a input with no pull-up/down
++ fragment at 103 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_1_70_pins: sx150x_1_70_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71
++ // Configure as a input with no pull-up/down
++ fragment at 104 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_0_71_pins: sx150x_0_71_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71
++ // Configure as a input with no pull-up/down
++ fragment at 105 {
++ target = <&gpio>;
++ __dormant__ {
++ sx150x_1_71_pins: sx150x_1_71_pins {
++ brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ __overrides__ {
++ sx1501-0-20 = <0>,"+0+2";
++ sx1501-1-20 = <0>,"+1+3";
++ sx1501-0-21 = <0>,"+0+4";
++ sx1501-1-21 = <0>,"+1+5";
++ sx1502-0-20 = <0>,"+0+6";
++ sx1502-1-20 = <0>,"+1+7";
++ sx1502-0-21 = <0>,"+0+8";
++ sx1502-1-21 = <0>,"+1+9";
++ sx1503-0-20 = <0>,"+0+10";
++ sx1503-1-20 = <0>,"+1+11";
++ sx1504-0-20 = <0>,"+0+12";
++ sx1504-1-20 = <0>,"+1+13";
++ sx1504-0-21 = <0>,"+0+14";
++ sx1504-1-21 = <0>,"+1+15";
++ sx1505-0-20 = <0>,"+0+16";
++ sx1505-1-20 = <0>,"+1+17";
++ sx1505-0-21 = <0>,"+0+18";
++ sx1505-1-21 = <0>,"+1+19";
++ sx1506-0-20 = <0>,"+0+20";
++ sx1506-1-20 = <0>,"+1+21";
++ sx1507-0-3E = <0>,"+0+22";
++ sx1507-1-3E = <0>,"+1+23";
++ sx1507-0-3F = <0>,"+0+24";
++ sx1507-1-3F = <0>,"+1+25";
++ sx1507-0-70 = <0>,"+0+26";
++ sx1507-1-70 = <0>,"+1+27";
++ sx1507-0-71 = <0>,"+0+28";
++ sx1507-1-71 = <0>,"+1+29";
++ sx1508-0-20 = <0>,"+0+30";
++ sx1508-1-20 = <0>,"+1+31";
++ sx1508-0-21 = <0>,"+0+32";
++ sx1508-1-21 = <0>,"+1+33";
++ sx1508-0-22 = <0>,"+0+34";
++ sx1508-1-22 = <0>,"+1+35";
++ sx1508-0-23 = <0>,"+0+36";
++ sx1508-1-23 = <0>,"+1+37";
++ sx1509-0-3E = <0>,"+0+38";
++ sx1509-1-3E = <0>,"+1+39";
++ sx1509-0-3F = <0>,"+0+40";
++ sx1509-1-3F = <0>,"+1+41";
++ sx1509-0-70 = <0>,"+0+42";
++ sx1509-1-70 = <0>,"+1+43";
++ sx1509-0-71 = <0>,"+0+44";
++ sx1509-1-71 = <0>,"+1+45";
++ sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0";
++ sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0";
++ sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0";
++ sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0";
++ sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0";
++ sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0";
++ sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0";
++ sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0";
++ sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0";
++ sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0";
++ sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0";
++ sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0";
++ sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0";
++ sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0";
++ sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0";
++ sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0";
++ sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0";
++ sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0";
++ sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0";
++ sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0";
++ sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0";
++ sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
++ sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
++ sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
++ sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
++ sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
++ sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
++ sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
++ sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0";
++ sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0";
++ sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0";
++ sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0";
++ sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0";
++ sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0";
++ sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0";
++ sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0";
++ sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0";
++ sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0";
++ sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0";
++ sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0";
++ sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0";
++ sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0";
++ sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0";
++ sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0";
++ };
++};
++
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts
+@@ -0,0 +1,33 @@
++// Overlay for missing AUX interrupt controller
++// Instead we bind all AUX devices to the generic AUX interrupt line
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment at 0 {
++ target = <&uart1>;
++ __overlay__ {
++ interrupt-parent = <&intc>;
++ interrupts = <0x1 0x1d>;
++ };
++ };
++
++ fragment at 1 {
++ target = <&spi1>;
++ __overlay__ {
++ interrupt-parent = <&intc>;
++ interrupts = <0x1 0x1d>;
++ };
++ };
++
++ fragment at 2 {
++ target = <&spi2>;
++ __overlay__ {
++ interrupt-parent = <&intc>;
++ interrupts = <0x1 0x1d>;
++ };
++ };
++};
++
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
+@@ -0,0 +1,154 @@
++// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg upstream-aux-interrupt-overlay.dts,
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/clock/bcm2835.h>
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++ fragment at 0 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=256M";
++ };
++ };
++ fragment at 1 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=192M";
++ };
++ };
++ fragment at 2 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=128M";
++ };
++ };
++ fragment at 3 {
++ target-path = "/chosen";
++ __overlay__ {
++ bootargs = "cma=96M";
++ };
++ };
++ fragment at 4 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=64M";
++ };
++ };
++ fragment at 5 {
++ target = <&i2c2>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++ fragment at 6 {
++ target = <&fb>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++ fragment at 7 {
++ target = <&pixelvalve0>;
++ __overlay__ {
++ interrupts = <2 13>;
++ status = "okay";
++ };
++ };
++ fragment at 8 {
++ target = <&pixelvalve1>;
++ __overlay__ {
++ interrupts = <2 14>;
++ status = "okay";
++ };
++ };
++ fragment at 9 {
++ target = <&pixelvalve2>;
++ __overlay__ {
++ interrupts = <2 10>;
++ status = "okay";
++ };
++ };
++ fragment at 10 {
++ target = <&hvs>;
++ __overlay__ {
++ interrupts = <2 1>;
++ status = "okay";
++ };
++ };
++ fragment at 11 {
++ target = <&hdmi>;
++ __overlay__ {
++ interrupts = <2 8>, <2 9>;
++ status = "okay";
++ };
++ };
++ fragment at 12 {
++ target = <&v3d>;
++ __overlay__ {
++ interrupts = <1 10>;
++ status = "okay";
++ };
++ };
++ fragment at 13 {
++ target = <&vc4>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++ fragment at 14 {
++ target-path = "/soc/dma";
++ __overlay__ {
++ brcm,dma-channel-mask = <0x7f35>;
++ };
++ };
++ fragment at 15 {
++ target = <&clocks>;
++ __overlay__ {
++ claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
++ };
++ };
++ fragment at 16 {
++ target = <&vec>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++ fragment at 17 {
++ target = <&usb>;
++ #address-cells = <1>;
++ #size-cells = <1>;
++ dwc2_usb: __overlay__ {
++ compatible = "brcm,bcm2835-usb";
++ reg = <0x7e980000 0x10000>;
++ interrupts = <1 9>;
++ dr_mode = "otg";
++ g-np-tx-fifo-size = <32>;
++ g-rx-fifo-size = <256>;
++ g-tx-fifo-size = <512 512 512 512 512 256 256>;
++ status = "okay";
++ };
++ };
++ fragment at 18 {
++ target = <&uart1>;
++ __overlay__ {
++ interrupt-parent = <&intc>;
++ interrupts = <0x1 0x1d>;
++ };
++ };
++ fragment at 19 {
++ target = <&spi1>;
++ __overlay__ {
++ interrupt-parent = <&intc>;
++ interrupts = <0x1 0x1d>;
++ };
++ };
++ fragment at 20 {
++ target = <&spi2>;
++ __overlay__ {
++ interrupt-parent = <&intc>;
++ interrupts = <0x1 0x1d>;
++ };
++ };
++};
+--- a/arch/arm/boot/compressed/Makefile
++++ b/arch/arm/boot/compressed/Makefile
+@@ -103,7 +103,6 @@ ifeq ($(CONFIG_FUNCTION_TRACER),y)
+ ORIG_CFLAGS := $(KBUILD_CFLAGS)
+ KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
+ endif
+-KBUILD_CFLAGS_KERNEL := $(patsubst -f%-sections,,$(KBUILD_CFLAGS_KERNEL))
+
+ # -fstack-protector-strong triggers protection checks in this code,
+ # but it is being used too early to link to meaningful stack_chk logic.
+--- a/arch/arm64/Makefile
++++ b/arch/arm64/Makefile
+@@ -132,6 +132,9 @@ zinstall install:
+ %.dtb: scripts
+ $(Q)$(MAKE) $(build)=$(boot)/dts $(boot)/dts/$@
+
++%.dtbo: | scripts
++ $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
++
+ PHONY += dtbs dtbs_install
+
+ dtbs: prepare scripts
+--- a/scripts/Kbuild.include
++++ b/scripts/Kbuild.include
+@@ -293,7 +293,7 @@ ksym_dep_filter =
+ $(CPP) $(call flags_nodeps,c_flags) -D__KSYM_DEPS__ $< ;; \
+ as_*_S|cpp_s_S) \
+ $(CPP) $(call flags_nodeps,a_flags) -D__KSYM_DEPS__ $< ;; \
+- boot*|build*|cpp_its_S|*cpp_lds_S|dtc|host*|vdso*) : ;; \
++ boot*|build*|cpp_its_S|*cpp_lds_S|dtc*|host*|vdso*) : ;; \
+ *) echo "Don't know how to preprocess $(1)" >&2; false ;; \
+ esac | tr ";" "\n" | sed -rn 's/^.*=== __KSYM_(.*) ===.*$$/KSYM_\1/p'
+
+--- a/scripts/Makefile.build
++++ b/scripts/Makefile.build
+@@ -94,7 +94,7 @@ modorder-target := $(obj)/modules.order
+ # We keep a list of all modules in $(MODVERDIR)
+
+ __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
+- $(if $(KBUILD_MODULES),$(obj-m)) \
++ $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
+ $(subdir-ym) $(always)
+ @:
+
+@@ -434,7 +434,7 @@ targets += $(extra-y) $(MAKECMDGOALS) $(
+ # Linker scripts preprocessor (.lds.S -> .lds)
+ # ---------------------------------------------------------------------------
+ quiet_cmd_cpp_lds_S = LDS $@
+- cmd_cpp_lds_S = $(CPP) $(EXTRA_LDSFLAGS) $(cpp_flags) -P -U$(ARCH) \
++ cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
+ -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
+
+ $(obj)/%.lds: $(src)/%.lds.S FORCE
+--- a/scripts/Makefile.dtbinst
++++ b/scripts/Makefile.dtbinst
+@@ -22,6 +22,7 @@ include scripts/Kbuild.include
+ include $(src)/Makefile
+
+ dtbinst-files := $(dtb-y)
++dtboinst-files := $(dtbo-y)
+ dtbinst-dirs := $(dts-dirs)
+
+ # Helper targets for Installing DTBs into the boot directory
+@@ -33,10 +34,13 @@ install-dir = $(patsubst $(dtbinst_root)
+ $(dtbinst-files): %.dtb: $(obj)/%.dtb
+ $(call cmd,dtb_install,$(install-dir))
+
++$(dtboinst-files): %.dtbo: $(obj)/%.dtbo
++ $(call cmd,dtb_install,$(install-dir))
++
+ $(dtbinst-dirs):
+ $(Q)$(MAKE) $(dtbinst)=$(obj)/$@
+
+-PHONY += $(dtbinst-files) $(dtbinst-dirs)
+-__dtbs_install: $(dtbinst-files) $(dtbinst-dirs)
++PHONY += $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
++__dtbs_install: $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
+
+ .PHONY: $(PHONY)
+--- a/scripts/Makefile.lib
++++ b/scripts/Makefile.lib
+@@ -316,6 +316,17 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
+ $(obj)/%.dtb: $(src)/%.dts FORCE
+ $(call if_changed_dep,dtc)
+
++quiet_cmd_dtco = DTCO $@
++cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
++ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
++ $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
++ -i $(dir $<) $(DTC_FLAGS) \
++ -d $(depfile).dtc.tmp $(dtc-tmp) ; \
++ cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
++
++$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE
++ $(call if_changed_dep,dtco)
++
+ dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
+
+ # Bzip2
+@@ -348,7 +359,7 @@ cmd_bzip2 = (cat $(filter-out FORCE,$^)
+
+ quiet_cmd_lzma = LZMA $@
+ cmd_lzma = (cat $(filter-out FORCE,$^) | \
+- lzma e -d20 -lc1 -lp2 -pb2 -eos -si -so && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
++ lzma -9 && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
+ (rm -f $@ ; false)
+
+ quiet_cmd_lzo = LZO $@
+--- /dev/null
++++ b/scripts/knlinfo
+@@ -0,0 +1,171 @@
++#!/usr/bin/env perl
++# ----------------------------------------------------------------------
++# knlinfo by Phil Elwell for Raspberry Pi
++#
++# (c) 2014,2015 Raspberry Pi (Trading) Limited <info at raspberrypi.org>
++#
++# Licensed under the terms of the GNU General Public License.
++# ----------------------------------------------------------------------
++
++use strict;
++use integer;
++
++use Fcntl ":seek";
++
++my $trailer_magic = 'RPTL';
++
++my %atom_formats =
++(
++ 'DDTK' => \&format_bool,
++ 'DTOK' => \&format_bool,
++ 'KVer' => \&format_string,
++ '270X' => \&format_bool,
++ '283X' => \&format_bool,
++ '283x' => \&format_bool,
++);
++
++if (@ARGV != 1)
++{
++ print ("Usage: knlinfo <kernel image>\n");
++ exit(1);
++}
++
++my $kernel_file = $ARGV[0];
++
++
++my ($atoms, $pos) = read_trailer($kernel_file);
++
++exit(1) if (!$atoms);
++
++printf("Kernel trailer found at %d/0x%x:\n", $pos, $pos);
++
++foreach my $atom (@$atoms)
++{
++ printf(" %s: %s\n", $atom->[0], format_atom($atom));
++}
++
++exit(0);
++
++sub read_trailer
++{
++ my ($kernel_file) = @_;
++ my $fh;
++
++ if (!open($fh, '<', $kernel_file))
++ {
++ print ("* Failed to open '$kernel_file'\n");
++ return undef;
++ }
++
++ if (!seek($fh, -12, SEEK_END))
++ {
++ print ("* seek error in '$kernel_file'\n");
++ return undef;
++ }
++
++ my $last_bytes;
++ sysread($fh, $last_bytes, 12);
++
++ my ($trailer_len, $data_len, $magic) = unpack('VVa4', $last_bytes);
++
++ if (($magic ne $trailer_magic) || ($data_len != 4))
++ {
++ print ("* no trailer\n");
++ return undef;
++ }
++ if (!seek($fh, -12, SEEK_END))
++ {
++ print ("* seek error in '$kernel_file'\n");
++ return undef;
++ }
++
++ $trailer_len -= 12;
++
++ while ($trailer_len > 0)
++ {
++ if ($trailer_len < 8)
++ {
++ print ("* truncated atom header in trailer\n");
++ return undef;
++ }
++ if (!seek($fh, -8, SEEK_CUR))
++ {
++ print ("* seek error in '$kernel_file'\n");
++ return undef;
++ }
++ $trailer_len -= 8;
++
++ my $atom_hdr;
++ sysread($fh, $atom_hdr, 8);
++ my ($atom_len, $atom_type) = unpack('Va4', $atom_hdr);
++
++ if ($trailer_len < $atom_len)
++ {
++ print ("* truncated atom data in trailer\n");
++ return undef;
++ }
++
++ my $rounded_len = (($atom_len + 3) & ~3);
++ if (!seek($fh, -(8 + $rounded_len), SEEK_CUR))
++ {
++ print ("* seek error in '$kernel_file'\n");
++ return undef;
++ }
++ $trailer_len -= $rounded_len;
++
++ my $atom_data;
++ sysread($fh, $atom_data, $atom_len);
++
++ if (!seek($fh, -$atom_len, SEEK_CUR))
++ {
++ print ("* seek error in '$kernel_file'\n");
++ return undef;
++ }
++
++ push @$atoms, [ $atom_type, $atom_data ];
++ }
++
++ if (($$atoms[-1][0] eq "\x00\x00\x00\x00") &&
++ ($$atoms[-1][1] eq ""))
++ {
++ pop @$atoms;
++ }
++ else
++ {
++ print ("* end marker missing from trailer\n");
++ }
++
++ return ($atoms, tell($fh));
++}
++
++sub format_atom
++{
++ my ($atom) = @_;
++
++ my $format_func = $atom_formats{$atom->[0]} || \&format_hex;
++ return $format_func->($atom->[1]);
++}
++
++sub format_bool
++{
++ my ($data) = @_;
++ return unpack('V', $data) ? 'y' : 'n';
++}
++
++sub format_int
++{
++ my ($data) = @_;
++ return unpack('V', $data);
++}
++
++sub format_string
++{
++ my ($data) = @_;
++ return '"'.$data.'"';
++}
++
++sub format_hex
++{
++ my ($data) = @_;
++ return unpack('H*', $data);
++}
+--- a/scripts/ld-version.sh
++++ b/scripts/ld-version.sh
+@@ -1,7 +1,6 @@
+-#!/bin/sh
++#!/usr/bin/awk -f
+ # SPDX-License-Identifier: GPL-2.0
+ # extract linker version number from stdin and turn into single number
+-exec awk '
+ {
+ gsub(".*\\)", "");
+ gsub(".*version ", "");
+@@ -10,4 +9,3 @@ exec awk '
+ print a[1]*100000000 + a[2]*1000000 + a[3]*10000;
+ exit
+ }
+-'
+--- a/scripts/link-vmlinux.sh
++++ b/scripts/link-vmlinux.sh
+@@ -164,10 +164,6 @@ kallsyms()
+ kallsymopt="${kallsymopt} --base-relative"
+ fi
+
+- if [ -n "${CONFIG_KALLSYMS_UNCOMPRESSED}" ]; then
+- kallsymopt="${kallsymopt} --uncompressed"
+- fi
+-
+ local aflags="${KBUILD_AFLAGS} ${KBUILD_AFLAGS_KERNEL} \
+ ${NOSTDINC_FLAGS} ${LINUXINCLUDE} ${KBUILD_CPPFLAGS}"
+
+--- /dev/null
++++ b/scripts/mkknlimg
+@@ -0,0 +1,262 @@
++#!/usr/bin/env perl
++# ----------------------------------------------------------------------
++# mkknlimg by Phil Elwell for Raspberry Pi
++# based on extract-ikconfig by Dick Streefland
++#
++# (c) 2009,2010 Dick Streefland <dick at streefland.net>
++# (c) 2014,2015 Raspberry Pi (Trading) Limited <info at raspberrypi.org>
++#
++# Licensed under the terms of the GNU General Public License.
++# ----------------------------------------------------------------------
++
++use strict;
++use warnings;
++use integer;
++
++use constant FLAG_PI => 0x01;
++use constant FLAG_DTOK => 0x02;
++use constant FLAG_DDTK => 0x04;
++use constant FLAG_270X => 0x08;
++use constant FLAG_283X => 0x10;
++
++my $trailer_magic = 'RPTL';
++
++my $tmpfile1 = "/tmp/mkknlimg_$$.1";
++my $tmpfile2 = "/tmp/mkknlimg_$$.2";
++
++my $dtok = 0;
++my $ddtk = 0;
++my $is_270x = 0;
++my $is_283x = 0;
++
++while (@ARGV && ($ARGV[0] =~ /^-/))
++{
++ my $arg = shift(@ARGV);
++ if ($arg eq '--dtok')
++ {
++ $dtok = 1;
++ }
++ elsif ($arg eq '--ddtk')
++ {
++ $ddtk = 1;
++ }
++ elsif ($arg eq '--270x')
++ {
++ $is_270x = 1;
++ }
++ elsif ($arg eq '--283x')
++ {
++ $is_283x = 1;
++ }
++ else
++ {
++ print ("* Unknown option '$arg'\n");
++ usage();
++ }
++}
++
++usage() if (@ARGV != 2);
++
++my $kernel_file = $ARGV[0];
++my $out_file = $ARGV[1];
++
++if (! -r $kernel_file)
++{
++ print ("* File '$kernel_file' not found\n");
++ usage();
++}
++
++my $wanted_strings =
++{
++ 'brcm,bcm2835-mmc' => FLAG_PI,
++ 'brcm,bcm2835-sdhost' => FLAG_PI,
++ 'brcm,bcm2835-gpio' => FLAG_PI | FLAG_DTOK,
++ 'brcm,bcm2708-fb' => FLAG_PI | FLAG_DTOK | FLAG_270X,
++ 'brcm,bcm2708-usb' => FLAG_PI | FLAG_DTOK | FLAG_270X,
++ 'brcm,bcm2835' => FLAG_PI | FLAG_DTOK | FLAG_283X,
++ 'brcm,bcm2836' => FLAG_PI | FLAG_DTOK | FLAG_283X,
++ 'brcm,bcm2837' => FLAG_PI | FLAG_DTOK | FLAG_283X,
++ 'of_cfs_init' => FLAG_DTOK | FLAG_DDTK,
++};
++
++my $res = try_extract($kernel_file, $tmpfile1);
++$res ||= try_decompress('\037\213\010', 'xy', 'gunzip', 0,
++ $kernel_file, $tmpfile1, $tmpfile2);
++$res ||= try_decompress('\3757zXZ\000', 'abcde', 'unxz --single-stream', -1,
++ $kernel_file, $tmpfile1, $tmpfile2);
++$res ||= try_decompress('BZh', 'xy', 'bunzip2', 0,
++ $kernel_file, $tmpfile1, $tmpfile2);
++$res ||= try_decompress('\135\0\0\0', 'xxx', 'unlzma', 0,
++ $kernel_file, $tmpfile1, $tmpfile2);
++$res ||= try_decompress('\211\114\132', 'xy', 'lzop -d', 0,
++ $kernel_file, $tmpfile1, $tmpfile2);
++$res ||= try_decompress('\002\041\114\030', 'xy', 'lz4 -d', 1,
++ $kernel_file, $tmpfile1, $tmpfile2);
++
++my $append_trailer;
++my $trailer;
++my $kver = '?';
++
++$append_trailer = 1;
++
++if ($res)
++{
++ $kver = $res->{'kver'} || '?';
++ my $flags = $res->{'flags'};
++ print("Version: $kver\n");
++
++ if ($flags & FLAG_PI)
++ {
++ $dtok ||= ($flags & FLAG_DTOK) != 0;
++ $is_270x ||= ($flags & FLAG_270X) != 0;
++ $is_283x ||= ($flags & FLAG_283X) != 0;
++ $ddtk ||= ($flags & FLAG_DDTK) != 0;
++ }
++ else
++ {
++ print ("* This doesn't look like a Raspberry Pi kernel.\n");
++ }
++}
++elsif (!$dtok)
++{
++ print ("* Is this a valid kernel?\n");
++}
++
++if ($append_trailer)
++{
++ printf("DT: %s\n", $dtok ? "y" : "n");
++ printf("DDT: %s\n", $ddtk ? "y" : "n");
++ printf("270x: %s\n", $is_270x ? "y" : "n");
++ printf("283x: %s\n", $is_283x ? "y" : "n");
++
++ my @atoms;
++
++ push @atoms, [ $trailer_magic, pack('V', 0) ];
++ push @atoms, [ 'KVer', $kver ];
++ push @atoms, [ 'DTOK', pack('V', $dtok) ];
++ push @atoms, [ 'DDTK', pack('V', $ddtk) ];
++ push @atoms, [ '270X', pack('V', $is_270x) ];
++ push @atoms, [ '283X', pack('V', $is_283x) ];
++ push @atoms, [ '283x', pack('V', $is_283x && !$is_270x) ];
++
++ $trailer = pack_trailer(\@atoms);
++ $atoms[0]->[1] = pack('V', length($trailer));
++
++ $trailer = pack_trailer(\@atoms);
++}
++
++my $ofh;
++my $total_len = 0;
++
++if ($out_file eq $kernel_file)
++{
++ die "* Failed to open '$out_file' for append\n"
++ if (!open($ofh, '>>', $out_file));
++ $total_len = tell($ofh);
++}
++else
++{
++ die "* Failed to open '$kernel_file'\n"
++ if (!open(my $ifh, '<', $kernel_file));
++ die "* Failed to create '$out_file'\n"
++ if (!open($ofh, '>', $out_file));
++
++ my $copybuf;
++ while (1)
++ {
++ my $bytes = sysread($ifh, $copybuf, 64*1024);
++ last if (!$bytes);
++ syswrite($ofh, $copybuf, $bytes);
++ $total_len += $bytes;
++ }
++ close($ifh);
++}
++
++if ($trailer)
++{
++ # Pad to word-alignment
++ syswrite($ofh, "\x000\x000\x000", (-$total_len & 0x3));
++ syswrite($ofh, $trailer);
++}
++
++close($ofh);
++
++exit($trailer ? 0 : 1);
++
++END {
++ unlink($tmpfile1) if ($tmpfile1);
++ unlink($tmpfile2) if ($tmpfile2);
++}
++
++
++sub usage
++{
++ print ("Usage: mkknlimg [--dtok] [--270x] [--283x] <vmlinux|zImage|bzImage> <outfile>\n");
++ exit(1);
++}
++
++sub try_extract
++{
++ my ($knl, $tmp) = @_;
++
++ my $ver = `strings "$knl" | grep -a -E "^Linux version [1-9]"`;
++
++ return undef if (!$ver);
++
++ chomp($ver);
++
++ my $res = { 'kver'=>$ver };
++ $res->{'flags'} = strings_to_flags($knl, $wanted_strings);
++
++ return $res;
++}
++
++
++sub try_decompress
++{
++ my ($magic, $subst, $zcat, $idx, $knl, $tmp1, $tmp2) = @_;
++
++ my $pos = `tr "$magic\n$subst" "\n$subst=" < "$knl" | grep -abo "^$subst"`;
++ if ($pos)
++ {
++ chomp($pos);
++ $pos = (split(/[\r\n]+/, $pos))[$idx];
++ return undef if (!defined($pos));
++ $pos =~ s/:.*[\r\n]*$//s;
++ my $cmd = "tail -c+$pos \"$knl\" | $zcat > $tmp2 2> /dev/null";
++ my $err = (system($cmd) >> 8);
++ return undef if (($err != 0) && ($err != 2));
++
++ return try_extract($tmp2, $tmp1);
++ }
++
++ return undef;
++}
++
++sub strings_to_flags
++{
++ my ($knl, $strings) = @_;
++ my $string_pattern = '^('.join('|', keys(%$strings)).')$';
++ my $flags = 0;
++
++ my @matches = `strings \"$knl\" | grep -E \"$string_pattern\"`;
++ foreach my $match (@matches)
++ {
++ chomp($match);
++ $flags |= $strings->{$match};
++ }
++
++ return $flags;
++}
++
++sub pack_trailer
++{
++ my ($atoms) = @_;
++ my $trailer = pack('VV', 0, 0);
++ for (my $i = $#$atoms; $i>=0; $i--)
++ {
++ my $atom = $atoms->[$i];
++ $trailer .= pack('a*x!4Va4', $atom->[1], length($atom->[1]), $atom->[0]);
++ }
++ return $trailer;
++}
+diff --git a/arch/arm64/boot/dts/overlays b/arch/arm64/boot/dts/overlays
+new file mode 120000
+index 0000000..ded0864
+--- /dev/null
++++ b/arch/arm64/boot/dts/overlays
+@@ -0,0 +1 @@
++../../../arm/boot/dts/overlays
+\ No newline at end of file
+diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
+new file mode 120000
+index 0000000..ded0864
+--- /dev/null
++++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
+@@ -0,0 +1 @@
++../../../../arm/boot/dts/bcm283x-rpi-lan7515.dtsi
+\ No newline at end of file
--
2.11.0
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