[OpenWrt-Devel] [PATCH 4/4] Revert "ar71xx: Clear bits in ath79_setup_qca955x_eth_cfg"

[Sven Eckelmann]

From: Sven Eckelmann <sven.eckelmann at open-mesh.com>

Not all mach-* files set all boards correctly in ETH_CFG. They depend on
some preset values by u-boot which were not previously modified by
ath79_setup_qca955x_eth_cfg. Avoiding to modify them in this function keeps
it backward compatible for these boards.

This reverts commit 119b8ab2c2eac237ec4e9c4d0ed53df22b5c6978.

Signed-off-by: Sven Eckelmann <sven.eckelmann at open-mesh.com>
---
 target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c | 16 +++-------------
 1 file changed, 3 insertions(+), 13 deletions(-)

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index 2f2825f..b43c80a 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -833,24 +833,14 @@ void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd,
 void __init ath79_setup_qca955x_eth_cfg(u32 mask)
 {
 	void __iomem *base;
-	u32 t, m;
-
-	m = QCA955X_ETH_CFG_RGMII_EN |
-	    QCA955X_ETH_CFG_MII_GE0 |
-	    QCA955X_ETH_CFG_GMII_GE0 |
-	    QCA955X_ETH_CFG_MII_GE0_MASTER |
-	    QCA955X_ETH_CFG_MII_GE0_SLAVE |
-	    QCA955X_ETH_CFG_GE0_ERR_EN |
-	    QCA955X_ETH_CFG_GE0_SGMII |
-	    QCA955X_ETH_CFG_RMII_GE0 |
-	    QCA955X_ETH_CFG_MII_CNTL_SPEED |
-	    QCA955X_ETH_CFG_RMII_GE0_MASTER;
+	u32 t;
 
 	base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
 
 	t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG);
 
-	t &= ~m;
+	t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII);
+
 	t |= mask;
 
 	__raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
-- 
2.8.0.rc3
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