[OpenWrt-Devel] [PATCH] oxnas: also reset GPIO B registers on boot

[Daniel Golle]

Clear both, SYS_CTRL_*_SEL and SEC_CTRL_*_SEL on boot instead of
writing to SYS_CTRL_*_SEL twice which looks like a copy-paste error.
Thanks to anonymous to bring this up in #21892!

Signed-off-by: Daniel Golle <daniel at makrotopia.org>
---
 target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c b/target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c
index 2a8ada8..1e3b12d 100644
--- a/target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c
+++ b/target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c
@@ -152,12 +152,12 @@ void ox820_assert_system_reset(enum reboot_mode mode, const char *cmd)
 	writel(0, SYS_CTRL_ALTERNATIVE_SEL);
 	writel(0, SYS_CTRL_PULLUP_SEL);
 
-	writel(0, SYS_CTRL_SECONDARY_SEL);
-	writel(0, SYS_CTRL_TERTIARY_SEL);
-	writel(0, SYS_CTRL_QUATERNARY_SEL);
-	writel(0, SYS_CTRL_DEBUG_SEL);
-	writel(0, SYS_CTRL_ALTERNATIVE_SEL);
-	writel(0, SYS_CTRL_PULLUP_SEL);
+	writel(0, SEC_CTRL_SECONDARY_SEL);
+	writel(0, SEC_CTRL_TERTIARY_SEL);
+	writel(0, SEC_CTRL_QUATERNARY_SEL);
+	writel(0, SEC_CTRL_DEBUG_SEL);
+	writel(0, SEC_CTRL_ALTERNATIVE_SEL);
+	writel(0, SEC_CTRL_PULLUP_SEL);
 
 	/* No need to save any state, as the ROM loader can determine whether
 	 * reset is due to power cycling or programatic action, just hit the
-- 
2.7.2
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