[OpenWrt-Devel] [PATCH 8/9] ipq806x/dts: Add Archer C2600 DTSI

Darryl Sokoloski darryl at sokoloski.ca
Wed Apr 20 01:55:34 EDT 2016


Signed-off-by: Josh Bendavid <joshbendavid at gmail.com>
[darryl at sokoloski.ca: submitting patches on behalf of Josh Bendavid]
Signed-off-by: Darryl Sokoloski <darryl at sokoloski.ca>
---
 target/linux/ipq806x/dts/qcom-ipq8064-c2600.dts | 412 ++++++++++++++++++++++++
 1 file changed, 412 insertions(+)
 create mode 100644 target/linux/ipq806x/dts/qcom-ipq8064-c2600.dts

diff --git a/target/linux/ipq806x/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq806x/dts/qcom-ipq8064-c2600.dts
new file mode 100644
index 0000000..994b55e
--- /dev/null
+++ b/target/linux/ipq806x/dts/qcom-ipq8064-c2600.dts
@@ -0,0 +1,412 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "TP-Link Archer C2600";
+	compatible = "tplink,c2600", "qcom,ipq8064";
+
+	memory at 0 {
+		reg = <0x42000000 0x1e000000>;
+		device_type = "memory";
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		rsvd at 41200000 {
+			reg = <0x41200000 0x300000>;
+			no-map;
+		};
+	};
+
+	aliases {
+		serial0 = &uart4;
+		mdio-gpio0 = &mdio0;
+	};
+
+	chosen {
+		linux,stdout-path = "serial0:115200n8";
+	};
+
+	soc {
+		pinmux at 800000 {
+			i2c4_pins: i2c4_pinmux {
+				pins = "gpio12", "gpio13";
+				function = "gsbi4";
+				bias-disable;
+			};
+
+			spi_pins: spi_pins {
+				mux {
+					pins = "gpio18", "gpio19", "gpio21";
+					function = "gsbi5";
+					drive-strength = <10>;
+					bias-none;
+				};
+			};
+
+			nand_pins: nand_pins {
+				mux {
+					pins = "gpio34", "gpio35", "gpio36",
+					       "gpio37", "gpio38", "gpio39",
+					       "gpio40", "gpio41", "gpio42",
+					       "gpio43", "gpio44", "gpio45",
+					       "gpio46", "gpio47";
+					function = "nand";
+					drive-strength = <10>;
+					bias-disable;
+				};
+
+				pullups {
+					pins = "gpio39";
+					bias-pull-up;
+				};
+
+				hold {
+					pins = "gpio40", "gpio41", "gpio42",
+					       "gpio43", "gpio44", "gpio45",
+					       "gpio46", "gpio47";
+					bias-bus-hold;
+				};
+			};
+
+			mdio0_pins: mdio0_pins {
+				mux {
+					pins = "gpio0", "gpio1";
+					function = "gpio";
+					drive-strength = <8>;
+					bias-disable;
+				};
+			};
+
+			rgmii2_pins: rgmii2_pins {
+				mux {
+					pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
+					       "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
+					function = "rgmii2";
+					drive-strength = <8>;
+					bias-disable;
+				};
+			};
+		};
+
+		gsbi at 16300000 {
+			qcom,mode = <GSBI_PROT_I2C_UART>;
+			status = "ok";
+			serial at 16340000 {
+				status = "ok";
+			};
+			/*
+			 * The i2c device on gsbi4 should not be enabled.
+			 * On ipq806x designs gsbi4 i2c is meant for exclusive
+			 * RPM usage. Turning this on in kernel manifests as
+			 * i2c failure for the RPM.
+			 */
+		};
+
+		gsbi5: gsbi at 1a200000 {
+			qcom,mode = <GSBI_PROT_SPI>;
+			status = "ok";
+
+			spi4: spi at 1a280000 {
+				status = "ok";
+				spi-max-frequency = <50000000>;
+
+				pinctrl-0 = <&spi_pins>;
+				pinctrl-names = "default";
+
+				cs-gpios = <&qcom_pinmux 20 0>;
+
+				flash: m25p80 at 0 {
+					compatible = "s25fl256s1";
+					#address-cells = <1>;
+					#size-cells = <1>;
+					spi-max-frequency = <50000000>;
+					reg = <0>;
+
+					SBL1 at 0 {
+						label = "SBL1";
+						reg = <0x0 0x20000>;
+						read-only;
+					};
+					MIBIB at 20000 {
+						label = "MIBIB";
+						reg = <0x20000 0x20000>;
+						read-only;
+					};
+					SBL2 at 40000 {
+						label = "SBL2";
+						reg = <0x40000 0x20000>;
+						read-only;
+					};
+					SBL3 at 60000 {
+						label = "SBL3";
+						reg = <0x60000 0x30000>;
+						read-only;
+					};
+					DDRCONFIG at 90000 {
+						label = "DDRCONFIG";
+						reg = <0x90000 0x10000>;
+						read-only;
+					};
+					SSD at a0000 {
+						label = "SSD";
+						reg = <0xa0000 0x10000>;
+						read-only;
+					};
+					TZ at b0000 {
+						label = "TZ";
+						reg = <0xb0000 0x30000>;
+						read-only;
+					};
+					RPM at e0000 {
+						label = "RPM";
+						reg = <0xe0000 0x20000>;
+						read-only;
+					};
+					fs-uboot at 100000 {
+						label = "fs-uboot";
+						reg = <0x100000 0x70000>;
+						read-only;
+					};
+					uboot-env at 170000 {
+						label = "uboot-env";
+						reg = <0x170000 0x40000>;
+						read-only;
+					};
+					radio at 1b0000 {
+						label = "radio";
+						reg = <0x1b0000 0x40000>;
+						read-only;
+					};
+					os-image at 1f0000 {
+						label = "os-image";
+						reg = <0x1f0000 0x200000>;
+					};
+					rootfs at 3f0000 {
+						label = "rootfs";
+						reg = <0x3f0000 0x1b00000>;
+					};
+					defaultmac: default-mac at 1ef0000 {
+						label = "default-mac";
+						reg = <0x1ef0000 0x00200>;
+						read-only;
+					};
+					pin at 1ef0200 {
+						label = "pin";
+						reg = <0x1ef0200 0x00200>;
+						read-only;
+					};
+					product-info at 1ef0400 {
+						label = "product-info";
+						reg = <0x1ef0400 0x0fc00>;
+						read-only;
+					};
+					partition-table at 1f00000 {
+						label = "partition-table";
+						reg = <0x1f00000 0x10000>;
+						read-only;
+					};
+					soft-version at 1f10000 {
+						label = "soft-version";
+						reg = <0x1f10000 0x10000>;
+						read-only;
+					};
+					support-list at 1f20000 {
+						label = "support-list";
+						reg = <0x1f20000 0x10000>;
+						read-only;
+					};
+					profile at 1f30000 {
+						label = "profile";
+						reg = <0x1f30000 0x10000>;
+						read-only;
+					};
+					default-config at 1f40000 {
+						label = "default-config";
+						reg = <0x1f40000 0x10000>;
+						read-only;
+					};
+					user-config at 1f50000 {
+						label = "user-config";
+						reg = <0x1f50000 0x40000>;
+						read-only;
+					};
+					qos-db at 1f90000 {
+						label = "qos-db";
+						reg = <0x1f90000 0x40000>;
+						read-only;
+					};
+					usb-config at 1fd0000 {
+						label = "usb-config";
+						reg = <0x1fd0000 0x10000>;
+						read-only;
+					};
+					log at 1fe0000 {
+						label = "log";
+						reg = <0x1fe0000 0x20000>;
+						read-only;
+					};
+				};
+			};
+		};
+
+		phy at 100f8800 {		/* USB3 port 1 HS phy */
+			status = "ok";
+		};
+
+		phy at 100f8830 {		/* USB3 port 1 SS phy */
+			status = "ok";
+		};
+
+		phy at 110f8800 {		/* USB3 port 0 HS phy */
+			status = "ok";
+		};
+
+		phy at 110f8830 {		/* USB3 port 0 SS phy */
+			status = "ok";
+		};
+
+		usb30 at 0 {
+			status = "ok";
+		};
+
+		usb30 at 1 {
+			status = "ok";
+		};
+
+		pcie0: pci at 1b500000 {
+			status = "ok";
+			phy-tx0-term-offset = <7>;
+		};
+
+		pcie1: pci at 1b700000 {
+			status = "ok";
+			phy-tx0-term-offset = <7>;
+		};
+
+		mdio0: mdio {
+			compatible = "virtual,mdio-gpio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
+			pinctrl-0 = <&mdio0_pins>;
+			pinctrl-names = "default";
+
+			phy0: ethernet-phy at 0 {
+				device_type = "ethernet-phy";
+				reg = <0>;
+				qca,ar8327-initvals = <
+					0x00004 0x7600000   /* PAD0_MODE */
+					0x00008 0x1000000   /* PAD5_MODE */
+					0x0000c 0x80        /* PAD6_MODE */
+					0x000e4 0xaa545     /* MAC_POWER_SEL */
+					0x000e0 0xc74164de  /* SGMII_CTRL */
+					0x0007c 0x4e        /* PORT0_STATUS */
+					0x00094 0x4e        /* PORT6_STATUS */
+					>;
+			};
+
+			phy4: ethernet-phy at 4 {
+				device_type = "ethernet-phy";
+				reg = <4>;
+			};
+		};
+
+		gmac1: ethernet at 37200000 {
+			status = "ok";
+			phy-mode = "rgmii";
+			qcom,id = <1>;
+
+			pinctrl-0 = <&rgmii2_pins>;
+			pinctrl-names = "default";
+
+			mtd-mac-address = <&defaultmac 0x8>;
+			mtd-mac-address-increment = <1>;
+                        
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+
+		gmac2: ethernet at 37400000 {
+			status = "ok";
+			phy-mode = "sgmii";
+			qcom,id = <2>;
+
+			mtd-mac-address = <&defaultmac 0x8>;
+                        
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+        
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		wifi {
+			label = "wifi";
+			gpios = <&qcom_pinmux 49 1>;
+			linux,code = <KEY_WLAN>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&qcom_pinmux 64 1>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&qcom_pinmux 65 1>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+                ledgeneral {
+			label = "ledgeneral";
+			gpios = <&qcom_pinmux 16 1>;
+			linux,code = <KEY_DOLLAR>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		lan {
+			label = "lan:blue";
+			gpios = <&qcom_pinmux 6 0>;
+		};
+                usb4 {
+			label = "usb_4:blue";
+			gpios = <&qcom_pinmux 7 0>;
+		};
+                usb2 {
+			label = "usb_2:blue";
+			gpios = <&qcom_pinmux 8 0>;
+		};
+                wps {
+			label = "wps:blue";
+			gpios = <&qcom_pinmux 9 0>;
+		};
+                wan_blue {
+			label = "wan:blue";
+			gpios = <&qcom_pinmux 33 1>;
+		};
+                status {
+			label = "status:blue";
+			gpios = <&qcom_pinmux 53 0>;
+			default-state = "on";
+		};
+                ledgnr {
+			label = "ledgnr:blue";
+			gpios = <&qcom_pinmux 66 0>;
+		};
+        };
+};
+
+&adm_dma {
+	status = "ok";
+};
-- 
2.4.10
_______________________________________________
openwrt-devel mailing list
openwrt-devel at lists.openwrt.org
https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel


More information about the openwrt-devel mailing list