[OpenWrt-Devel] [PATCH 4/6] generic: fix unrecognized opcode wsbh when building for MIPS16.
Yousong Zhou
yszhou4tech at gmail.com
Tue Sep 1 08:14:44 EDT 2015
The issue was found and reported by hynman [1] when compiling reaver for ar71xx
(Big Endian MIPS).
{standard input}: Assembler messages:
{standard input}:79: Error: unrecognized opcode `wsbh $2,$2'
{standard input}:90: Error: unrecognized opcode `wsbh $3,$17'
{standard input}:208: Error: unrecognized opcode `wsbh $2,$2'
make[3]: *** [builder.o] Error 1
[1] https://github.com/openwrt/packages/commit/1e29676a8ac74f797f8ca799364681cec575ae6f#commitcomment-12901931
Signed-off-by: Yousong Zhou <yszhou4tech at gmail.com>
---
...recognized-opcode-WSBH-DSBH-DSHD-when-usi.patch | 85 ++++++++++++++++++++
...recognized-opcode-WSBH-DSBH-DSHD-when-usi.patch | 85 ++++++++++++++++++++
...recognized-opcode-WSBH-DSBH-DSHD-when-usi.patch | 85 ++++++++++++++++++++
3 files changed, 255 insertions(+)
create mode 100644 target/linux/generic/patches-3.18/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
create mode 100644 target/linux/generic/patches-4.0/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
create mode 100644 target/linux/generic/patches-4.1/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
diff --git a/target/linux/generic/patches-3.18/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch b/target/linux/generic/patches-3.18/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
new file mode 100644
index 0000000..2056735
--- /dev/null
+++ b/target/linux/generic/patches-3.18/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
@@ -0,0 +1,85 @@
+From f4b20c49109045fc2f58f7b67160f07ebd7f0ea7 Mon Sep 17 00:00:00 2001
+From: Yousong Zhou <yszhou4tech at gmail.com>
+Date: Thu, 27 Aug 2015 09:58:53 +0800
+Subject: [PATCH] MIPS: Fix unrecognized opcode WSBH/DSBH/DSHD when using
+ MIPS16.
+
+The nomips16 has to be added both as function attribute and assembler
+directive.
+
+When only function attribute was specified, the compiler will inline the
+function when -Os optimization was applied. The generated assembly code
+was cannot be correctly assembled because ISA mode switch has to be done
+with a jump.
+
+When only ".set nomips" directive was used, the compiled function code
+will be invalid because mixed MIPS16 and MIPS32 instructions were
+generated by gcc. The result will be like the following,
+
+ 00403100 <__arch_swab16>:
+ 403100: 7c0410a0 wsbh v0,a0
+ 403104: e820ea31 swc2 $0,-5583(at)
+
+while correct code should be
+
+ 00402650 <__arch_swab16>:
+ 402650: 7c0410a0 wsbh v0,a0
+ 402654: 03e00008 jr ra
+ 402658: 3042ffff andi v0,v0,0xffff
+
+Signed-off-by: Yousong Zhou <yszhou4tech at gmail.com>
+---
+ arch/mips/include/uapi/asm/swab.h | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+diff --git a/arch/mips/include/uapi/asm/swab.h b/arch/mips/include/uapi/asm/swab.h
+index 8f2d184..4b1044d 100644
+--- a/arch/mips/include/uapi/asm/swab.h
++++ b/arch/mips/include/uapi/asm/swab.h
+@@ -16,11 +16,14 @@
+ #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
+ defined(_MIPS_ARCH_LOONGSON3A)
+
+-static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
++#define __nomips16 __attribute__((nomips16))
++
++static inline __nomips16 __attribute_const__ __u16 __arch_swab16(__u16 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips32r2 \n"
++ " .set nomips16 \n"
+ " wsbh %0, %1 \n"
+ " .set pop \n"
+ : "=r" (x)
+@@ -30,11 +33,12 @@ static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
+ }
+ #define __arch_swab16 __arch_swab16
+
+-static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
++static inline __nomips16 __attribute_const__ __u32 __arch_swab32(__u32 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips32r2 \n"
++ " .set nomips16 \n"
+ " wsbh %0, %1 \n"
+ " rotr %0, %0, 16 \n"
+ " .set pop \n"
+@@ -50,11 +54,12 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
+ * 64-bit kernel on r2 CPUs.
+ */
+ #ifdef __mips64
+-static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
++static inline __nomips16 __attribute_const__ __u64 __arch_swab64(__u64 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips64r2 \n"
++ " .set nomips16 \n"
+ " dsbh %0, %1 \n"
+ " dshd %0, %0 \n"
+ " .set pop \n"
+--
+1.7.10.4
+
diff --git a/target/linux/generic/patches-4.0/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch b/target/linux/generic/patches-4.0/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
new file mode 100644
index 0000000..2056735
--- /dev/null
+++ b/target/linux/generic/patches-4.0/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
@@ -0,0 +1,85 @@
+From f4b20c49109045fc2f58f7b67160f07ebd7f0ea7 Mon Sep 17 00:00:00 2001
+From: Yousong Zhou <yszhou4tech at gmail.com>
+Date: Thu, 27 Aug 2015 09:58:53 +0800
+Subject: [PATCH] MIPS: Fix unrecognized opcode WSBH/DSBH/DSHD when using
+ MIPS16.
+
+The nomips16 has to be added both as function attribute and assembler
+directive.
+
+When only function attribute was specified, the compiler will inline the
+function when -Os optimization was applied. The generated assembly code
+was cannot be correctly assembled because ISA mode switch has to be done
+with a jump.
+
+When only ".set nomips" directive was used, the compiled function code
+will be invalid because mixed MIPS16 and MIPS32 instructions were
+generated by gcc. The result will be like the following,
+
+ 00403100 <__arch_swab16>:
+ 403100: 7c0410a0 wsbh v0,a0
+ 403104: e820ea31 swc2 $0,-5583(at)
+
+while correct code should be
+
+ 00402650 <__arch_swab16>:
+ 402650: 7c0410a0 wsbh v0,a0
+ 402654: 03e00008 jr ra
+ 402658: 3042ffff andi v0,v0,0xffff
+
+Signed-off-by: Yousong Zhou <yszhou4tech at gmail.com>
+---
+ arch/mips/include/uapi/asm/swab.h | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+diff --git a/arch/mips/include/uapi/asm/swab.h b/arch/mips/include/uapi/asm/swab.h
+index 8f2d184..4b1044d 100644
+--- a/arch/mips/include/uapi/asm/swab.h
++++ b/arch/mips/include/uapi/asm/swab.h
+@@ -16,11 +16,14 @@
+ #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
+ defined(_MIPS_ARCH_LOONGSON3A)
+
+-static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
++#define __nomips16 __attribute__((nomips16))
++
++static inline __nomips16 __attribute_const__ __u16 __arch_swab16(__u16 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips32r2 \n"
++ " .set nomips16 \n"
+ " wsbh %0, %1 \n"
+ " .set pop \n"
+ : "=r" (x)
+@@ -30,11 +33,12 @@ static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
+ }
+ #define __arch_swab16 __arch_swab16
+
+-static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
++static inline __nomips16 __attribute_const__ __u32 __arch_swab32(__u32 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips32r2 \n"
++ " .set nomips16 \n"
+ " wsbh %0, %1 \n"
+ " rotr %0, %0, 16 \n"
+ " .set pop \n"
+@@ -50,11 +54,12 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
+ * 64-bit kernel on r2 CPUs.
+ */
+ #ifdef __mips64
+-static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
++static inline __nomips16 __attribute_const__ __u64 __arch_swab64(__u64 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips64r2 \n"
++ " .set nomips16 \n"
+ " dsbh %0, %1 \n"
+ " dshd %0, %0 \n"
+ " .set pop \n"
+--
+1.7.10.4
+
diff --git a/target/linux/generic/patches-4.1/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch b/target/linux/generic/patches-4.1/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
new file mode 100644
index 0000000..2056735
--- /dev/null
+++ b/target/linux/generic/patches-4.1/133-MIPS-Fix-unrecognized-opcode-WSBH-DSBH-DSHD-when-usi.patch
@@ -0,0 +1,85 @@
+From f4b20c49109045fc2f58f7b67160f07ebd7f0ea7 Mon Sep 17 00:00:00 2001
+From: Yousong Zhou <yszhou4tech at gmail.com>
+Date: Thu, 27 Aug 2015 09:58:53 +0800
+Subject: [PATCH] MIPS: Fix unrecognized opcode WSBH/DSBH/DSHD when using
+ MIPS16.
+
+The nomips16 has to be added both as function attribute and assembler
+directive.
+
+When only function attribute was specified, the compiler will inline the
+function when -Os optimization was applied. The generated assembly code
+was cannot be correctly assembled because ISA mode switch has to be done
+with a jump.
+
+When only ".set nomips" directive was used, the compiled function code
+will be invalid because mixed MIPS16 and MIPS32 instructions were
+generated by gcc. The result will be like the following,
+
+ 00403100 <__arch_swab16>:
+ 403100: 7c0410a0 wsbh v0,a0
+ 403104: e820ea31 swc2 $0,-5583(at)
+
+while correct code should be
+
+ 00402650 <__arch_swab16>:
+ 402650: 7c0410a0 wsbh v0,a0
+ 402654: 03e00008 jr ra
+ 402658: 3042ffff andi v0,v0,0xffff
+
+Signed-off-by: Yousong Zhou <yszhou4tech at gmail.com>
+---
+ arch/mips/include/uapi/asm/swab.h | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+diff --git a/arch/mips/include/uapi/asm/swab.h b/arch/mips/include/uapi/asm/swab.h
+index 8f2d184..4b1044d 100644
+--- a/arch/mips/include/uapi/asm/swab.h
++++ b/arch/mips/include/uapi/asm/swab.h
+@@ -16,11 +16,14 @@
+ #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
+ defined(_MIPS_ARCH_LOONGSON3A)
+
+-static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
++#define __nomips16 __attribute__((nomips16))
++
++static inline __nomips16 __attribute_const__ __u16 __arch_swab16(__u16 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips32r2 \n"
++ " .set nomips16 \n"
+ " wsbh %0, %1 \n"
+ " .set pop \n"
+ : "=r" (x)
+@@ -30,11 +33,12 @@ static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
+ }
+ #define __arch_swab16 __arch_swab16
+
+-static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
++static inline __nomips16 __attribute_const__ __u32 __arch_swab32(__u32 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips32r2 \n"
++ " .set nomips16 \n"
+ " wsbh %0, %1 \n"
+ " rotr %0, %0, 16 \n"
+ " .set pop \n"
+@@ -50,11 +54,12 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
+ * 64-bit kernel on r2 CPUs.
+ */
+ #ifdef __mips64
+-static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
++static inline __nomips16 __attribute_const__ __u64 __arch_swab64(__u64 x)
+ {
+ __asm__(
+ " .set push \n"
+ " .set arch=mips64r2 \n"
++ " .set nomips16 \n"
+ " dsbh %0, %1 \n"
+ " dshd %0, %0 \n"
+ " .set pop \n"
+--
+1.7.10.4
+
--
1.7.10.4
_______________________________________________
openwrt-devel mailing list
openwrt-devel at lists.openwrt.org
https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
More information about the openwrt-devel
mailing list