[OpenWrt-Devel] [PATCH] ar8216: enable cpu port to receive arp and broadcast frames for ar8236

Weijie Gao hackpascal at gmail.com
Mon Dec 8 10:53:03 EST 2014


Signed-off-by: Weijie Gao <hackpascal at gmail.com>
---
 target/linux/generic/files/drivers/net/phy/ar8216.c | 9 +++++++++
 target/linux/generic/files/drivers/net/phy/ar8216.h | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
index 558b9f7..91e090a 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
@@ -947,6 +947,15 @@ ar8236_init_globals(struct ar8xxx_priv *priv)
 	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 		   AR8316_GCTRL_MTU, 9018 + 8 + 2);
 
+	/* enable cpu port to receive arp frames */
+	ar8xxx_rmw(priv, AR8216_REG_ATU_CTRL,
+		   AR8236_ATU_CTRL_RES, AR8236_ATU_CTRL_RES);
+
+	/* enable cpu port to receive multicast and broadcast frames */
+	ar8xxx_rmw(priv, AR8216_REG_FLOOD_MASK,
+		   AR8236_FM_CPU_BROADCAST_EN | AR8236_FM_CPU_BCAST_FWD_EN,
+		   AR8236_FM_CPU_BROADCAST_EN | AR8236_FM_CPU_BCAST_FWD_EN);
+
 	/* Enable MIB counters */
 	ar8xxx_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN,
 		   (AR8216_MIB_FUNC_NO_OP << AR8216_MIB_FUNC_S) |
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h
index f6df7c8..d437398 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.h
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.h
@@ -40,6 +40,8 @@
 #define AR8216_REG_FLOOD_MASK		0x002C
 #define   AR8216_FM_UNI_DEST_PORTS	BITS(0, 6)
 #define   AR8216_FM_MULTI_DEST_PORTS	BITS(16, 6)
+#define   AR8236_FM_CPU_BROADCAST_EN	BIT(26)
+#define   AR8236_FM_CPU_BCAST_FWD_EN	BIT(25)
 
 #define AR8216_REG_GLOBAL_CTRL		0x0030
 #define   AR8216_GCTRL_MTU		BITS(0, 11)
@@ -93,6 +95,7 @@
 #define   AR8216_ATU_CTRL_AGE_EN	BIT(17)
 #define   AR8216_ATU_CTRL_AGE_TIME	BITS(0, 16)
 #define   AR8216_ATU_CTRL_AGE_TIME_S	0
+#define   AR8236_ATU_CTRL_RES		BIT(20)
 
 #define AR8216_REG_MIB_FUNC		0x0080
 #define   AR8216_MIB_TIMER		BITS(0, 16)
-- 
1.9.1
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