[PATCH 1/2] ath79: correct switch PHYs for GMAC0 in ar934x

Chuanhong Guo gch981213 at gmail.com
Wed Oct 11 22:59:51 PDT 2023


On Thu, Oct 12, 2023 at 5:02 AM Randy Li via openwrt-devel
<openwrt-devel at lists.openwrt.org> wrote:
> Subject: [PATCH 1/2] ath79: correct switch PHYs for GMAC0 in ar934x
> According to Ethernet Subsystem section of Functional Description
> chapter of the datasheet, when GMAC0 connects to the internal
> switch, it is MDC/MDIO of the GMAC0 decided which PHY it should
> talk to.

The switch decides whether internal PHYs respond to direct PHY access
from GMAC MDIO. If the switch built-in MDIO bus is enabled, all the PHYs
only respond to switch MDIO requests and ignore the ones from GMAC
MDIO. If u-boot enables switch MDIO (many vendor u-boot do so),
PHYs defined in GMAC MDIO won't be discovered until a switch reset.

Also, I vaguely remembered that the AR934X GMAC0 MDIO is always the
external one and the built-in switch is on MDIO1. Have you tested this on
existing devices?

Chuanhong Guo

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