Any plans to submit realtek target drivers to mainline Linux?
Daniel Golle
daniel at makrotopia.org
Sun May 7 08:15:39 PDT 2023
On Sun, May 07, 2023 at 11:56:59AM -0300, Luiz Angelo Daros de Luca wrote:
> Em sáb., 6 de mai. de 2023 06:12, Arınç ÜNAL <arinc.unal at arinc9.com> escreveu:
> >
> > Hi.
>
> Hi Arinç,
>
> > I see a lot of development on the network drivers like DSA, PHY, etc.
> > Are there any plans to put all these drivers on the realtek target on
> > mainline Linux? To fully support these SoCs on mainline Linux?
> >
> > Arınç
> >
>
> I'm a minor contributor to the DSA driver for the realtek target, but
> I have my 2 cents to share. I believe we can start to enlist what
> would be needed to get the drivers upstream. We can start the
> discussion from there:
>
> - The DSA driver uses a lot of magic numbers that would not be
> accepted by the upstream kernel. They must be converted into macros,
> enum, inline functions and friends.
> - There are shared functions with internal conditions (if modelA then
> ...). Mixed with magic numbers, it is much easier to miss a
> peculiarity about a subtarget and introduce bugs. A nice way to avoid
> that is to convert them into indirect calls to subtarget functions
> (*_ops).
> - The driver uses hardcoded addresses and direct memory writes. I
> don't know if there is anything incompatible but upstream drivers
> normally use regmap. It will also clean up a lot of things and
> introduce nice functions.
> - The DSA driver uses a generic tag that is converted afterwards by
> each (ethernet?) driver into its CPU tag. The DSA taggers were
> designed to decouple CPU tag from ethernet driver logic and upstream
> maintainters might ask to implement each CPU tagger as a proper DSA
> tag. Although it might not make sense to have an ethernet driver
> without a tag in this target, it would get closer to how outer drivers
> work and make it easier to understand the driver.
- The RealTek SoCs can (and must!) offload paged MDIO phy access
operations. In order to not use patched PHY drivers which directly use
SoC-specific MDIO access functions, we will need to introduce support
for offloading paged Clause-22 MDIO to vanilla Linux. I've started
with that, but it certainly needs more work and preparation to be less
vendor-specific. Practically *all* PHY vendors use register 0x1f for
selecting the register page. The RealTek SoCs poll PHY state in
hardware and hence require using the offloaded page access methods
also when accessing PHY registers from Linux, as that would otherwise
interfere with that hardware-driven PHY polling.
>
> Regards,
>
> Luiz
>
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