[PATCH] [procd] system: add RISC-V CPU info
Yu Chien Peter Lin
peterlin at andestech.com
Wed Jun 14 20:32:33 PDT 2023
This patch adds the missing information about RISC-V architecture,
which has been supported by OpenWrt. Currently, LuCI shows "?" at the
field of Architecture, we add "RISC-V" with isa string parsed from
/proc/cpuinfo.
For example, the following platform generates "RISC-V (rv64imafdc)":
root at OpenWrt:/# cat /proc/cpuinfo
processor : 0
hart : 0
isa : rv64imafdc
mmu : sv48
mvendorid : 0x31e
marchid : 0x8000000000008a45
mimpid : 0x820
Signed-off-by: Yu Chien Peter Lin <peterlin at andestech.com>
---
system.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/system.c b/system.c
index 93eac59..1f2be33 100644
--- a/system.c
+++ b/system.c
@@ -153,6 +153,12 @@ static int system_board(struct ubus_context *ctx, struct ubus_object *obj,
blobmsg_add_string(&b, "system", line);
break;
}
+#elif __riscv
+ if (!strcasecmp(key, "isa")) {
+ snprintf(line, sizeof(line), "RISC-V (%s)", val + 2);
+ blobmsg_add_string(&b, "system", line);
+ break;
+ }
#else
if (!strcasecmp(key, "system type") ||
!strcasecmp(key, "processor") ||
--
2.34.1
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