mt7621 GPIO mapping mystery

John Crispin john at
Sat Jan 21 23:02:34 PST 2023

On 21.01.23 15:51, Sergio Paracuellos wrote:
> AFAICS, the Ralink driver sets gpio mode for a group of pins using
> set_mux operation [1] so when the
> gpio_request_enable() operation is called a check for that pin is set
> as gpio is performed. Nothing else.
> Maybe John Crispin who is the writer of this driver can explain a bit
> more about this.

the ralink mips silicon does not have a bit per pin to fiddle the mode. 
some pins are grouped. rgmii for example, there is a single bit that 
will effect 8 pins


More information about the openwrt-devel mailing list