MT7621 NAND OOB misdetect

Chuanhong Guo gch981213 at gmail.com
Wed Feb 15 07:17:50 PST 2023


Hi!

On Tue, Feb 14, 2023 at 4:01 AM Peter Naulls <peter at chocky.org> wrote:
>
> On 2/11/23 08:10, Chuanhong Guo wrote:
> > Hi!
> >
>
> >>
> >> # nanddump -a /dev/mtd2
> >> ECC failed: 8
> >> ECC corrected: 0
> >> Number of bad blocks: 0
> >> Number of bbt blocks: 0
> >> Block size 131072, page size 2048, OOB size 128
> >> Dumping data starting at 0x00000000 and ending at 0x00040000...
> >> libmtd: error!: MEMGETBADBLOCK ioctl failed for eraseblock 0 (mtd2)
> >>           error 77 (Bad message)
> >> nanddump: error!: libmtd: mtd_is_bad
> >>
> >> I haven't been able to find anything on what this error means in practice.
> >
> > You could try printing the spare size and ecc strength used in the
> > old driver, replacing the calculation in the new driver with
> > hard-coded values and see if that works. If it works, you can
> > implement the ecc strength override in our driver.
> >
>
> Thanks. I'm not real familiar with this, so it's slow going.  I'm sure the
> answer is simple.  Here's some more info from u-boot:
>
> # MTK NAND # : Use HW ECC
> NAND ID [C2 F1 80 91 03]
> Device found in MTK table, ID: c2f1, EXT_ID: 809103
> Support this Device in MTK table! c2f1
> select_chip
> [NAND]select ecc bit:12, sparesize :112 spare_per_sector=28
> Signature matched and data read!
> load_fact_bbt success 1023
> load fact bbt success
> [mtk_nand] probe successfully!
> mtd->writesize=2048 mtd->oobsize=112,   mtd->erasesize=131072  devinfo.iowidth=8
>
>
>  From the vendor mtk_nand2 driver:
>
>         nand_chip->ecc.mode = hw->nand_ecc_mode;    /* enable ECC */
>         nand_chip->ecc.strength = 1;
>
>
> [    9.398860] [NAND]select ecc bit:12, sparesize :112 spare_per_sector=28
>
> Also note:
>
>         mtd->oobsize = devinfo.sparesize;
>
> Which might be the misreporting.
>
>
> In our driver, it comes out as:
>
> [   16.091826] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB
> size: 128
> [   16.107083] mt7621-nand 1e003000.nand: ECC strength adjusted to 12 bits
>
> I tried adjusting in nand_onfi.c ecc_bits = 12 and spare_bytes_per_page to 112,
> to no avail.
>
> I set that back, and then in mt7621_nfc_calc_ecc_strength tried setting the
> strength to 1, with no obvious difference.
>
> What to try next, thanks!

It looks like the detected spare size and ECC strength matches between the
two drivers, according to the u-boot message and kernel log.
Maybe you can try dumping the nand controller setup registers and compare
the register values between the two drivers?
I don't have any other easier ideas now :(

-- 
Regards,
Chuanhong Guo



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