[PATCH v2 0/2] realtek: fix L2 entry setup and learning on CPU port
Jan Hoffmann
jan at 3e8.eu
Tue Oct 25 15:20:03 PDT 2022
This is a follow-up to the patch "realtek: don't set L2LEARNING flag in
rtl83xx TX header". An undesired effect of that patch is flooding of
some packets destined for the switch CPU port, which is addressed by
this additional patch series.
This patch series switches to assisted learning for the CPU port on all
devices, and also fixes some existing issues with setup of unicast L2
entries.
Together with the kernel 5.15 pull request, entries for local/bridge
addresses are added to the switch. I am still not sure why that doesn't
work with the patches in the current kernel. However, the pull request
for the kernel update seems to be in a good shape, so I don't think it
is worth it to investigate that any further.
Tested on RTL838x (HPE 1920-8G) and RTL839x (HPE 1920-48G).
Changes in v2:
- don't explicitly specify struct name as parameter to sizeof
- make calculation of SALRN shift offset clearer
- define SALRN values, mask and shift offset in header
Jan Hoffmann (2):
realtek: set up L2 table entries properly
realtek: use assisted learning on CPU port
.../files-5.10/drivers/net/dsa/rtl83xx/dsa.c | 45 ++++++++++++++-----
.../drivers/net/dsa/rtl83xx/rtl838x.h | 6 +++
2 files changed, 41 insertions(+), 10 deletions(-)
--
2.37.3
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