[PATCH] airoha: Add new target platform
Robert Marko
robimarko at gmail.com
Wed Jul 27 05:53:29 PDT 2022
On Wed, 27 Jul 2022 at 14:50, Hauke Mehrtens <hauke at hauke-m.de> wrote:
>
> Hi Daniel,
>
> Is it possible to buy devices with this SoC in the retail market or on ebay?
>
> On 7/27/22 13:57, Daniel Danzberger wrote:
> > Airoha is a new ARM platform based on Cortex A7 which has recently been
> > merged into linux-next.
Is this the one where A53 core is being limited to AArch32 by the BootROM?
Regards,
Robert
>
> The device tree says it is a arm,cortex-a53, see
> target/linux/airoha/dts/en7523.dtsi
>
> > This support is based mostly on those linux-next commits backported
> > for kernel 5.15.
> >
> > Patches:
> > 1 - platform support = linux-next
> > 2 - clock driver = linux-next
> > 3 - gpio driver = linux-next
> > 4 - linux,usable-memory-range dts support = linux-next
> > 5 - mtd spinand driver
> > 6 - spi driver
> > 7 - pci driver (kconfig only, uses mediatek PCI) = linux-next
> >
> > Still missing:
> > - Ethernet driver
> > - Sysupgrade support
> >
> > A.t.m there exists one subtarget EN7523 with only one evaluation
> > board.
>
> How close is the hardware to other medaitek SoCs? Should we add this as
> a subtarget to mediatek?
>
> >
> > The initramfs can be run with the following commands from u-boot:
> > -
> > u-boot> setenv bootfile \
> > openwrt-airoha-airoha_en7523-evb-initramfs-kernel.bin
> > u-boot> tftpboot
> > u-boot> bootm 0x81800000
> > -
> >
> > Signed-off-by: Daniel Danzberger <daniel at dd-wrt.com>
> > ---
> > target/linux/airoha/Makefile | 15 +
> > target/linux/airoha/config-5.15 | 278 ++++++++++++++
> > target/linux/airoha/dts/en7523-evb.dts | 73 ++++
> > target/linux/airoha/dts/en7523.dtsi | 219 +++++++++++
> > .../files/arch/arm/mach-airoha/Makefile | 2 +
> > .../files/arch/arm/mach-airoha/airoha.c | 16 +
> > .../airoha/files/drivers/clk/clk-en7523.c | 351 ++++++++++++++++++
> > .../airoha/files/drivers/gpio/gpio-en7523.c | 137 +++++++
> > .../include/dt-bindings/clock/en7523-clk.h | 17 +
> > target/linux/airoha/image/Makefile | 37 ++
> > target/linux/airoha/image/en7523.mk | 0
> > .../0001-add-airoha-platform.patch | 35 ++
> > .../0002-add-airoha-en7523-clk-driver.patch | 32 ++
> > .../0003-add-airoha-en7523-gpio-driver.patch | 33 ++
> > ...press-Parse-linux-usable-memory-rang.patch | 111 ++++++
> > ...nd-Add-support-for-Etron-EM73D044VCx.patch | 137 +++++++
> > ...for-the-Airoha-EN7523-SoC-SPI-contro.patch | 346 +++++++++++++++++
> > ...iatek-Allow-building-for-ARCH_AIROHA.patch | 35 ++
> > 18 files changed, 1874 insertions(+)
> > create mode 100644 target/linux/airoha/Makefile
> > create mode 100644 target/linux/airoha/config-5.15
> > create mode 100644 target/linux/airoha/dts/en7523-evb.dts
> > create mode 100644 target/linux/airoha/dts/en7523.dtsi
> > create mode 100644 target/linux/airoha/files/arch/arm/mach-airoha/Makefile
> > create mode 100644 target/linux/airoha/files/arch/arm/mach-airoha/airoha.c
> > create mode 100644 target/linux/airoha/files/drivers/clk/clk-en7523.c
> > create mode 100644 target/linux/airoha/files/drivers/gpio/gpio-en7523.c
> > create mode 100644 target/linux/airoha/files/include/dt-bindings/clock/en7523-clk.h
> > create mode 100644 target/linux/airoha/image/Makefile
> > create mode 100644 target/linux/airoha/image/en7523.mk
> > create mode 100644 target/linux/airoha/patches-5.15/0001-add-airoha-platform.patch
> > create mode 100644 target/linux/airoha/patches-5.15/0002-add-airoha-en7523-clk-driver.patch
> > create mode 100644 target/linux/airoha/patches-5.15/0003-add-airoha-en7523-gpio-driver.patch
> > create mode 100644 target/linux/airoha/patches-5.15/0004-ARM-9124-1-uncompress-Parse-linux-usable-memory-rang.patch
> > create mode 100644 target/linux/airoha/patches-5.15/0005-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch
> > create mode 100644 target/linux/airoha/patches-5.15/0006-spi-Add-support-for-the-Airoha-EN7523-SoC-SPI-contro.patch
> > create mode 100644 target/linux/airoha/patches-5.15/0007-PCI-mediatek-Allow-building-for-ARCH_AIROHA.patch
> >
> > diff --git a/target/linux/airoha/Makefile b/target/linux/airoha/Makefile
> > new file mode 100644
> > index 0000000000..723bec8cd4
> > --- /dev/null
> > +++ b/target/linux/airoha/Makefile
> > @@ -0,0 +1,15 @@
> > +include $(TOPDIR)/rules.mk
> > +
> > +ARCH:=arm
> > +BOARD:=airoha
> > +BOARDNAME:=Airoha ARM
> > +CPU_TYPE:=cortex-a7
> > +FEATURES:=dt squashfs nand ramdisk gpio source-only
> > +
> > +KERNEL_PATCHVER:=5.15
> > +
> > +include $(INCLUDE_DIR)/target.mk
> > +
> > +KERNELNAME:=Image dtbs
> > +
> > +$(eval $(call BuildTarget))
> > diff --git a/target/linux/airoha/config-5.15 b/target/linux/airoha/config-5.15
> > new file mode 100644
> > index 0000000000..6717e8d19b
> > --- /dev/null
> > +++ b/target/linux/airoha/config-5.15
> > @@ -0,0 +1,278 @@
> .....
> > +CONFIG_CACHE_L2X0=y
> > +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
> > +CONFIG_CC_OPTIMIZE_FOR_SIZE=y
>
> Why do you select CONFIG_CC_OPTIMIZE_FOR_SIZE ? all other targets except
> the mediatek/mt7629 use CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE.
>
> > +CONFIG_CHR_DEV_SCH=y
> Why do you need CONFIG_CHR_DEV_SCH?
>
> > +CONFIG_CLONE_BACKWARDS=y
> > +CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
> > +CONFIG_CMDLINE_FROM_BOOTLOADER=y
> .....
> > +CONFIG_DCACHE_WORD_ACCESS=y
> > +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
> > +CONFIG_DEBUG_MISC=y
> > +CONFIG_DEFAULT_HOSTNAME="(airoha)"
>
> Setting CONFIG_DEFAULT_HOSTNAME looks wrong.
>
> > +CONFIG_DMA_OPS=y
> ....
> > +CONFIG_HANDLE_DOMAIN_IRQ=y
> > +# CONFIG_HARDENED_USERCOPY is not set
>
> Please activate CONFIG_HARDENED_USERCOPY.
>
> > +CONFIG_HARDEN_BRANCH_PREDICTOR=y
> > +CONFIG_HARDIRQS_SW_RESEND=y
> ....
> > +CONFIG_NEED_DMA_MAP_STATE=y
> > +CONFIG_NETFILTER=y
> > +CONFIG_NET_FLOW_LIMIT=y
> > +CONFIG_NET_SELFTESTS=y
>
> Please do not activate these CONFIG_NET options here.
>
> > +CONFIG_NLS=y
> ....
> > +CONFIG_OF_MDIO=y
> > +CONFIG_OLD_SIGACTION=y
> > +CONFIG_OLD_SIGSUSPEND3=y
>
> I think we do not need these CONFIG_OLT_* options.
>
> > +CONFIG_OUTER_CACHE=y
> .....
> > +CONFIG_SRCU=y
> > +CONFIG_STACKTRACE=y
>
> This should not be activated for only one target.
>
> > +# CONFIG_SWAP is not set
> > +CONFIG_SWCONFIG=y
>
> Do you really need CONFIG_SWCONFIG?
>
> > +CONFIG_SWPHY=y
> .....
> > diff --git a/target/linux/airoha/dts/en7523.dtsi b/target/linux/airoha/dts/en7523.dtsi
> > new file mode 100644
> > index 0000000000..72478b225c
> > --- /dev/null
> > +++ b/target/linux/airoha/dts/en7523.dtsi
> > @@ -0,0 +1,219 @@
> .....
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu-map {
> > + cluster0 {
> > + core0 {
> > + cpu = <&cpu0>;
> > + };
> > + core1 {
> > + cpu = <&cpu1>;
> > + };
> > + };
> > + };
> > +
> > + cpu0: cpu at 0 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + reg = <0x0>;
> > + enable-method = "psci";
> > + clock-frequency = <80000000>;
> > + next-level-cache = <&L2_0>;
> > + };
>
> Here it says cortex a53
>
> > +
> > + cpu1: cpu at 1 {
> > + device_type = "cpu";
> > + compatible = "arm,cortex-a53";
> > + reg = <0x1>;
> > + enable-method = "psci";
> > + clock-frequency = <80000000>;
> > + next-level-cache = <&L2_0>;
> > + };
> > +
> > + L2_0: l2-cache0 {
> > + compatible = "cache";
> > + };
> > + };
> > +
>
> .....
>
> > diff --git a/target/linux/airoha/patches-5.15/0005-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch b/target/linux/airoha/patches-5.15/0005-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch
> > new file mode 100644
> > index 0000000000..a48e02fc08
> > --- /dev/null
> > +++ b/target/linux/airoha/patches-5.15/0005-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch
> > @@ -0,0 +1,137 @@
> > +diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
> > +index 9c64d9fc..5f99ea72 100644
> > +--- a/drivers/mtd/nand/spi/Makefile
> > ++++ b/drivers/mtd/nand/spi/Makefile
>
> Please move this patch to generic in OpenWrt and try to get it upstream
> too. It is likely that we will see this choip on other boards soon too.
>
> > +@@ -1,3 +1,3 @@
> > + # SPDX-License-Identifier: GPL-2.0
> > +-spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
> > ++spinand-objs := core.o esmt.o etron.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
> > + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
> > +diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> > +index 9839ee44..9ab44217 100644
> > +--- a/drivers/mtd/nand/spi/core.c
> > ++++ b/drivers/mtd/nand/spi/core.c
> > +@@ -898,6 +898,7 @@ static const struct nand_ops spinand_ops = {
> > + static const struct spinand_manufacturer *spinand_manufacturers[] = {
> > + &esmt_c8_spinand_manufacturer,
> > + &gigadevice_spinand_manufacturer,
> > ++ &etron_spinand_manufacturer,
> > + ¯onix_spinand_manufacturer,
> > + µn_spinand_manufacturer,
> > + ¶gon_spinand_manufacturer,
> > +diff --git a/drivers/mtd/nand/spi/etron.c b/drivers/mtd/nand/spi/etron.c
> > +new file mode 100644
> > +index 00000000..653092be
> > +--- /dev/null
> > ++++ b/drivers/mtd/nand/spi/etron.c
> > +@@ -0,0 +1,98 @@
> > ++// SPDX-License-Identifier: GPL-2.0
> > ++
> > ++#include <linux/device.h>
> > ++#include <linux/kernel.h>
> > ++#include <linux/mtd/spinand.h>
> > ++
> > ++#define SPINAND_MFR_ETRON 0xd5
> > ++
> > ++
> > ++static SPINAND_OP_VARIANTS(read_cache_variants,
> > ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
> > ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> > ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
> > ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
> > ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
> > ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
> > ++
> > ++static SPINAND_OP_VARIANTS(write_cache_variants,
> > ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
> > ++ SPINAND_PROG_LOAD(true, 0, NULL, 0));
> > ++
> > ++static SPINAND_OP_VARIANTS(update_cache_variants,
> > ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
> > ++ SPINAND_PROG_LOAD(false, 0, NULL, 0));
> > ++
> > ++static int etron_ooblayout_ecc(struct mtd_info *mtd, int section,
> > ++ struct mtd_oob_region *oobregion)
> > ++{
> > ++ if (section)
> > ++ return -ERANGE;
> > ++
> > ++ oobregion->offset = 72;
> > ++ oobregion->length = 56;
> > ++
> > ++ return 0;
> > ++}
> > ++
> > ++static int etron_ooblayout_free(struct mtd_info *mtd, int section,
> > ++ struct mtd_oob_region *oobregion)
> > ++{
> > ++ if (section)
> > ++ return -ERANGE;
> > ++
> > ++ oobregion->offset = 1;
> > ++ oobregion->length = 71;
> > ++
> > ++ return 0;
> > ++}
> > ++
> > ++static int etron_ecc_get_status(struct spinand_device *spinand, u8 status)
> > ++{
> > ++ switch (status & STATUS_ECC_MASK) {
> > ++ case STATUS_ECC_NO_BITFLIPS:
> > ++ return 0;
> > ++
> > ++ case STATUS_ECC_HAS_BITFLIPS:
> > ++ /* Between 1-7 bitflips were corrected */
> > ++ return 7;
> > ++
> > ++ case STATUS_ECC_MASK:
> > ++ /* Maximum bitflips were corrected */
> > ++ return 8;
> > ++
> > ++ case STATUS_ECC_UNCOR_ERROR:
> > ++ return -EBADMSG;
> > ++ }
> > ++
> > ++ return -EINVAL;
> > ++}
> > ++
> > ++static const struct mtd_ooblayout_ops etron_ooblayout = {
> > ++ .ecc = etron_ooblayout_ecc,
> > ++ .free = etron_ooblayout_free,
> > ++};
> > ++
> > ++static const struct spinand_info etron_spinand_table[] = {
> > ++ SPINAND_INFO("EM73D044VCx",
> > ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x1f),
> > ++ // bpc, pagesize, oobsize, pagesperblock, bperlun, maxbadplun, ppl, lpt, #t
> > ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
> > ++ NAND_ECCREQ(8, 512),
> > ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > ++ &write_cache_variants,
> > ++ &update_cache_variants),
> > ++ SPINAND_HAS_QE_BIT,
> > ++ SPINAND_ECCINFO(&etron_ooblayout, etron_ecc_get_status)),
> > ++};
> > ++
> > ++static const struct spinand_manufacturer_ops etron_spinand_manuf_ops = {
> > ++};
> > ++
> > ++const struct spinand_manufacturer etron_spinand_manufacturer = {
> > ++ .id = SPINAND_MFR_ETRON,
> > ++ .name = "Etron",
> > ++ .chips = etron_spinand_table,
> > ++ .nchips = ARRAY_SIZE(etron_spinand_table),
> > ++ .ops = &etron_spinand_manuf_ops,
> > ++};
> > +diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> > +index 2066962d..11d38d2f 100644
> > +--- a/include/linux/mtd/spinand.h
> > ++++ b/include/linux/mtd/spinand.h
> > +@@ -261,6 +261,7 @@ struct spinand_manufacturer {
> > +
> > + /* SPI NAND manufacturers */
> > + extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
> > ++extern const struct spinand_manufacturer etron_spinand_manufacturer;
> > + extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
> > + extern const struct spinand_manufacturer macronix_spinand_manufacturer;
> > + extern const struct spinand_manufacturer micron_spinand_manufacturer;
> .....
>
>
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