[PATCH 00/13] Switch realtek target to upstream platform

[Sander Vanheule]

Hi Birger,

On Thu, 2021-12-09 at 08:19 +0100, Birger Koblitz wrote:
> Hi Sander and Hiroshi,
> 
> great work! A very big step to clean up this platform. Because this changes
> the fundamentals of the target I have some suggestions and questions.

Thanks! I was expecting some comments from you :-)

> 
> There are actually 4 RTL platforms which we now know how to support and you
> are taking care of the first 3 in your patch to make use of the generic MIPS
> platform:
>  - RTL8380: 4Kec, single core
>  - RTL8390: 34Kc, VSMP, MIPS timer works
>  - RTL9300: 34Kc, VSMP, MIPS timer broken, but RTL9300 timer with SMP support
>  - RTL9310: InterAptiv, SMP, GIC timer
> 
> I would suggest to use sub-targets for these platforms with optimized
> compiler settings and SMP/single processor selected correctly for each,
> see https://github.com/BrainSlayer/pie/commits/pie-5.10-rtl9313
> 
> You already set up SMP build support in the config, but don't activate it.

Currently there are no supported devices in OpenWrt that have one of the SMP-
capable SoCs, which is the main reason it is not yet included here. I've had a 
very quick look on enabling SMP for RTL839x with a mainline build, but haven't
gotten it to work yet.

Hiroshi and I are still learning as we go along here. I don't know if we can
reasonably expect to have one kernel that supports all SoCs, or if there are
really conflicting build requirements.


> However with 2 small patches to the IRQ controller
> https://github.com/BrainSlayer/pie/commit/61860e04b89fa4c76a0e41af3e5d3480dabdf63c#diff-8b9c10bdba2282c6926cb9f7207ac869b011e248a6171f8132e79e1807c9f12a
> 

The patch you link here doesn't seem to apply to the current IRQ controller, but
to an already modified version of it. It also appears to implement interrupt
balancing, but is that a hard requirement for SMP on RTL839x?


> and the Ethernet driver
> https://github.com/BrainSlayer/pie/commit/cdbc6598a1e69f74aa5fbaac9c896595a06d21f4#diff-2adae55db41693c452fcc10fb3925ff8c5a38760243f0b77bbd54acc75170d0a
> SMP can be enabled on the RTL8390 and the 9310 platform.
> 
> I am a bit worried of using the generic MIPS platform for the RTL9300.
> The SoC has a broken R4K Clock Event Interrupt and requires the RTL9300
> timer to work plus SMP support for the IRQ controller. There are only
> 2 examples in Linux which have such a combination of dedicated Timer
> for SMP support and IRQ controller, the Sibyte SB1250 and the BCM1480
> platforms.

A cursory search (and limited understanding of clocksources etc.) also turned up
the Ingenic SoCs for me. These appear to have custom timers too, but are still
based on MIPS_GENERIC.

Since this Realtek timer is also available on RTL838x/RTL839x, we could use
these platforms for testing as well. The kernel also supports the clocksource=
parameter, which appears to allow for alternative clock selection. So if a
(generic) kernel with R4K-CEVT support is running on RTL930x, shouldn't we be
able to convince it to really use the Realtek timer?

> Both do not use the generic MIPS platform since they require lots of
> specific SMP code. I would like to understand how this would be supported
> with the generic MIPS platform, because I don't want to go there and
> then back again.

I understand and agree with you, ping-ponging between custom/generic would be a
waste of time. By using the upstream platform we should be less limited by the
(human) resources available in OpenWrt alone. Bert got plenty of feedback when
he submitted this platform upstream, and was basically able to replace all the
custom code with the right selection of kernel config options.

If Realtek did really funny stuff that makes MIPS_GENERIC incompatible with some
of these SoCs, I still feel we should try going through upstream. But at least
then we would be quite sure new code is the only way to support these chips.

Best,
Sander