[PATCH v2 3/6] rtl838x: add support for D-Link DGS-1210-28

Petr Štetiar ynezz at true.cz
Wed Nov 4 11:47:22 EST 2020


 Hardware specification
 ----------------------

 * RTL8382M SoC, 1 MIPS 4KEc core @ 500MHz
 * 128MB DRAM
 * 32MB NOR Flash (MX25L25635E)
 * 24 x 10/100/1000BASE-T ports
    - Internal PHY with 8 ports (RTL8218B)
    - Two external PHYs with 8 ports each (RTL8218B)
 * 4 x Gigabit RJ45/SFP Combo ports
    - External PHY with 4 SFP ports (RTL8214FC)
 * Power LED
 * Reset button on front panel
 * UART (115200 8N1) via unpopulated standard 0.1" pin header marked J6

 UART pinout
 -----------

  [oooo]J3 [o]ooo|J6
    |       ^ ||`------ GND
    |       | |`------- RX
    |       | `-------- TX
    |       `---------- Vcc (3V3)
    |
    `------------------ J3 is power input connector nearby J6 UART

 Boot initramfs image from U-Boot
 --------------------------------

  1. Press Escape key during `Hit Esc key to stop autoboot` prompt
  2. Press CTRL+C keys to get into real U-Boot prompt
  3. Init network with `rtk network on` command
  4. Load image with `tftpboot 0x8f000000 openwrt-rtl838x-generic-d-link_dgs-1210-16-initramfs-kernel.bin` command
  5. Boot the image with `bootm` command

To install, upload the sysupgrade image to the OEM webpage or sysupgrade
from the system running from initramfs image.

It has been developed and tested on device with F1 revision.

Signed-off-by: Petr Štetiar <ynezz at true.cz>
---
 .../dts/rtl8382_d-link_dgs-1210-28.dts        | 339 ++++++++++++++++++
 target/linux/rtl838x/image/Makefile           |   5 +
 2 files changed, 344 insertions(+)
 create mode 100644 target/linux/rtl838x/dts/rtl8382_d-link_dgs-1210-28.dts

diff --git a/target/linux/rtl838x/dts/rtl8382_d-link_dgs-1210-28.dts b/target/linux/rtl838x/dts/rtl8382_d-link_dgs-1210-28.dts
new file mode 100644
index 000000000000..f154ca963d1c
--- /dev/null
+++ b/target/linux/rtl838x/dts/rtl8382_d-link_dgs-1210-28.dts
@@ -0,0 +1,339 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl8382_d-link_dgs-1210.dtsi"
+
+/ {
+	compatible = "d-link,dgs-1210-28", "realtek,rtl838x-soc";
+	model = "D-Link DGS-1210-28";
+};
+
+&ethernet0 {
+	mdio: mdio-bus {
+		compatible = "realtek,rtl838x-mdio";
+		regmap = <&ethernet0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		/* External phy RTL8218B */
+		phy0: ethernet-phy at 0 {
+			reg = <0>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy1: ethernet-phy at 1 {
+			reg = <1>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy2: ethernet-phy at 2 {
+			reg = <2>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy3: ethernet-phy at 3 {
+			reg = <3>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy4: ethernet-phy at 4 {
+			reg = <4>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy5: ethernet-phy at 5 {
+			reg = <5>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy6: ethernet-phy at 6 {
+			reg = <6>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy7: ethernet-phy at 7 {
+			reg = <7>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+
+		/* Internal phy RTL8218B */
+		phy8: ethernet-phy at 8 {
+			reg = <8>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+		};
+		phy9: ethernet-phy at 9 {
+			reg = <9>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+		};
+		phy10: ethernet-phy at 10 {
+			reg = <10>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+		};
+		phy11: ethernet-phy at 11 {
+			reg = <11>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+		};
+		phy12: ethernet-phy at 12 {
+			reg = <12>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+		};
+		phy13: ethernet-phy at 13 {
+			reg = <13>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+		};
+		phy14: ethernet-phy at 14 {
+			reg = <14>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+		};
+		phy15: ethernet-phy at 15 {
+			reg = <15>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+			phy-is-integrated;
+		};
+
+		/* External phy RTL8218B */
+		phy16: ethernet-phy at 16 {
+			reg = <16>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy17: ethernet-phy at 17 {
+			reg = <17>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy18: ethernet-phy at 18 {
+			reg = <18>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy19: ethernet-phy at 19 {
+			reg = <19>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy20: ethernet-phy at 20 {
+			reg = <20>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy21: ethernet-phy at 21 {
+			reg = <21>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy22: ethernet-phy at 22 {
+			reg = <22>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+		phy23: ethernet-phy at 23 {
+			reg = <23>;
+			compatible = "ethernet-phy-ieee802.3-c22";
+		};
+
+		/* External phy: RTL8214FC */
+		phy24: ethernet-phy at 24 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			sfp;
+			media = "fibre";
+			reg = <24>;
+		};
+		phy25: ethernet-phy at 25 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			sfp;
+			media = "fibre";
+			reg = <25>;
+		};
+		phy26: ethernet-phy at 26 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			sfp;
+			media = "fibre";
+			reg = <26>;
+		};
+		phy27: ethernet-phy at 27 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			sfp;
+			media = "fibre";
+			reg = <27>;
+		};
+	};
+};
+
+&switch0 {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port at 0 {
+			reg = <0>;
+			label = "lan1";
+			phy-handle = <&phy0>;
+			phy-mode = "qsgmii";
+		};
+		port at 1 {
+			reg = <1>;
+			label = "lan2";
+			phy-handle = <&phy1>;
+			phy-mode = "qsgmii";
+		};
+		port at 2 {
+			reg = <2>;
+			label = "lan3";
+			phy-handle = <&phy2>;
+			phy-mode = "qsgmii";
+		};
+		port at 3 {
+			reg = <3>;
+			label = "lan4";
+			phy-handle = <&phy3>;
+			phy-mode = "qsgmii";
+		};
+		port at 4 {
+			reg = <4>;
+			label = "lan5";
+			phy-handle = <&phy4>;
+			phy-mode = "qsgmii";
+		};
+		port at 5 {
+			reg = <5>;
+			label = "lan6";
+			phy-handle = <&phy5>;
+			phy-mode = "qsgmii";
+		};
+		port at 6 {
+			reg = <6>;
+			label = "lan7";
+			phy-handle = <&phy6>;
+			phy-mode = "qsgmii";
+		};
+		port at 7 {
+			reg = <7>;
+			label = "lan8";
+			phy-handle = <&phy7>;
+			phy-mode = "qsgmii";
+		};
+		port at 8 {
+			reg = <8>;
+			label = "lan9";
+			phy-handle = <&phy8>;
+			phy-mode = "internal";
+		};
+		port at 9 {
+			reg = <9>;
+			label = "lan10";
+			phy-handle = <&phy9>;
+			phy-mode = "internal";
+		};
+		port at 10 {
+			reg = <10>;
+			label = "lan11";
+			phy-handle = <&phy10>;
+			phy-mode = "internal";
+		};
+		port at 11 {
+			reg = <11>;
+			label = "lan12";
+			phy-handle = <&phy11>;
+			phy-mode = "internal";
+		};
+		port at 12 {
+			reg = <12>;
+			label = "lan13";
+			phy-handle = <&phy12>;
+			phy-mode = "internal";
+		};
+		port at 13 {
+			reg = <13>;
+			label = "lan14";
+			phy-handle = <&phy13>;
+			phy-mode = "internal";
+		};
+		port at 14 {
+			reg = <14>;
+			label = "lan15";
+			phy-handle = <&phy14>;
+			phy-mode = "internal";
+		};
+		port at 15 {
+			reg = <15>;
+			label = "lan16";
+			phy-handle = <&phy15>;
+			phy-mode = "internal";
+		};
+		port at 16 {
+			reg = <16>;
+			label = "lan17";
+			phy-handle = <&phy16>;
+			phy-mode = "qsgmii";
+		};
+		port at 17 {
+			reg = <17>;
+			label = "lan18";
+			phy-handle = <&phy17>;
+			phy-mode = "qsgmii";
+		};
+		port at 18 {
+			reg = <18>;
+			label = "lan19";
+			phy-handle = <&phy18>;
+			phy-mode = "qsgmii";
+		};
+		port at 19 {
+			reg = <19>;
+			label = "lan20";
+			phy-handle = <&phy19>;
+			phy-mode = "qsgmii";
+		};
+		port at 20 {
+			reg = <20>;
+			label = "lan21";
+			phy-handle = <&phy20>;
+			phy-mode = "qsgmii";
+		};
+		port at 21 {
+			reg = <21>;
+			label = "lan22";
+			phy-handle = <&phy21>;
+			phy-mode = "qsgmii";
+		};
+		port at 22 {
+			reg = <22>;
+			label = "lan23";
+			phy-handle = <&phy22>;
+			phy-mode = "qsgmii";
+		};
+		port at 23 {
+			reg = <23>;
+			label = "lan24";
+			phy-handle = <&phy23>;
+			phy-mode = "qsgmii";
+		};
+
+		port at 24 {
+			reg = <24>;
+			label = "lan25";
+			phy-handle = <&phy24>;
+			phy-mode = "qsgmii";
+		};
+		port at 25 {
+			reg = <25>;
+			label = "lan26";
+			phy-handle = <&phy25>;
+			phy-mode = "qsgmii";
+		};
+		port at 26 {
+			reg = <26>;
+			label = "lan27";
+			phy-handle = <&phy26>;
+			phy-mode = "qsgmii";
+		};
+		port at 27 {
+			reg = <27>;
+			label = "lan28";
+			phy-handle = <&phy27>;
+			phy-mode = "qsgmii";
+		};
+		port at 28 {
+			ethernet = <&ethernet0>;
+			reg = <28>;
+			phy-mode = "internal";
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+};
diff --git a/target/linux/rtl838x/image/Makefile b/target/linux/rtl838x/image/Makefile
index cd384c534522..51acd41c7621 100644
--- a/target/linux/rtl838x/image/Makefile
+++ b/target/linux/rtl838x/image/Makefile
@@ -61,4 +61,9 @@ define Device/d-link_dgs-1210-16
 endef
 TARGET_DEVICES += d-link_dgs-1210-16
 
+define Device/d-link_dgs-1210-28
+  $(Device/d-link_dgs-1210)
+  DEVICE_MODEL := DGS-1210-28
+endef
+TARGET_DEVICES += d-link_dgs-1210-28
 $(eval $(call BuildImage))



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