[RFC PATCH 4/7] ath79: prepare for 1-port TP-Link EAP2x5 devices

[David Bauer]

Hi Sander,

On 7/17/20 1:37 PM, Sander Vanheule wrote:
> TP-Link has developed a number of access points based on the AP152
> reference board. In the EAP-series of 802.11ac access points, this
> includes the following devices with one ethernet port:
> * EAP225 v1/v2
> * EAP225 v3
> * EAP225-Outdoor v1
> * EAP245 v1
> 
> Since the only differences between these devices are the ath10k wireless
> radios and LEDs, a common base is provided for the overlapping support
> requirements.
> 
> Hardware commonalities:
> * SoC: QCA9563-AL3A MIPS 74kc v5.0 @ 775MHz
> * RAM: 128MiB DDR2 @ 650MHz
> * Flash: 16MiB SPI NOR
> * Wi-Fi 2.4GHz: provided by SoC
> * Wi-Fi 5Ghz: ath10k chip on PCIe
> * Ethernet: AR8033-AL1A, one 1GbE port (802.3at PoE)
> 
> This patch was originally developed by Julien Dusser for the EAP245 v1,
> and was adapted by Sander Vanheule to support more devices.
> 
> Signed-off-by: Julien Dusser <julien.dusser at free.fr>
> Signed-off-by: Sander Vanheule <sander at svanheule.net>
> ---
>  .../dts/qca9563_tplink_eap2x5_1port.dtsi      | 174 ++++++++++++++++++
>  target/linux/ath79/image/generic-tp-link.mk   |  10 +
>  2 files changed, 184 insertions(+)
>  create mode 100644 target/linux/ath79/dts/qca9563_tplink_eap2x5_1port.dtsi
> 
> diff --git a/target/linux/ath79/dts/qca9563_tplink_eap2x5_1port.dtsi b/target/linux/ath79/dts/qca9563_tplink_eap2x5_1port.dtsi
> new file mode 100644
> index 0000000000..1b55bb855c
> --- /dev/null
> +++ b/target/linux/ath79/dts/qca9563_tplink_eap2x5_1port.dtsi
> @@ -0,0 +1,174 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +#include "qca956x.dtsi"
> +
> +/ {
> +	aliases {
> +		label-device-mac = &eth0;
> +		led-boot = &led_status_green;
> +		led-failsafe = &led_status_amber;
> +		led-running = &led_status_green;
> +		led-upgrade = &led_status_amber;
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +
> +		led_status_green: status_green {
> +			status = "disabled";
> +			label = "tp-link:green:status";
> +			default-state = "on";
> +		};
> +
> +		led_status_amber: status_amber {
> +			status = "disabled";
> +			label = "tp-link:amber:status";
> +		};
> +
> +		led_status_red: status_red {
> +			status = "disabled";
> +			label = "tp-link:red:status";
> +		};
> +	};
> +
> +	keys {
> +		compatible = "gpio-keys";
> +
> +		reset {
> +			label = "Reset button";
> +			linux,code = <KEY_RESTART>;
> +			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
> +			debounce-interval = <60>;
> +		};
> +	};
> +};
> +
> +&pcie {
> +	status = "okay";
> +};
> +
> +&uart {
> +	status = "okay";
> +};
> +
> +&gpio {
> +	status = "okay";
> +};
> +
> +&spi {
> +	status = "okay";
> +	num-cs = <1>;
> +
> +	flash at 0 {
> +		compatible = "jedec,spi-nor";
> +		reg = <0>;
> +		spi-max-frequency = <25000000>;
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			partition at 0 {
> +				label = "u-boot";
> +				reg = <0x000000 0x020000>;
> +				read-only;
> +			};
> +
> +			partition at 20000 {
> +				label = "partition-table";
> +				reg = <0x020000 0x010000>;
> +				read-only;
> +			};
> +
> +			info: partition at 30000 {
> +				label = "info";
> +				reg = <0x030000 0x010000>;
> +				read-only;
> +			};
> +
> +			partition at 40000 {
> +				compatible = "openwrt,elf";
> +				label = "firmware";
> +				reg = <0x040000 0xec0000>;
> +			};
> +
> +			partition at f00000 {
> +				label = "config";
> +				reg = <0xf00000 0x030000>;
> +				read-only;
> +			};
> +
> +			partition at f30000 {
> +				label = "mutil-log";
> +				reg = <0xf30000 0x080000>;
> +				read-only;
> +			};
> +
> +			partition at fb0000 {
> +				label = "oops";
> +				reg = <0xfb0000 0x040000>;
> +				read-only;
> +			};
> +
> +			art: partition at ff0000 {
> +				label = "art";
> +				reg = <0xff0000 0x010000>;
> +				read-only;
> +			};
> +		};
> +	};
> +};
> +
> +&pinmux {
> +	mdio_pins: pinux_mdio_pins {
> +		/* GPIO 8 as MDC(0x21), GPIO 10 as MDIO(0x20) */
> +		pinctrl-single,bits = <0x8 0x00000021 0x000000ff>,
> +				      <0x8 0x00200000 0x00ff0000>;
> +	};
> +};
> +
> +&mdio0 {
> +	status = "okay";
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mdio_pins>;
> +
> +	phy-mask = <0x10>;
> +
> +	phy4: ethernet-phy at 4 {
> +		reg = <4>;
> +		phy-mode = "sgmii";
> +		reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
> +	};
> +};
> +
> +&eth0 {
> +	status = "okay";
> +
> +	phy-handle = <&phy4>;
> +
> +	mtd-mac-address = <&info 0x8>;
> +
> +	qca956x-serdes-fixup;
> +
> +	gmac-config {
> +		device = <&gmac>;
> +
> +		rgmii-ge0 = <1>;
> +		ge0-sgmii = <1>;
> +		rxdv-delay = <3>;
> +		rxd-delay = <3>;

This does not make a lot of sense to me. Enabling both RGMII
as well as SGMII for GE0 might work but it is most likely an undefined state.

Also the QCA956x does not offer RGMII for the MAC at all. Therefore, setting RGMII
delays dhouldn't be necessary.

This applies to your GMAC settings  export in general. From my perspective, only the
ge0-sgmii should matter at all?

Best wishes
David

> +	};
> +};
> +
> +&wmac {
> +	status = "okay";
> +
> +	mtd-cal-data = <&art 0x1000>;
> +	mtd-mac-address = <&info 0x8>;
> +};
> diff --git a/target/linux/ath79/image/generic-tp-link.mk b/target/linux/ath79/image/generic-tp-link.mk
> index 8a26e4bebe..d2cc8d09bd 100644
> --- a/target/linux/ath79/image/generic-tp-link.mk
> +++ b/target/linux/ath79/image/generic-tp-link.mk
> @@ -362,6 +362,16 @@ define Device/tplink_cpe610-v2
>  endef
>  TARGET_DEVICES += tplink_cpe610-v2
>  
> +define Device/tplink_eap2x5_1port
> +  $(Device/tplink-safeloader)
> +  SOC := qca9563
> +  IMAGE_SIZE := 15104k
> +  LOADER_TYPE := elf
> +  KERNEL := kernel-bin | append-dtb | lzma | loader-kernel
> +  KERNEL_INITRAMFS := $$(KERNEL)
> +  IMAGE/factory.bin := append-rootfs | tplink-safeloader factory | pad-extra 128
> +endef
> +
>  define Device/tplink_eap245-v3
>    $(Device/tplink-safeloader)
>    SOC := qca9563
>