[OpenWrt-Devel] SPI 104 MHz on ar7240/Spansion S25FL032P

Chuanhong Guo gch981213 at gmail.com
Tue Feb 11 02:25:35 EST 2020


On Mon, Feb 10, 2020 at 7:25 PM Adrian Schmutzler
<mail at adrianschmutzler.de> wrote:
> Hi,
> while reviewing the PR for the TL-WA830REv1 [1], I was wondered about the
> unusually high
> spi-max-frequency = <104000000>;
> The author states it's running stable, the datasheet tells
> Normal READ (Serial): 40-MHz clock rate
> FAST_READ (Serial): 104-MHz clock rate (maximum)
> DUAL I/O FAST_READ: 80-MHz clock rate or 20 MB/s effective data rate
> QUAD I/O FAST_READ: 80 MHz clock rate or 40 MB/s effective data rate
> and according to the author, there are other boards with the same chip and this
> frequency, e.g.
> https://github.com/openwrt/openwrt/blob/master/target/linux/ath79/dts/ar9331_tpl
> ink_tl-mr3020-v1.dts#L123
> So, can somebody lend me some expertise whether the value is okay?

In addition to the info provided by pepe2k, here's more story on driver side:

ath79-spi doesn't set spi clock divider properly and all spi operations are
performed using bit-bang mode. So the 104MHz SPI clock isn't actually
achievable. (My 24MHz logic analyzer is able to properly capture this
bit-bang spi signal.)

This high spi clock needs to be tested with my commit:
ebf0d8dade ("ath79: add new ar934x spi driver")
and I think all existing ar93xx/qca95xx devices with spi-max-frequency
higher than 50MHz needs to be reduced below 50MHz or it needs to add
m25p,fast-read option.

I'll prepare a commit to reduce spi clock later.

Chuanhong Guo

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