[OpenWrt-Devel] FRITZ!BOX 3272 (HW198 / Italo R) porting effort: help needed
Enrico Mioso
mrkiko.rs at gmail.com
Mon Apr 6 11:05:19 EDT 2020
Hello all!!
So in the end I continued with my effort to port the FRITZ!BOX 3272 to OpenWRt.
This is an AR10 based chip. i continued from where I left off - the system boots, nothing else works.
So far, thanks to the help of Andreas, I was able to determine the fact ethernet is probably connected to external GPHys.
I wasn't able to find out the firmware required for the 100megabit switch, so I tried generating it from vendor firmware .h file.
I attachd the result.
I built a device family DTS file, as follows:
#include <dt-bindings/gpio/gpio.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,xway", "lantiq,ar10";
aliases {
serial0 = &asc1;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
cpu at 0 {
compatible = "mips,mips34Kc";
};
cpu at 1 {
compatible = "mips,mips34Kc";
};
};
memory at 0 {
device_type = "memory";
};
cputemp at 0 {
compatible = "lantiq,cputemp";
};
biu at 1f800000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,biu", "simple-bus";
reg = <0x1f800000 0x800000>;
ranges = <0x0 0x1f800000 0x7fffff>;
icu0: icu0 at 80200 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
reg = <0x80200 0x28
0x80228 0x28
0x80250 0x28
0x80278 0x28
0x802a0 0x28>;
};
icu1: icu1 at 80300 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu1";
reg = <0x80300 0x28
0x80328 0x28
0x80350 0x28
0x80378 0x28
0x803a0 0x28>;
};
watchdog at 803f0 {
compatible = "lantiq,xrx100-wdt";
reg = <0x803f0 0x10>;
regmap = <&rcu0>;
};
};
sram at 1f000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lantiq,sram", "simple-bus";
reg = <0x1f000000 0x800000>;
ranges = <0x0 0x1f000000 0x7fffff>;
eiu0: eiu at 101000 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,eiu-xway";
reg = <0x101000 0x1000>;
interrupt-parent = <&icu0>;
lantiq,eiu-irqs = <166 135 66 40 41 42>;
};
pmu0: pmu at 102000 {
compatible = "lantiq,pmu-xway";
reg = <0x102000 0x1000>;
};
cgu0: cgu at 103000 {
compatible = "lantiq,cgu-xway";
reg = <0x103000 0x1000>;
};
ts: ts at 106f00 {
compatible = "lantiq,ts-grx390"; /* to revisit */
reg = <0x106f00 0x10>;
interrupt-parent = <&icu0>;
interrupts = <143>;
lantiq,numofsensors = <0x1>;
};
dcdc at 106a00 {
compatible = "lantiq,dcdc-xrx200";
reg = <0x106a00 0x200>;
};
vmmc: vmmc at 103000 {
status = "disabled";
compatible = "lantiq,vmmc-xway";
reg = <0x103000 0x400>;
interrupt-parent = <&icu0>;
interrupts = <150 151 152 153 154 155>;
};
rcu0: rcu at 203000 {
compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
reg = <0x203000 0x1000>;
// interrupt-parent = <&icu0>;
// interrupts = <115>;
ranges = <0x0 0x203000 0x100>;
big-endian;
gphy0: gphy at 20 {
compatible = "lantiq,xrx300-gphy";
reg = <0x20 0x4>;
resets = <&reset0 31 30>, <&reset1 6 6>;
reset-names = "gphy", "gphy2";
};
/* gphy1: gphy at 58 {
compatible = "lantiq,xrx300-gphy";
reg = <0x58 0x4>;
resets = <&reset0 29 28>, <&reset1 7 7>;
reset-names = "gphy", "gphy2";
};
gphy2: gphy at ac {
compatible = "lantiq,xrx300-gphy";
reg = <0xac 0x4>;
resets = <&reset0 28 13>, <&reset1 8 8>;
reset-names = "gphy", "gphy2";
}; */
gphy3: gphy at 264 {
compatible = "lantiq,xrx300-gphy";
reg = <0x264 0x4>;
resets = <&reset0 10 10>, <&reset1 9 9>;
reset-names = "gphy", "gphy2";
};
reset0: reset-controller at 10 {
compatible = "lantiq,xrx200-reset";
reg = <0x10 4>, <0x14 4>;
#reset-cells = <2>;
};
reset1: reset-controller at 48 {
compatible = "lantiq,xrx200-reset";
reg = <0x48 4>, <0x24 4>;
#reset-cells = <2>;
};
usb_phy0: usb2-phy at 18 {
compatible = "lantiq,xrx300-usb2-phy";
reg = <0x18 4>, <0x38 4>;
status = "disabled";
resets = <&reset1 4 4>, <&reset0 4 4>;
reset-names = "phy", "ctrl";
#phy-cells = <0>;
};
usb_phy1: usb2-phy at 34 {
compatible = "lantiq,xrx300-usb2-phy";
reg = <0x34 4>, <0x3c 4>;
status = "disabled";
resets = <&reset1 5 4>, <&reset0 4 4>;
reset-names = "phy", "ctrl";
#phy-cells = <0>;
};
reboot at 10 {
compatible = "syscon-reboot";
reg = <0x10 4>;
regmap = <&rcu0>;
offset = <0x10>;
mask = <0xe0000000>;
};
};
};
fpi at 10000000 {
compatible = "lantiq,xrx200-fpi", "simple-bus";
ranges = <0x0 0x10000000 0xff00000>;
reg = <0x1f400000 0x1000>,
<0x10000000 0xf000000>;
regmap = <&rcu0>;
offset-endianness = <0x4c>; /* ?????????? */
#address-cells = <1>;
#size-cells = <1>;
localbus: localbus at 0 {
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
1 0 0x4000000 0x4000010>; /* addsel1 */
compatible = "lantiq,localbus", "simple-bus";
};
gptu at e100a00 {
compatible = "lantiq,gptu-xway";
reg = <0xe100a00 0x100>;
interrupt-parent = <&icu0>;
interrupts = <126 127 128 129 130 131>;
};
usif: usif at da00000 {
compatible = "lantiq,usif";
reg = <0xda00000 0x1000000>;
interrupt-parent = <&icu0>;
interrupts = <29 125 107 108 109 110>;
status = "disabled";
};
spi: spi at e100800 {
compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi";
reg = <0xe100800 0x100>;
interrupt-parent = <&icu0>;
interrupts = <22 23 24>;
interrupt-names = "spi_rx", "spi_tx", "spi_err",
"spi_frm";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
};
asc1: serial at e100c00 {
compatible = "lantiq,asc";
reg = <0xe100c00 0x400>;
interrupt-parent = <&icu0>;
interrupts = <112 113 114>;
};
gpio: pinmux at e100b10 {
compatible = "lantiq,xrx300-pinctrl";
#gpio-cells = <2>;
gpio-controller;
reg = <0xe100b10 0xa0>;
};
stp: stp at e100bb0 {
status = "disabled";
compatible = "lantiq,gpio-stp-xway";
reg = <0xe100bb0 0x40>;
#gpio-cells = <2>;
gpio-controller;
lantiq,shadow = <0xffffff>;
lantiq,groups = <0x7>;
lantiq,dsl = <0x0>;
lantiq,phy1 = <0x0>;
lantiq,phy2 = <0x0>;
};
deu at e103100 {
status = "disabled";
compatible = "lantiq,deu-xrx200";
reg = <0xe103100 0xf00>;
/* supported by upstream? */
lantiq,algo = "aes", "des", "arc4", "sha1", "md5", "sha1-hmac", "md5-hmac";
lantiq,dma-mode = <0>;
lantiq,sync-mode = <1>;
};
dma0: dma at e104100 {
compatible = "lantiq,dma-xway";
reg = <0xe104100 0x800>;
interrupt-parent = <&icu0>;
interrupts = <72 73 74 75 76 77 78 79 80 81 82 83 97 98 99 100 101 70 88 93 136 137 138 139>;
lantiq,desc-num = <256>;
lantiq,dma-hw-poll = <1>;
lantiq,dma-pkt-arb = <0>;
};
ebu0: ebu at 6000000 {
compatible = "lantiq,ebu-xway";
reg = <0x6000000 0x100>,
<0x6000100 0x100>;
};
usb at e101000 {
status = "disabled";
compatible = "lantiq,xrx200-usb";
reg = <0xe101000 0x1000
0xe120000 0x3f000>;
interrupt-parent = <&icu0>;
interrupts = <62 91>;
dr_mode = "host";
phys = <&usb_phy0>;
phy-names = "usb2-phy";
};
usb1: usb at e106000 {
status = "disabled";
compatible = "lantiq,xrx200-usb";
reg = <0xe106000 0x1000>;
interrupt-parent = <&icu0>;
interrupts = <91>;
dr_mode = "host";
phys = <&usb_phy1>;
phy-names = "usb2-phy";
};
eth0: eth at e108000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-net";
reg = < 0xe108000 0x3000 /* switch */
0xe10b100 0x70 /* mdio */
0xe10b1d8 0x30 /* mii */
0xe10b308 0x30 /* pmac */
>;
interrupt-parent = <&icu0>;
interrupts = <75 73 72>;
resets = <&reset0 21 16>, <&reset0 8 8>;
reset-names = "switch", "ppe";
//lantiq,phys = <&gphy0>, <&gphy1>, <&gphy2>;
lantiq,phys = <&gphy0>;
};
mei at e116000 {
compatible = "lantiq,mei-xrx300";
reg = <0xe116000 0x100>;
interrupt-parent = <&icu0>;
interrupts = <63 61>;
};
ppe at e234000 {
compatible = "lantiq,ppe-xrx200";
interrupt-parent = <&icu0>;
interrupts = <32 95 69>;
};
wlan at a000000 {
compatible ="lantiq,wlan-xrx330";
status = "okay";
interrupt-parent = <&icu0>;
interrupts = <26>;
};
pcie0: pcie at d900000 {
status = "disabled";
compatible = "lantiq,pcie-xrx330";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
reg = < 0xD900000 0x1000 /* RC controller */
0xD000000 0x800000 /* Cfg Space */
0xE100900 0x100 /* App logic */
0xF106800 0x200 /* PCIe PHY Reg */
0xF600000 0x100000 /* MSI addr space */
0xF700000 0x400 /* MSI PIC */
>;
reg-names = "csr", "cfg", "app", "phy", "msi", "pic";
interrupt-parent = <&icu0>;
interrupts = <163 164 165 38 161>;
interrupt-names = "msi0", "msi1", "msi2", "msi3", "ir";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &icu0 144>,
<0 0 0 2 &icu0 145>,
<0 0 0 3 &icu0 146>,
<0 0 0 4 &icu0 147>;
ranges = <0x02000000 0 0x0C000000 0x0C000000 0 0x01000000 /* Non-pretechable memory 32bit */
0x01000000 0 0x0D800000 0x0D800000 0 0x00100000 /* Downsream I/O */
>;
resets = <&rcu0 12>,
<&rcu0 22>;
reset-names = "phy", "core";
lantiq,inbound-shift = <12>;
lantiq,outbound-shift = <4>;
};
pcie1: pcie at 9900000 {
status = "disabled";
compatible = "lantiq,pcie-xrx330";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
reg = < 0x9900000 0x1000 /* RC controller */
0x9000000 0x800000 /* Cfg Space */
0xE100700 0x100 /* App logic */
0xF700400 0x200 /* PCIe PHY Reg */
0xF400000 0x100000 /* MSI addr space */
0xF500000 0x400 /* MSI PIC */
>;
reg-names = "csr", "cfg", "app", "phy", "msi", "pic";
interrupt-parent = <&icu0>;
interrupts = <49 50 51 52 57>;
interrupt-names = "msi0", "msi1", "msi2", "msi3", "ir";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &icu0 17>,
<0 0 0 2 &icu0 18>,
<0 0 0 3 &icu0 19>,
<0 0 0 4 &icu0 20>;
bus-range = <0x00 0xff>;
ranges = < 0x02000000 0 0x08000000 0x08000000 0 0x01000000 /* Non-pretechable memory 32bit */
0x01000000 0 0x09800000 0x09800000 0 0x00100000 /* Downsream I/O */
>;
resets = <&rcu0 13>,
<&rcu0 27>;
reset-names = "phy", "core";
lantiq,inbound-shift = <13>;
lantiq,outbound-shift = <8>;
};
pcie2: pcie at 9B00000 {
status = "disabled";
compatible = "lantiq,pcie-xrx330";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
reg = < 0x9B00000 0x1000 /* RC controller */
0xA800000 0x800000 /* Cfg Space */
0xE100400 0x100 /* App logic */
0xF106A00 0x200 /* PCIe PHY Reg */
0xF700A00 0x100000 /* MSI addr space */
0xF700600 0x400 /* MSI PIC */
>;
reg-names = "csr", "cfg", "app", "phy", "msi", "pic";
interrupt-parent = <&icu0>;
interrupts = <84 85 86 87 61>;
interrupt-names = "msi0", "msi1", "msi2", "msi3", "ir";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &icu0 27>,
<0 0 0 2 &icu0 71>,
<0 0 0 3 &icu0 89>,
<0 0 0 4 &icu0 90>;
bus-range = <0x00 0xff>;
ranges = < 0x02000000 0 0x0B000000 0x0B000000 0 0x01000000 /* Non-pretechable memory 32bit */
0x01000000 0 0x09A00000 0x09A00000 0 0x00100000 /* Downsream I/O */
>;
resets = <&rcu0 60>,
<&rcu0 61>;
reset-names = "phy", "core";
lantiq,inbound-shift = <14>;
lantiq,outbound-shift = <17>;
};
};
};
My device specific file is as follows:
// SPDX-License-Identifier: GPL-2.0-or-later
/dts-v1/;
#include "arx300.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/mips/lantiq_rcu_gphy.h>
/ {
compatible = "avm,fritz3272", "lantiq,xway", "lantiq,ar10";
model = "AVM FRITZ!Box 3272";
memory at 0 {
device_type = "memory";
reg = <0x0 0x8000000>;
};
};
ð0 {
lan: interface at 0 {
compatible = "lantiq,xrx200-pdi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mac-address = [ 00 11 22 33 44 55 ];
lantiq,switch;
ethernet at 0 {
compatible = "lantiq,xrx200-pdi-port";
reg = <0>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
};
};
mdio at 0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "lantiq,xrx200-mdio";
reg = <0>;
phy0: ethernet-phy at 0 {
reg = <0x0>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
};
};
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_FE>;
};
/*&gphy1 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
&gphy2 {
lantiq,gphy-mode = <GPHY_MODE_FE>;
};*/
&gphy3 {
lantiq,gphy-mode = <GPHY_MODE_FE>;
};
&gpio {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
stp {
lantiq,groups = "stp";
lantiq,function = "stp";
lantiq,open-drain = <0>;
lantiq,output = <1>;
lantiq,pull = <0>;
};
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
};
};
&stp {
status = "ok";
lantiq,phy1 = <0x7>;
lantiq,phy2 = <0x7>;
};
Surely there are some problems with the GPHYs definitions, my dmesg looks as follows:
root at OpenWrt:/# dmesg
[ 0.000000] Linux version 4.19.108 (mrkiko at mStation) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r12839-95bd6a04b5)) #0 SMP Mon Apr 6 09:55:24 2020
[ 0.000000] SoC: xRX300 rev 1.2
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 00019556 (MIPS 34Kc)
[ 0.000000] MIPS: machine is AVM FRITZ!Box 3272
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 08000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Detected 1 available secondary CPU(s)
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] On node 0 totalpages: 32768
[ 0.000000] Normal zone: 288 pages used for memmap
[ 0.000000] Normal zone: 0 pages reserved
[ 0.000000] Normal zone: 32768 pages, LIFO batch:7
[ 0.000000] random: get_random_bytes called from start_kernel+0x98/0x4dc with crng_init=0
[ 0.000000] percpu: Embedded 14 pages/cpu s26256 r8192 d22896 u57344
[ 0.000000] pcpu-alloc: s26256 r8192 d22896 u57344 alloc=14*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480
[ 0.000000] Kernel command line:
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Writing ErrCtl register=0005e001
[ 0.000000] Readback ErrCtl register=0005e001
[ 0.000000] Memory: 118332K/131072K available (5152K kernel code, 208K rwdata, 1456K rodata, 4240K init, 231K bss, 12740K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] NR_IRQS: 256
[ 0.000000] CPU Clock: 500MHz
[ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041786 ns
[ 0.000012] sched_clock: 32 bits at 250MHz, resolution 4ns, wraps every 8589934590ns
[ 0.007929] Calibrating delay loop... 332.54 BogoMIPS (lpj=665088)
[ 0.046042] pid_max: default: 32768 minimum: 301
[ 0.051010] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.057526] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.068305] rcu: Hierarchical SRCU implementation.
[ 0.074473] smp: Bringing up secondary CPUs ...
[ 0.080226] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.080241] Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
[ 0.080381] CPU1 revision is: 00019556 (MIPS 34Kc)
[ 0.111172] Synchronize counters for CPU 1: done.
[ 0.135599] smp: Brought up 1 node, 2 CPUs
[ 0.144514] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.154182] futex hash table entries: 512 (order: 2, 16384 bytes)
[ 0.160605] pinctrl core: initialized pinctrl subsystem
[ 0.168178] NET: Registered protocol family 16
[ 0.187511] dcdc-xrx200 1f106a00.dcdc: Core Voltage : 2040 mV
[ 0.200388] pinctrl-xway 1e100b10.pinmux: Init done
[ 0.207027] dma-xway 1e104100.dma: Init done - hw rev: 8, ports: 5, channels: 24
[ 0.249973] gpio-stp-xway 1e100bb0.stp: Init done
[ 0.256590] usbcore: registered new interface driver usbfs
[ 0.262303] usbcore: registered new interface driver hub
[ 0.267765] usbcore: registered new device driver usb
[ 0.276557] clocksource: Switched to clocksource MIPS
[ 0.283695] NET: Registered protocol family 2
[ 0.289831] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
[ 0.297464] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.304481] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
[ 0.310868] TCP: Hash tables configured (established 1024 bind 1024)
[ 0.317514] UDP hash table entries: 256 (order: 1, 8192 bytes)
[ 0.323336] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[ 0.329998] NET: Registered protocol family 1
[ 0.334313] PCI: CLS 0 bytes, default 32
[ 0.491306] random: fast init done
[ 7.049529] gptu: totally 6 16-bit timers/counters
[ 7.054444] gptu: misc_register on minor 63
[ 7.058631] gptu: succeeded to request irq 126
[ 7.063124] gptu: succeeded to request irq 127
[ 7.067634] gptu: succeeded to request irq 128
[ 7.072126] gptu: succeeded to request irq 129
[ 7.076674] gptu: succeeded to request irq 130
[ 7.081155] gptu: succeeded to request irq 131
[ 7.085845] No VPEs reserved for AP/SP, not initialize VPE loader
[ 7.085845] Pass maxvpes=<n> argument as kernel argument
[ 7.097221] No TCs reserved for AP/SP, not initializing RTLX.
[ 7.097221] Pass maxtcs=<n> argument as kernel argument
[ 7.110389] Crashlog allocated RAM at address 0x3f00000
[ 7.116020] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[ 7.141711] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 7.147466] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[ 7.170076] io scheduler noop registered
[ 7.174140] io scheduler deadline registered (default)
[ 7.180774] xway-rcu-gphy 1f203000.rcu:gphy at 264: Failed to lookup gate clock
[ 7.187857] xway-rcu-gphy: probe of 1f203000.rcu:gphy at 264 failed with error -2
[ 7.197336] 1e100c00.serial: ttyLTQ0 at MMIO 0x1e100c00 (irq = 112, base_baud = 0) is a lantiq,asc
[ 7.206275] console [ttyLTQ0] enabled
[ 7.213605] bootconsole [early0] disabled
[ 7.226668] libphy: Fixed MDIO Bus: probed
[ 7.234180] wdt 1f8803f0.watchdog: Init done
[ 7.241061] NET: Registered protocol family 10
[ 7.251101] Segment Routing with IPv6
[ 7.253556] NET: Registered protocol family 17
[ 7.257929] 8021q: 802.1Q VLAN Support v1.8
[ 7.372678] libphy: lantiq,xrx200-mdio: probed
[ 7.407969] Generic PHY 0:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=0:00, irq=POLL)
[ 7.415586] Generic PHY 0:00: Master/Slave resolution failed, maybe conflicting manual settings?
[ 7.439394] Freeing unused kernel memory: 4240K
[ 7.442462] This architecture does not have kernel memory protection.
[ 7.448968] Run /init as init process
[ 7.473808] init: Console is alive
[ 7.476212] init: - watchdog -
[ 7.508352] kmodloader: loading kernel modules from /etc/modules-boot.d/*
[ 7.525662] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
[ 7.534799] init: - preinit -
[ 7.715803] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[ 7.720390] Generic PHY 0:00: Master/Slave resolution failed, maybe conflicting manual settings?
[ 11.937194] procd: - early -
[ 11.938850] procd: - watchdog -
[ 12.527518] procd: - watchdog -
[ 12.529897] procd: - ubus -
[ 12.542099] random: ubusd: uninitialized urandom read (4 bytes read)
[ 12.582815] random: ubusd: uninitialized urandom read (4 bytes read)
[ 12.588540] random: ubusd: uninitialized urandom read (4 bytes read)
[ 12.596508] procd: - init -
[ 13.242529] kmodloader: loading kernel modules from /etc/modules.d/*
[ 13.266719] IFXOS, Version 1.5.19 (c) Copyright 2009, Lantiq Deutschland GmbH
[ 13.288289] NET: Registered protocol family 8
[ 13.291205] NET: Registered protocol family 20
[ 13.310345] PPP generic driver version 2.4.2
[ 13.369709] Lantiq (VRX) DSL CPE MEI driver, version 1.5.17.6, (c) 2007-2015 Lantiq Beteiligungs-GmbH & Co. KG
[ 13.390649]
[ 13.390649]
[ 13.390649] Lantiq CPE API Driver version: DSL CPE API V4.17.18.6
[ 13.408410]
[ 13.408410] Predefined debug level: 3
[ 13.413478] Get BSP Driver Handle Fail!
[ 13.417339] Get BSP Driver NFC Handle Fail!
[ 13.432997] Loading modules backported from Linux version v5.4.27-0-g585e0cc08069
[ 13.439137] Backport generated by backports.git v5.4.27-1-0-gf6e8852f
[ 13.479228] NET: Registered protocol family 24
[ 13.502126] xt_time: kernel timezone is -0000
[ 13.810287] kmodloader: done loading kernel modules from /etc/modules.d/*
[ 13.901209] urngd: v1.0.2 started.
[ 14.138937] random: crng init done
[ 14.140965] random: 7 urandom warning(s) missed due to ratelimiting
[ 47.145704] Generic PHY 0:00: Master/Slave resolution failed, maybe conflicting manual settings?
[ 47.154453] br-lan: port 1(eth0) entered blocking state
[ 47.158622] br-lan: port 1(eth0) entered disabled state
[ 47.164475] device eth0 entered promiscuous mode
[ 47.175230] IPv6: ADDRCONF(NETDEV_UP): br-lan: link is not ready
root at OpenWrt:/#
Any suggestions would be wlecome, my next step is to take a look at GPHY sources.
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