[OpenWrt-Devel] [PATCH] mvebu, tegra: make CPU subtype default to vfp3-d16

Tomasz Maciej Nowak tomek_n at o2.pl
Wed Apr 1 09:17:31 EDT 2020


W dniu 31.03.2020 o 11:21, Petr Štetiar pisze:
> Armada 370 and Tegra2 processors have only 16 double-precision
> registers. The change introduced by commit 8dcc1087602e ("toolchain:
> ARM: Fix toolchain compilation for gcc 8.x") switched accidentally the
> toolchain for mvebu cortexa9 subtarget to cpu type with 32
> double-precision registers.
> 
> This stems from gcc defaults which assume "vfpv3-d32" if only "vfpv3" as
> mfpu is specified. That change resulted in unusable image, in which
> kernel will kill userspace as soon as it causing "Illegal instruction".
> 
> In order to fix those issues Tomas in commit 2d61f8821c7c ("mvebu:
> cortexa9: correct cpu subtype") and commit 43d1d8851062 ("tegra: correct
> cpu subtype") changed the CPU subtype to explicit vfpv3-d16 which fixed
> the above mentioned issue, but on the other end it has resulted in the
> need of building packages for this new CPU subtype which is not wanted
> due to the increased infrastructure costs, like disk space and
> additional build time which is huge for packages feed.
> 
> So lets just take a step back and make the vfp3-d16 explicit again.
> 
> Cc: Tomasz Maciej Nowak <tomek_n at o2.pl>
> Cc: Christian Lamparter <chunkeey at gmail.com>
> Reported-by: Paul Spooren <mail at aparcar.org>
> Fixes: 43d1d8851062 ("tegra: correct cpu subtype")
> Fixes: 2d61f8821c7c ("mvebu: cortexa9: correct cpu subtype")
> Fixes: 8dcc1087602e ("toolchain: ARM: Fix toolchain compilation for gcc 8.x")
> Signed-off-by: Petr Štetiar <ynezz at true.cz>

For the tegra target
Tested-by: Tomasz Maciej Nowak <tomek_n at o2.pl>

> ---
>  include/target.mk                     | 3 +++
>  target/linux/mvebu/cortexa9/target.mk | 2 +-
>  target/linux/tegra/Makefile           | 2 +-
>  3 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/include/target.mk b/include/target.mk
> index 9bd4c14936c1..94ea1a9e0001 100644
> --- a/include/target.mk
> +++ b/include/target.mk
> @@ -179,6 +179,9 @@ ifeq ($(DUMP),1)
>    endif
>    ifneq ($(findstring arm,$(ARCH)),)
>      CPU_TYPE ?= xscale
> +    ifeq ($(CONFIG_SOFT_FLOAT),)
> +      CPU_CFLAGS_vfpv3 = -mfpu=vfpv3-d16
> +    endif
>    endif
>    ifeq ($(ARCH),powerpc)
>      CPU_CFLAGS_603e:=-mcpu=603e
> diff --git a/target/linux/mvebu/cortexa9/target.mk b/target/linux/mvebu/cortexa9/target.mk
> index cdd4d86e4936..2a75599bc9a3 100644
> --- a/target/linux/mvebu/cortexa9/target.mk
> +++ b/target/linux/mvebu/cortexa9/target.mk
> @@ -10,5 +10,5 @@ include $(TOPDIR)/rules.mk
>  ARCH:=arm
>  BOARDNAME:=Marvell Armada 37x/38x/XP
>  CPU_TYPE:=cortex-a9
> -CPU_SUBTYPE:=vfpv3-d16
> +CPU_SUBTYPE:=vfpv3
>  KERNELNAME:=zImage dtbs
> diff --git a/target/linux/tegra/Makefile b/target/linux/tegra/Makefile
> index 5dd4d439849e..0b48fc16baa2 100644
> --- a/target/linux/tegra/Makefile
> +++ b/target/linux/tegra/Makefile
> @@ -11,7 +11,7 @@ BOARD := tegra
>  BOARDNAME := NVIDIA Tegra
>  FEATURES := audio boot-part display ext4 fpu gpio pci pcie rootfs-part rtc squashfs usb
>  CPU_TYPE := cortex-a9
> -CPU_SUBTYPE := vfpv3-d16
> +CPU_SUBTYPE := vfpv3
>  
>  KERNEL_PATCHVER := 5.4
>  KERNEL_TESTING_PATCHVER := 5.4
> 
> _______________________________________________
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> openwrt-devel at lists.openwrt.org
> https://lists.openwrt.org/mailman/listinfo/openwrt-devel
> 
-- 
TMN

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