[OpenWrt-Devel] [PATCH] ath79: add AR934x NAND Flash Controller driver

David Bauer mail at david-bauer.net
Sun Oct 13 15:12:28 EDT 2019

Hello Michal,

On 10/11/19 10:50 AM, Michal Cieslakiewicz wrote:
> This patch contains updated driver for Atheros NAND Flash Controller
> written originally by Gabor Juhos for ar71xx (aka 'ar934x-nfc').
> ath79 version has adapted to work with kernel 4.19 and Device Tree.
> It has also been renamed to 'ar934x-nand' to avoid confusion with
> Near-Field Communication technology.
> Controller is present on Atheros AR934x SoCs and required for accessing
> internal flash storage on routers like Netgear WNDR4300.
> This port preserves all NAND programming code while moving platform
> configuration to Device Tree and replacing some kernel functions marked
> for retirement by 4.19.
> Suitable definition is included in 'ar934x.dtsi' ('nand at 1b000200' section).
> Most important changes to ar71xx version are:
> * old kernel sections of code removed
> * 'bool swap_dma' provided by platform data is now set by boolean DT
>   property 'qca,nand-swap-dma'
> * board-supplied (mach-*.c code) platform data removed - its elements
>   become either unused, redundant or replaced by DT methods (like reset)
> * IRQ is reserved by devm_request_irq() so free_irq() is not needed anymore
> * calls to deprecated nand_scan_ident() + nand_scan_tail() function pair
>   replaced by using recommended nand_scan() with attach_chip() callback
> * ECC is set to hardware by default, can be overriden by standard DT
>   'nand-ecc-*' properties (software Hamming or BCH are other options)
> This driver has been successfully tested on Netgear WNDR4300 running
> experimental ath79 OpenWrt master branch.

I've tested your patch on my Aerohive HiveAP-121 (patch to follow).
While it worked most of the times, in around 1 out of 5 boot attempts, the
driver will fail to probe:

[    3.885899] nand: device found, Manufacturer ID: 0xad, Chip ID: 0xf1
[    3.961915] nand: Hynix NAND 128MiB 3,3V 8-bit
[    4.015027] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
[    4.105743] Scanning device for bad blocks
[    4.654817] random: fast init done
[    5.604831] ar934x-nand 1b000200.nand: read operation failed on page 1664
[    5.685985] nand_bbt: can't scan flash and build the RAM-based BBT
[    5.759938] ar934x-nand 1b000200.nand: nand_scan failed, err:-145
[    5.832877] ar934x-nand: probe of 1b000200.nand failed with error -145

I've noticed the reset sequence in ar934x_nfc_hw_init is missing compared to the ar71xx
implementation. Adding this back in, the NAND probes flawlessly (sample size 10).

See my staging tree for my alteration. If you are good with it, i would squash it on your
commit. [0] [1]

Best wishes

[0] https://git.openwrt.org/?p=openwrt/staging/blocktrron.git;a=shortlog;h=refs/heads/ath79-nfc
[1] https://git.openwrt.org/?p=openwrt/staging/blocktrron.git;a=commitdiff;h=3621acfec49a40fe115598367d2db92855b98d4f

openwrt-devel mailing list
openwrt-devel at lists.openwrt.org

More information about the openwrt-devel mailing list