[OpenWrt-Devel] OpenWrt on RISC-V

Alex Guo xfguo at xfguo.org
Sat Nov 3 06:35:36 EDT 2018


It's Hifive Unleased, https://www.crowdsupply.com/sifive/hifive-unleashed

On 11/3/18 5:44 PM, Outback Dingo wrote:
> On Sat, Nov 3, 2018 at 3:29 PM Alex Guo <xfguo at xfguo.org> wrote:
>> Hi Zoltan,
>>
>> Nice work.
>>
>> I'm also trying 4.19 kernel in microsemi pcie board with some wifi card
>> recently, I will try your port on that borad.
>>
>> Best,
>>
>> Alex
>>
> Which HiFive ?  I have a HiFive1  sitting here on my desk lookkng for
> an OS... I was going to do Zephyr on it... but now.....
>
>> On 11/3/18 10:50 AM, Zoltan HERPAI wrote:
>>> Hi all,
>>>
>>> I'm happy to announce a port of RISC-V for OpenWrt. For those who
>>> haven't heard about it, RISC-V is a new CPU architecture coming from
>>> Berkeley, and is a free, open, extensible ISA, maintained by a
>>> non-profit foundation, included in the Linux kernel since 4.15.
>>>
>>> Current status is:
>>> - based on 4.19 - pull requests and patches for trunk will be sent
>>> once support for 4.19 is merged into mainline and core package changes
>>> are worked out. Until then, the port is in a staging tree [1]
>>> - mainline musl support is expected for musl 1.21, patches are
>>> included in the tree [2] for the current 1.20 for testing
>>> - currently builds with glibc as default
>>> - OpenWrt packages are built regularly on an external buildbot
>>> - documentation is added to the wiki [3]
>>>
>>> Currently you have three ways to run RISC-V:
>>> - Virtex7-based FPGA implementation of the core (most expensive)
>>> - HiFive Unleashed (official Linux devboard, less expensive) [4]
>>> - QEMU (free, support for riscv merged into qemu-2.12) [5]
>>>
>>> The target supports the last two. There are further development boards
>>> expected in the next few months. For further reading on the
>>> architecture and its state, please refer to this site [6].
>>>
>>> The staging tree includes various fixes for the core package changes
>>> appeared with 4.19. Given the state of 4.19 currently, please consider
>>> this an experimental port - you won't be able to run quake on it yet,
>>> sorry. [7]
>>>
>>> [1]
>>> https://git.openwrt.org/?p=openwrt/staging/wigyori.git;a=shortlog;h=refs/heads/riscv-201810
>>> [2]
>>> https://git.openwrt.org/?p=openwrt/staging/wigyori.git;a=commit;h=f5fe060b9ccc7d64d3b1764852b6e2b9273d5cad
>>> [3] https://openwrt.org/docs/techref/hardware/soc/soc.sifive
>>> [4] https://openwrt.org/toh/hifive/unleashed
>>> [5]
>>> https://openwrt.org/docs/guide-user/virtualization/qemu#openwrt_in_qemu_risc-v
>>> [6] https://riscv.org/
>>> [7] https://archive.fosdem.org/2018/schedule/event/riscv/
>>>
>>> Regards,
>>> Zoltan Herpai
>>>
>>>
>>>
>>> _______________________________________________
>>> openwrt-devel mailing list
>>> openwrt-devel at lists.openwrt.org
>>> https://lists.openwrt.org/mailman/listinfo/openwrt-devel
>> _______________________________________________
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>> https://lists.openwrt.org/mailman/listinfo/openwrt-devel

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