[OpenWrt-Devel] [PATCH 1/2] ramips: Add back some non-mt7621 code that staging removed

Rosen Penev rosenp at gmail.com
Wed May 23 22:24:42 EDT 2018


Staging is meant only for mt7621 but for OpenWrt more is needed.

Signed-off-by: Rosen Penev <rosenp at gmail.com>
---
 .../files-4.14/drivers/mmc/host/mtk-mmc/sd.c   | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c b/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c
index 2a032fcba1..97ae927d2d 100644
--- a/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c
+++ b/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c
@@ -2209,7 +2209,23 @@ static int msdc_drv_probe(struct platform_device *pdev)
 
 	// Set the pins for sdxc to sdxc mode
 	//FIXME: this should be done by pinctl and not by the sd driver
-	reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3 << 18);
+	if (ralink_soc == MT762X_SOC_MT7620A ||
+	    ralink_soc == MT762X_SOC_MT7621AT) {
+		reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE +
+						  0x60)) & ~(0x3 << 18);
+		if (ralink_soc == MT762X_SOC_MT7620A)
+			reg |= 0x1 << 18;
+	} else {
+		reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c));
+		reg |= 0x1e << 16;
+		sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c), reg);
+		reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE +
+						  0x60)) & ~(0x3 << 10);
+#if defined(CONFIG_MTK_MMC_EMMC_8BIT)
+		reg |= 0x3 << 26 | 0x3 << 28 | 0x3 << 30;
+#endif
+	}
+
 	sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x60), reg);
 
 	hw = &msdc0_hw;
-- 
2.17.0


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