[OpenWrt-Devel] ath7:9: ar9342/ar1022 board with pcie 5Ghz wireless worked for ar71xx but not ath79

Mon Dec 10 22:16:48 EST 2018

On 2018-12-10 8:59 p.m., Daniel F. Dickinson wrote:
> Hi all,
>
> I'm not sure what's changed but the PowerCloud CR5000 DTS for ath79 no 
> longer works for 5GHz wireless (everything else does though).  It 
> worked for ar71xx in 18.06.1 (have not yet tried ar71xx in master).

So a few details I missed; it worked on ath79 master when I first added 
the DTS (so while a significant number commits ago, it's probably 
bisectable if need be though I would of course double check that commit 
worked before going through a bisect).  Also it work on master with 
4.9.  And finally it half-works on current master ar71xx -- that is the 
IRQs are completely different and the (wrong) MAC address comes from the 
PCI EEPROM instead of the mtd-based MAC (so ap94_pci_init is not 
resulting in the MAC address being used from art partition anymore).

Are there folks who can help if I post the relevant boot logs from 
various points and time, or is there a better way to proceed?

My hunch is the switch to wireless backports is the culprit and 
bisecting isn't going to help much because the backports commit changes 
a whack of code that's in play.

>
> It tried some changes discussed on 
> https://github.com/openwrt/openwrt/pull/1613 (which I closed).
>
> I suspect the culprit is related to the ap94_pci_init(NULL, NULL, 
> NULL, <5ghz_mac_offset>) call in ar71xx[1] is not replicated in the 
> DTS[2]
>
> Boot appears fine but errors show up when actually attempting to use 
> the interface (not that my tree adds qca,disable-2ghz to the pcie node 
> as otherwise it's using the wrong band from the pcie card).
>
> Boot logs for ath79 show:
>
> [snip]
> [    0.159193] PCI host bridge /ahb/apb/pcie-controller at 180c0000 ranges:
> [    0.166070]  MEM 0x0000000010000000..0x0000000013ffffff
> [    0.171582]   IO 0x0000000000000000..0x0000000000000000
> [    0.201206] PCI host bridge to bus 0000:00
> [    0.205545] pci_bus 0000:00: root bus resource [mem 
> 0x10000000-0x13ffffff]
> [    0.212852] pci_bus 0000:00: root bus resource [io  0x0000]
> [    0.218723] pci_bus 0000:00: root bus resource [??? 0x00000000 
> flags 0x0]
> [    0.225893] pci_bus 0000:00: No busn resource found for root bus, 
> will use [bus 00-ff]
> [    0.234291] pci 0000:00:00.0: [168c:0030] type 00 class 0x028000
> [    0.234354] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff 
> 64bit]
> [    0.234411] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x0000ffff 
> pref]
> [    0.234497] pci 0000:00:00.0: supports D1
> [    0.234508] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
> [    0.234792] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated 
> to 00
> [    0.234826] pci 0000:00:00.0: BAR 0: assigned [mem 
> 0x10000000-0x1001ffff 64bit]
> [    0.242606] pci 0000:00:00.0: BAR 6: assigned [mem 
> 0x10020000-0x1002ffff pref]
> [snip]
> [    9.061058] ath: EEPROM regdomain: 0x0
> [    9.061069] ath: EEPROM indicates default country code should be used
> [    9.061074] ath: doing EEPROM country->regdmn map search
> [    9.061091] ath: country maps to regdmn code: 0x3a
> [    9.061098] ath: Country alpha2 being used: US
> [    9.061103] ath: Regpair used: 0x3a
> [    9.077030] ieee80211 phy0: Selected rate control algorithm 
> 'minstrel_ht'
> [    9.079152] ieee80211 phy0: Atheros AR9340 Rev:1 mem=0xb8100000, 
> irq=11
> [    9.086530] PCI: Enabling device 0000:00:00.0 (0000 -> 0002)
> [    9.235699] ath: phy1: disabling 2GHz band
> [    9.241044] ath: EEPROM regdomain: 0x0
> [    9.241050] ath: EEPROM indicates default country code should be used
> [    9.241054] ath: doing EEPROM country->regdmn map search
> [    9.241072] ath: country maps to regdmn code: 0x3a
> [    9.241079] ath: Country alpha2 being used: US
> [    9.241083] ath: Regpair used: 0x3a
> [    9.476205] ieee80211 phy1: Selected rate control algorithm 
> 'minstrel_ht'
> [    9.478461] ieee80211 phy1: Atheros AR9300 Rev:3 mem=0xb0000000, 
> irq=13
> [snip]
>
> And when attempting to use phy1 (5GHz wireless):
>
> root at OpenWrt:/# iwinfo wlan1 info
>
> wlan1     ESSID: unknown
>           Access Point: 68:51:B7:80:2B:BE
>           Mode: Client  Channel: unknown (unknown)
>           Tx-Power: 25 dBm  Link Quality: unknown/70
>           Signal: unknown  Noise: unknown
>           Bit Rate: unknown
>           Encryption: unknown
>           Type: nl80211  HW Mode(s): 802.11an
>           Hardware: 168C:0030 168C:3116 [Generic MAC80211]
>           TX power offset: unknown
>           Frequency offset: unknown
>           Supports VAPs: yes  PHY name: phy1
> root at OpenWrt:/# iwinfo wlan1 scan
> [   36.472062] ath: phy1: Unable to reset hardware; reset status -5 
> (freq 5180 MHz)
> [   36.710068] ath: phy1: Unable to reset channel, reset status -5
> [   36.716420] IPv6: ADDRCONF(NETDEV_UP): wlan1: link is not ready
> [   36.950537] ath: phy1: Unable to reset channel, reset status -5
> [repeats]
> [   39.895120] ath: phy1: Could not kill baseband RX
> [repeat the above two error messages]
>
> Any ideas / help / advice on debugging would be greatly appreciated.
>
> Regards,
>
> Daniel
>
> [1]](https://github.com/openwrt/openwrt/blob/f6e9f2377119965d4db164568b4a90c4e895cd3d/target/linux/ar71xx/files/arch/mips/ath79/mach-cr5000.c#L156) 
>
>
> [2](https://github.com/openwrt/openwrt/blob/master/target/linux/ath79/dts/ar9344_pcs_cr5000.dts) 

Regards,

Daniel

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