[OpenWrt-Devel] [PATCH 4/4] ARM: dts: add PCI to the Gemini DTSI
linus.walleij at linaro.org
Sat Feb 11 06:17:17 EST 2017
On Fri, Feb 10, 2017 at 4:40 PM, Arnd Bergmann <arnd at arndb.de> wrote:
> On Monday, February 6, 2017 10:55:03 AM CET Hans Ulli Kroll wrote:
>> from my IB 4220 sources.
>> #define IRQ_PCI_INTA PCI_IRQ_OFFSET + 0
>> #ifndef CONFIG_DUAL_PCI
>> #define IRQ_PCI_INTB PCI_IRQ_OFFSET + 1
>> #define IRQ_PCI_INTC PCI_IRQ_OFFSET + 2
>> #define IRQ_PCI_INTD PCI_IRQ_OFFSET + 3
>> #define IRQ_PCI_INTB 27
>> #define IRQ_PCI_INTC 28
>> #define IRQ_PCI_INTD 29
>> CONFIG_DUAL_PCI is never used
>> IRQ_PCIB - IRQ_PCID or IRQ_PCI_INTB - IRQ_PCI_INTD are also never used.
> The source code that Linus quoted earlier had references to
> 'IRQ_PCI_INTA +n' though, which is basically the same thing.
There is essentially two versions of the IP block, one which has
a cascaded interrupt controller in the PCI host bridge, and one
named "dual PCI" that has dedicated IRQs for PCIA, B, C, D on
the primary interrupt controller.
I'll try to codify it into the driver so it's clear how this works on the
I'm also pretty sure this is a faraday IP block and not something
from Storlink/Storm/Cortina, so I will rename the compatible strings
etc reflecting that.
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