[OpenWrt-Devel] [PATCH 6/8] DTS: Add EA8500 device tree

Adrian Panella ianchi74 at outlook.com
Thu Mar 31 21:54:25 EDT 2016


From: Adrian Panella <ianchi74 at outlook.com>
Date: Thu, 17 Mar 2016 22:03:41 -0600
Subject: [PATCH 6/8] DTS: Add EA8500 device tree

---
  .../arch/arm/boot/dts/qcom-ipq8064-ea8500.dts      | 368 
+++++++++++++++++++++
  .../802-ARM-qcom-add-Linksys-EA8500-dts.patch      |  11 +
  2 files changed, 379 insertions(+)
  create mode 100644 
target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
  create mode 100644 
target/linux/ipq806x/patches-3.18/802-ARM-qcom-add-Linksys-EA8500-dts.patch

diff --git 
a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts 
b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
new file mode 100644
index 0000000..bb4632a
--- /dev/null
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
@@ -0,0 +1,368 @@
+#include "qcom-ipq8064-v1.0.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+    model = "Linksys EA8500 WiFi Router";
+    compatible = "linksys,ea8500", "qcom,ipq8064";
+
+    memory at 0 {
+        reg = <0x42000000 0x1e000000>;
+        device_type = "memory";
+    };
+
+    reserved-memory {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+        rsvd at 41200000 {
+            reg = <0x41200000 0x300000>;
+            no-map;
+        };
+    };
+
+    aliases {
+        serial0 = &uart4;
+        mdio-gpio0 = &mdio0;
+    };
+
+    chosen {
+        bootargs = "console=ttyMSM0,115200n8";
+        linux,stdout-path = "serial0:115200n8";
+    };
+
+    soc {
+        pinmux at 800000 {
+            i2c4_pins: i2c4_pinmux {
+                pins = "gpio12", "gpio13";
+                function = "gsbi4";
+                bias-disable;
+            };
+
+            nand_pins: nand_pins {
+                mux {
+                    pins = "gpio34", "gpio35", "gpio36",
+                           "gpio37", "gpio38", "gpio39",
+                           "gpio40", "gpio41", "gpio42",
+                           "gpio43", "gpio44", "gpio45",
+                           "gpio46", "gpio47";
+                    function = "nand";
+                    drive-strength = <10>;
+                    bias-disable;
+                };
+                pullups {
+                    pins = "gpio39";
+                    bias-pull-up;
+                };
+                hold {
+                    pins = "gpio40", "gpio41", "gpio42",
+                           "gpio43", "gpio44", "gpio45",
+                           "gpio46", "gpio47";
+                    bias-bus-hold;
+                };
+            };
+
+            mdio0_pins: mdio0_pins {
+                mux {
+                    pins = "gpio0", "gpio1";
+                    function = "gpio";
+                    drive-strength = <8>;
+                    bias-disable;
+                };
+            };
+
+            rgmii2_pins: rgmii2_pins {
+                mux {
+                    pins = "gpio27", "gpio28", "gpio29", "gpio30", 
"gpio31", "gpio32",
+                           "gpio51", "gpio52", "gpio59", "gpio60", 
"gpio61", "gpio62" ;
+                    function = "rgmii2";
+                    drive-strength = <8>;
+                    bias-disable;
+                };
+            };
+
+        };
+
+        gsbi at 16300000 {
+            qcom,mode = <GSBI_PROT_I2C_UART>;
+            status = "ok";
+            serial at 16340000 {
+                status = "ok";
+            };
+            /*
+             * The i2c device on gsbi4 should not be enabled.
+             * On ipq806x designs gsbi4 i2c is meant for exclusive
+             * RPM usage. Turning this on in kernel manifests as
+             * i2c failure for the RPM.
+             */
+        };
+
+        sata-phy at 1b400000 {
+            status = "ok";
+        };
+
+        sata at 29000000 {
+            status = "ok";
+        };
+
+        phy at 100f8800 {        /* USB3 port 1 HS phy */
+            status = "ok";
+        };
+
+        phy at 100f8830 {        /* USB3 port 1 SS phy */
+            status = "ok";
+        };
+
+        phy at 110f8800 {        /* USB3 port 0 HS phy */
+            status = "ok";
+        };
+
+        phy at 110f8830 {        /* USB3 port 0 SS phy */
+            status = "ok";
+        };
+
+        usb30 at 0 {
+            status = "ok";
+        };
+
+        usb30 at 1 {
+            status = "ok";
+        };
+
+        pcie0: pci at 1b500000 {
+            status = "ok";
+            phy-tx0-term-offset = <7>;
+        };
+
+        pcie1: pci at 1b700000 {
+            status = "ok";
+            phy-tx0-term-offset = <7>;
+        };
+
+        pcie2: pci at 1b900000 {
+            status = "ok";
+            phy-tx0-term-offset = <7>;
+        };
+
+        nand at 1ac00000 {
+            status = "ok";
+
+            pinctrl-0 = <&nand_pins>;
+            pinctrl-names = "default";
+
+            nand-ecc-strength = <4>;
+            nand-bus-width = <8>;
+
+            #address-cells = <1>;
+            #size-cells = <1>;
+
+            SBL1 at 0 {
+                label = "SBL1";
+                reg = <0x0000000 0x0040000>;
+                read-only;
+            };
+
+            MIBIB at 40000 {
+                label = "MIBIB";
+                reg = <0x0040000 0x0140000>;
+                read-only;
+            };
+
+            SBL2 at 180000 {
+                label = "SBL2";
+                reg = <0x0180000 0x0140000>;
+                read-only;
+            };
+
+            SBL3 at 2c0000 {
+                label = "SBL3";
+                reg = <0x02c0000 0x0280000>;
+                read-only;
+            };
+
+            DDRCONFIG at 540000 {
+                label = "DDRCONFIG";
+                reg = <0x0540000 0x0120000>;
+                read-only;
+            };
+
+            SSD at 660000 {
+                label = "SSD";
+                reg = <0x0660000 0x0120000>;
+                read-only;
+            };
+
+            TZ at 780000 {
+                label = "TZ";
+                reg = <0x0780000 0x0280000>;
+                read-only;
+            };
+
+            RPM at a00000 {
+                label = "RPM";
+                reg = <0x0a00000 0x0280000>;
+                read-only;
+            };
+
+            art: art at c80000 {
+                label = "art";
+                reg = <0x0c80000 0x0140000>;
+                read-only;
+            };
+
+            APPSBL at dc0000 {
+                label = "APPSBL";
+                reg = <0x0dc0000 0x0100000>;
+                read-only;
+            };
+
+            u_env at ec0000 {
+                label = "u_env";
+                reg = <0x0ec0000 0x0040000>;
+            };
+
+            s_env at f00000 {
+                label = "s_env";
+                reg = <0x0f00000 0x0040000>;
+            };
+
+            devinfo at f40000 {
+                label = "devinfo";
+                reg = <0x0f40000 0x0040000>;
+            };
+
+            linux at f80000 {
+                label = "kernel1";
+                reg = <0x0f80000 0x2800000>;  /* 3 MB spill to rootfs*/
+            };
+
+            rootfs at 1280000 {
+                label = "rootfs1";
+                reg = <0x1280000 0x2500000>;
+            };
+
+            linux2 at 3780000 {
+                label = "kernel2";
+                reg = <0x3780000 0x2800000>;
+            };
+
+            rootfs2 at 3a80000 {
+                label = "rootfs2";
+                reg = <0x3a80000 0x2500000>;
+            };
+
+            syscfg at 5f80000 {
+                label = "syscfg";
+                reg = <0x5f80000 0x2080000>;
+            };
+
+        };
+
+        mdio0: mdio {
+            compatible = "virtual,mdio-gpio";
+            #address-cells = <1>;
+            #size-cells = <0>;
+            gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
+            pinctrl-0 = <&mdio0_pins>;
+            pinctrl-names = "default";
+
+            phy0: ethernet-phy at 0 {
+                device_type = "ethernet-phy";
+                reg = <0>;
+                qca,ar8327-initvals = <
+                    0x00004 0x7600000   /* PAD0_MODE */
+                    0x00008 0x1000000   /* PAD5_MODE */
+                    0x0000c 0x80        /* PAD6_MODE */
+                    0x000e4 0x6a545     /* MAC_POWER_SEL */
+                    0x000e0 0xc74164de  /* SGMII_CTRL */
+                    0x0007c 0x4e        /* PORT0_STATUS */
+                    0x00094 0x4e        /* PORT6_STATUS */
+                    >;
+            };
+
+            phy4: ethernet-phy at 4 {
+                device_type = "ethernet-phy";
+                reg = <4>;
+            };
+        };
+
+        gmac1: ethernet at 37200000 {
+            status = "ok";
+            phy-mode = "rgmii";
+            qcom,id = <1>;
+            qcom,phy_mdio_addr = <4>;
+            qcom,poll_required = <1>;
+            qcom,rgmii_delay = <0>;
+            qcom,emulation = <0>;
+            pinctrl-0 = <&rgmii2_pins>;
+            pinctrl-names = "default";
+            fixed-link {
+                speed = <1000>;
+                full-duplex;
+            };
+        };
+        //lan
+        gmac2: ethernet at 37400000 {
+            status = "ok";
+            phy-mode = "sgmii";
+            qcom,id = <2>;
+            qcom,phy_mdio_addr = <0>;    /* none */
+            qcom,poll_required = <0>;    /* no polling */
+            qcom,rgmii_delay = <0>;
+            qcom,emulation = <0>;
+            fixed-link {
+                speed = <1000>;
+                full-duplex;
+            };
+        };
+    };
+
+    gpio-keys {
+        compatible = "gpio-keys";
+
+        wifi {
+            label = "wifi";
+            gpios = <&qcom_pinmux 67 1>;
+            linux,code = <KEY_WLAN>;
+        };
+
+        reset {
+            label = "reset";
+            gpios = <&qcom_pinmux 68 1>;
+            linux,code = <KEY_RESTART>;
+        };
+
+        wps {
+            label = "wps";
+            gpios = <&qcom_pinmux 65 1>;
+            linux,code = <KEY_WPS_BUTTON>;
+        };
+
+    };
+
+    gpio-leds {
+        compatible = "gpio-leds";
+
+        wps {
+            label = "ea8500:green:wps";
+            gpios = <&qcom_pinmux 53 0>;
+            default-state = "on";
+        };
+
+        power {
+            label = "ea8500:white:power";
+            gpios = <&qcom_pinmux 6 0>;
+            default-state = "on";
+        };
+
+        wifi {
+            label = "ea8500:green:wifi";
+            gpios = <&qcom_pinmux 54 0>;
+            default-state = "on";
+        };
+    };
+};
+
+&adm_dma {
+    status = "ok";
+};
diff --git 
a/target/linux/ipq806x/patches-3.18/802-ARM-qcom-add-Linksys-EA8500-dts.patch 
b/target/linux/ipq806x/patches-3.18/802-ARM-qcom-add-Linksys-EA8500-dts.patch
new file mode 100644
index 0000000..dba24c0
--- /dev/null
+++ 
b/target/linux/ipq806x/patches-3.18/802-ARM-qcom-add-Linksys-EA8500-dts.patch
@@ -0,0 +1,11 @@
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -363,6 +363,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+     qcom-ipq8064-db149.dtb \
+     qcom-ipq8064-r7500.dtb \
+     qcom-ipq8064-d7800.dtb \
++    qcom-ipq8064-ea8500.dtb \
+     qcom-msm8660-surf.dtb \
+     qcom-msm8960-cdp.dtb \
+     qcom-msm8974-sony-xperia-honami.dtb
+
-- 
1.9.1
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