[OpenWrt-Devel] lantiq: Initial linux 4.4 support (with SPI problems)

Martin Blumenstingl martin.blumenstingl at googlemail.com
Wed Jan 13 14:23:13 EST 2016

Hi John,

On Mon, Jan 11, 2016 at 3:25 PM, Martin Blumenstingl
<martin.blumenstingl at googlemail.com> wrote:
> Here's the kernel log from the TD-W8970: https://paste.kde.org/pia7p73i9
> I have debugged it and split_tplink_kernel gets 0x20000 as offset and
> 0x7A0000 as size (which looks correct). However, when mtd_read tries to
> read the magic bytes it only gets 0xFFFFFFFF.
I found out that reverting this upstream commit makes SPI work again: [0]

Then I had a deeper look at our SPI driver - that's where I need some
help from you.
Before the mentioned commit the call-graph for each spi_transfer
looked like this:
1) ltq_spi_setup_transfer(spi, transfer)
2) ltq_spi_chipselect(spi, BITBANG_CS_ACTIVE)
3) ndelay(100)
4) ltq_spi_txrx_bufs(spi, transfer)
5) ndelay(100)
6) ltq_spi_chipselect(spi, BITBANG_CS_INACTIVE)
7) ndelay(100)

After the mentioned commit the call-graph looks like this:
1) ltq_spi_chipselect(spi, BITBANG_CS_ACTIVE)
2) ltq_spi_setup_transfer(spi, transfer)
3) ltq_spi_txrx_bufs(spi, transfer)
4) ndelay(100)
5) ltq_spi_chipselect(spi, BITBANG_CS_INACTIVE)
6) ndelay(100)
7) ...more unrelated delays...
8) ndelay(100)
9) ltq_spi_chipselect(spi, BITBANG_CS_ACTIVE)
10) ndelay(100)

Currently ltq_spi_chipselect contains the code to leave configuration
mode and to set up the "per transfer" settings (like speed and "bits
per word") whenever it's called with BITBANG_CS_ACTIVE.
Once it's called with BITBANG_CS_INACTIVE it enters configuration mode again.
I first thought that I could simply solve this by moving the "per
transfer setup" from ltq_spi_chipselect to ltq_spi_setup_transfer (you
can find the patch here: [1]), but that resulted in broken SPI (even
with the the above commit reverted):
[    0.930215] m25p80 spi32766.3: unrecognized JEDEC id bytes: ff, ff, ff

Do you still remember if there is anything special that has to be
taken care of when modifying the
bits_per_word/clockmode/speed/chipselect registers?
I compared our SPI driver to the SSC (Synchronous Serial Controller)
driver from UGW 5.4 (I don't have anything newer) but I could not find
anything related.


[0] https://github.com/torvalds/linux/commit/0037686596832572bbca05ab168d9884d7d704c1
[1] https://paste.kde.org/pbmykthnc
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