[OpenWrt-Devel] [RFC] ar71xx: Reset QCA955x SGMII link on speed change

Sven Eckelmann sven.eckelmann at open-mesh.com
Mon Apr 4 12:24:38 EDT 2016

On Friday 01 April 2016 14:41:47 Sven Eckelmann wrote:
> From: Sven Eckelmann <sven.eckelmann at open-mesh.com>
> The SGMII link of the QCA955x seems to be unstable when the PHY changes the
> link speed. Reseting the SGMII and the PHY management control seems to
> resolve this problem.
> This was observed with an AR8033 and QCA9558
> The code of this RFC is not meant to be an actual patch. It should show
> what the u-boot for QCA955x does and what seemed to work(tm) in my limited
> tests. It would be interesting to know whether this was also noticed by
> other people and how they fixed it (when they fixed it).
> If it is already known than it would maybe good to find a better way to
> integrate it with ag71xx. Right now it just uses the set_speed callback to
> start the reset.
> Signed-off-by: Sven Eckelmann <sven.eckelmann at open-mesh.com>
> ---

Just did a search in the codeaurora repository. I found at least some
extra information:

* SGMII reset code (like in this "RFC"/u-boot):

* The IG_ACL_CSR (AG71XX_REG_IG_ACL) change from my second hack:
  (the information about the chip family is not that easily available
   in the original OpenWrt driver. so it is not that easy to implement
   without adding more stuff to pdata - but easy when the pdata can
   also be modified at the same time)

* The "description" of the SGMII_DEBUG register can be found in the
  u-boot sources (955x.h)


Kind regards,
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