[OpenWrt-Devel] Howto force mips64

Martin Fäcknitz faecknitz at hotsplots.de
Tue Jun 17 06:04:16 EDT 2014


Hi,

here are the patches which will fix the uclibc-mips64-tls problem:

--- a/toolchain/uClibc/patches-0.9.33.2/999-mips64-tprel.patch
+++ b/toolchain/uClibc/patches-0.9.33.2/999-mips64-tprel.patch
@@ -1,8 +1,19 @@
 Index: b/ldso/ldso/mips/elfinterp.c
 ===================================================================
---- a/ldso/ldso/mips/elfinterp.c	2014-02-12 16:54:05.000000000 +0100
-+++ b/ldso/ldso/mips/elfinterp.c	2014-02-12 16:54:15.000000000 +0100
-@@ -248,22 +248,22 @@
+--- a/ldso/ldso/mips/elfinterp.c	2012-05-15 09:20:09.000000000 +0200
++++ b/ldso/ldso/mips/elfinterp.c	2014-05-07 17:20:25.000000000 +0200
+@@ -239,31 +239,31 @@
+ 					case R_MIPS_TLS_DTPMOD64:
+ 					case R_MIPS_TLS_DTPMOD32:
+ 						if (tls_tpnt)
+-							*(ElfW(Word) *)reloc_addr = tls_tpnt->l_tls_modid;
++							*(ElfW(Addr) *)reloc_addr = tls_tpnt->l_tls_modid;
+ #ifdef __SUPPORT_LD_DEBUG__
+ 						_dl_dprintf(2, "TLS_DTPMOD : %s, %d, %d\n",
+-							symname, old_val, *((unsigned int *)reloc_addr));
++							symname, old_val, *((unsigned long *)reloc_addr));
+ #endif
+ 						break;
  
  					case R_MIPS_TLS_DTPREL64:
  					case R_MIPS_TLS_DTPREL32:
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.33.2/999-mips64-misc.patch
@@ -0,0 +1,141 @@
+Index: b/libc/sysdeps/linux/mips/sysdep.h
+===================================================================
+--- a/libc/sysdeps/linux/mips/sysdep.h	2012-05-15 09:20:09.000000000 +0200
++++ b/libc/sysdeps/linux/mips/sysdep.h	2014-02-15 14:10:01.000000000 +0100
+@@ -288,93 +288,52 @@
+    of GCC 3.4.3, this is sufficient.  */
+ #define FORCE_FRAME_POINTER alloca (4)
+ 
+-#undef internal_syscall5
+-#define internal_syscall5(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5)\
+-({									\
++#define internal_syscall5(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5) \
++({ 									\
+ 	long _sys_result;						\
+ 									\
+-	FORCE_FRAME_POINTER;						\
+ 	{								\
+-	register long __v0 __asm__("$2") ncs_init;			\
+-	register long __a0 __asm__("$4") = (long) arg1;			\
+-	register long __a1 __asm__("$5") = (long) arg2;			\
+-	register long __a2 __asm__("$6") = (long) arg3;			\
+-	register long __a3 __asm__("$7") = (long) arg4;			\
+-	__asm__ __volatile__ (						\
+-	".set\tnoreorder\n\t"						\
+-	"subu\t$29, 32\n\t"						\
+-	"sw\t%6, 16($29)\n\t"						\
++	register ARG_TYPE __v0 __asm__("$2") ncs_init;			\
++	register ARG_TYPE __a0 __asm__("$4") = (ARG_TYPE) arg1; 	\
++	register ARG_TYPE __a1 __asm__("$5") = (ARG_TYPE) arg2; 	\
++	register ARG_TYPE __a2 __asm__("$6") = (ARG_TYPE) arg3; 	\
++	register ARG_TYPE __a3 __asm__("$7") = (ARG_TYPE) arg4; 	\
++	register ARG_TYPE __a4 __asm__("$8") = (ARG_TYPE) arg5; 	\
++	__asm__ __volatile__ ( 						\
++	".set\tnoreorder\n\t" 						\
+ 	cs_init								\
+-	"syscall\n\t"							\
+-	"addiu\t$29, 32\n\t"						\
+-	".set\treorder"							\
+-	: "=r" (__v0), "+r" (__a3)					\
+-	: input, "r" (__a0), "r" (__a1), "r" (__a2),			\
+-	  "r" ((long)arg5)						\
+-	: __SYSCALL_CLOBBERS);						\
++	"syscall\n\t" 							\
++	".set\treorder" 						\
++	: "=r" (__v0), "+r" (__a3) 					\
++	: input, "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4)		\
++	: __SYSCALL_CLOBBERS); 						\
+ 	err = __a3;							\
+ 	_sys_result = __v0;						\
+ 	}								\
+ 	_sys_result;							\
+ })
+ 
+-#undef internal_syscall6
+-#define internal_syscall6(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5, arg6)\
+-({									\
++#define internal_syscall6(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5, arg6) \
++({ 									\
+ 	long _sys_result;						\
+ 									\
+-	FORCE_FRAME_POINTER;						\
+ 	{								\
+-	register long __v0 __asm__("$2") ncs_init;			\
+-	register long __a0 __asm__("$4") = (long) arg1;			\
+-	register long __a1 __asm__("$5") = (long) arg2;			\
+-	register long __a2 __asm__("$6") = (long) arg3;			\
+-	register long __a3 __asm__("$7") = (long) arg4;			\
+-	__asm__ __volatile__ (						\
+-	".set\tnoreorder\n\t"						\
+-	"subu\t$29, 32\n\t"						\
+-	"sw\t%6, 16($29)\n\t"						\
+-	"sw\t%7, 20($29)\n\t"						\
++	register ARG_TYPE __v0 __asm__("$2") ncs_init;			\
++	register ARG_TYPE __a0 __asm__("$4") = (ARG_TYPE) arg1; 	\
++	register ARG_TYPE __a1 __asm__("$5") = (ARG_TYPE) arg2; 	\
++	register ARG_TYPE __a2 __asm__("$6") = (ARG_TYPE) arg3; 	\
++	register ARG_TYPE __a3 __asm__("$7") = (ARG_TYPE) arg4; 	\
++	register ARG_TYPE __a4 __asm__("$8") = (ARG_TYPE) arg5; 	\
++	register ARG_TYPE __a5 __asm__("$9") = (ARG_TYPE) arg6; 	\
++	__asm__ __volatile__ ( 						\
++	".set\tnoreorder\n\t" 						\
+ 	cs_init								\
+-	"syscall\n\t"							\
+-	"addiu\t$29, 32\n\t"						\
+-	".set\treorder"							\
+-	: "=r" (__v0), "+r" (__a3)					\
+-	: input, "r" (__a0), "r" (__a1), "r" (__a2),			\
+-	  "r" ((long)arg5), "r" ((long)arg6)				\
+-	: __SYSCALL_CLOBBERS);						\
+-	err = __a3;							\
+-	_sys_result = __v0;						\
+-	}								\
+-	_sys_result;							\
+-})
+-
+-#undef internal_syscall7
+-#define internal_syscall7(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5, arg6, arg7)\
+-({									\
+-	long _sys_result;						\
+-									\
+-	FORCE_FRAME_POINTER;						\
+-	{								\
+-	register long __v0 __asm__("$2") ncs_init;			\
+-	register long __a0 __asm__("$4") = (long) arg1;			\
+-	register long __a1 __asm__("$5") = (long) arg2;			\
+-	register long __a2 __asm__("$6") = (long) arg3;			\
+-	register long __a3 __asm__("$7") = (long) arg4;			\
+-	__asm__ __volatile__ (						\
+-	".set\tnoreorder\n\t"						\
+-	"subu\t$29, 32\n\t"						\
+-	"sw\t%6, 16($29)\n\t"						\
+-	"sw\t%7, 20($29)\n\t"						\
+-	"sw\t%8, 24($29)\n\t"						\
+-	cs_init								\
+-	"syscall\n\t"							\
+-	"addiu\t$29, 32\n\t"						\
+-	".set\treorder"							\
+-	: "=r" (__v0), "+r" (__a3)					\
+-	: input, "r" (__a0), "r" (__a1), "r" (__a2),			\
+-	  "r" ((long)arg5), "r" ((long)arg6), "r" ((long)arg7)		\
+-	: __SYSCALL_CLOBBERS);						\
++	"syscall\n\t" 							\
++	".set\treorder" 						\
++	: "=r" (__v0), "+r" (__a3) 					\
++	: input, "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4),	\
++	  "r" (__a5)							\
++	: __SYSCALL_CLOBBERS); 						\
+ 	err = __a3;							\
+ 	_sys_result = __v0;						\
+ 	}								\
+@@ -382,8 +341,8 @@
+ })
+ 
+ #undef __SYSCALL_CLOBBERS
+-#define __SYSCALL_CLOBBERS "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", \
+-	"$14", "$15", "$24", "$25", "memory"
++#define __SYSCALL_CLOBBERS "$1", "$3", "$10", "$11", "$12", "$13", \
++	"$14", "$15", "$24", "$25", "hi", "lo", "memory"
+ 
+ /* Pointer mangling is not yet supported for MIPS.  */
+ #define PTR_MANGLE(var) (void) (var)
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.33.2/999-mips64-tprel.patch
@@ -0,0 +1,31 @@
+Index: b/ldso/ldso/mips/elfinterp.c
+===================================================================
+--- a/ldso/ldso/mips/elfinterp.c	2014-02-12 16:54:05.000000000 +0100
++++ b/ldso/ldso/mips/elfinterp.c	2014-02-12 16:54:15.000000000 +0100
+@@ -248,22 +248,22 @@
+ 
+ 					case R_MIPS_TLS_DTPREL64:
+ 					case R_MIPS_TLS_DTPREL32:
+-						*(ElfW(Word) *)reloc_addr +=
++						*(ElfW(Addr) *)reloc_addr +=
+ 							TLS_DTPREL_VALUE (symbol_addr);
+ #ifdef __SUPPORT_LD_DEBUG__
+ 						_dl_dprintf(2, "TLS_DTPREL : %s, %x, %x\n",
+-							symname, old_val, *((unsigned int *)reloc_addr));
++							symname, old_val, *((unsigned long *)reloc_addr));
+ #endif
+ 						break;
+ 
+ 					case R_MIPS_TLS_TPREL32:
+ 					case R_MIPS_TLS_TPREL64:
+ 						CHECK_STATIC_TLS((struct link_map *)tls_tpnt);
+-						*(ElfW(Word) *)reloc_addr +=
++						*(ElfW(Addr) *)reloc_addr +=
+ 							TLS_TPREL_VALUE (tls_tpnt, symbol_addr);
+ #ifdef __SUPPORT_LD_DEBUG__
+ 						_dl_dprintf(2, "TLS_TPREL  : %s, %x, %x\n",
+-							symname, old_val, *((unsigned int *)reloc_addr));
++							symname, old_val, *((unsigned long *)reloc_addr));
+ #endif
+ 						break;
+ 				}
--- /dev/null
+++ b/toolchain/uClibc/patches-0.9.33.2/999-nptl-mips64.patch
@@ -0,0 +1,30 @@
+Index: b/libpthread/nptl/sysdeps/unix/sysv/linux/mips/sysdep-cancel.h
+===================================================================
+--- a/libpthread/nptl/sysdeps/unix/sysv/linux/mips/sysdep-cancel.h	2012-05-15 09:20:09.000000000 +0200
++++ b/libpthread/nptl/sysdeps/unix/sysv/linux/mips/sysdep-cancel.h	2014-02-16 21:51:58.000000000 +0100
+@@ -41,7 +41,7 @@
+       .align 2;								      \
+   L(pseudo_start):							      \
+       cfi_startproc;							      \
+-  99: PSEUDO_ERRJMP							      \
++  99: sd ra, 8(sp); .cpsetup t9, 0, name;  move a0, v0; la t9, __syscall_error; jal t9; ld gp, 0(sp); ld ra, 8(sp); daddiu sp,sp, 16; jr ra; nop; \
+   .type __##syscall_name##_nocancel, @function;				      \
+   .globl __##syscall_name##_nocancel;					      \
+   __##syscall_name##_nocancel:						      \
+@@ -56,6 +56,8 @@
+   ENTRY (name)								      \
+     .set noreorder;							      \
+     PSEUDO_CPLOAD							      \
++    daddiu sp, sp, -16;	\
++    sd gp, 0(sp); /* store gp */ \
+     .set reorder;							      \
+     SINGLE_THREAD_P(v1);						      \
+     bne zero, v1, L(pseudo_cancel);					      \
+@@ -64,6 +66,7 @@
+     syscall;								      \
+     .set reorder;							      \
+     bne a3, zero, 99b;					       		      \
++    daddiu sp, sp, 16; \
+     ret;								      \
+   L(pseudo_cancel):							      \
+     SAVESTK_##args;						              \

however, gcc-4.8 still compile invalid tls code.

greets

On 17.06.2014 11:36, John Crispin wrote:
> 
> 
> On 17/06/2014 11:24, Martin Fäcknitz wrote:
>> uclibc's mips64 support is broken, so you have to use glibc.
>> gcc-4.8 doesn't work for me (invalid TLS related code), therefore
>> use gcc-4.6.
> 
> Hi,
> 
> yes, utterly broken :) i have been talking to the guys at imgtec about
> this and there are people working on this matter. i would expect it to
> take a few months though until this is all fixed and has treacled down
> to openwrt.
> 
> 	John
> _______________________________________________
> openwrt-devel mailing list
> openwrt-devel at lists.openwrt.org
> https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
> 
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