[PATCH v3 4/4] arm64: dts: ti: Enable MCU MCANs for AM62x
Nishanth Menon
nm at ti.com
Mon May 1 17:19:58 PDT 2023
On 17:31-20230501, Judith Mendez wrote:
> On AM62x there are no hardware interrupts routed to A53 GIC
> interrupt controller for MCU MCAN IPs, so MCU MCANs were not
> added to the MCU dtsi. In this patch series an hrtimer is introduced
> to MCAN driver to generate software interrupts. Now add MCU MCAN
> nodes to the MCU dtsi but disable the MCAN devices by default.
>
> AM62x does not carry on-board CAN transceivers, so instead of
> changing DTB permanently use an overlay to enable MCU MCANs and to
> add CAN transceiver nodes.
>
> If there is no hardware interrupt and timer method is used, remove
> interrupt properties and add poll-interval to enable the hrtimer
> per MCAN node.
>
> This DT overlay can be used with the following EVM:
> Link: https://www.ti.com/tool/TCAN1042DEVM
>
> Signed-off-by: Judith Mendez <jm at ti.com>
> ---
> Changelog:
> v3:
> 1. Add link for specific board
>
> arch/arm64/boot/dts/ti/Makefile | 2 +-
> arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++
> .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso | 57 +++++++++++++++++++
NAK - I dont see "DO NOT MERGE" in $subject.
please send this patch addressing previous comments with arch maintainer
tree not the mcan tree.
> 3 files changed, 82 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
>
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index abe15e76b614..c76be3888e4d 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -9,7 +9,7 @@
> # alphabetically.
>
> # Boards with AM62x SoC
> -k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo
> +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo k3-am625-sk-mcan-mcu.dtbo
> dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb
> dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
> dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> index 076601a41e84..20462f457643 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
> @@ -141,4 +141,28 @@
> /* Tightly coupled to M4F */
> status = "reserved";
> };
> +
> + mcu_mcan1: can at 4e00000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x4e00000 0x00 0x8000>,
> + <0x00 0x4e08000 0x00 0x200>;
> + reg-names = "message_ram", "m_can";
> + power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
> + clock-names = "hclk", "cclk";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + status = "disabled";
> + };
> +
> + mcu_mcan2: can at 4e10000 {
> + compatible = "bosch,m_can";
> + reg = <0x00 0x4e10000 0x00 0x8000>,
> + <0x00 0x4e18000 0x00 0x200>;
> + reg-names = "message_ram", "m_can";
> + power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
> + clock-names = "hclk", "cclk";
> + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> + status = "disabled";
> + };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
> new file mode 100644
> index 000000000000..5145b3de4f9b
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
> @@ -0,0 +1,57 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/**
> + * DT overlay for MCAN in MCU domain on AM625 SK
> + *
> + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include "k3-pinctrl.h"
> +
> +&{/} {
> + transceiver2: can-phy1 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + };
> +
> + transceiver3: can-phy2 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + };
> +};
> +
> +&mcu_pmx0 {
> + mcu_mcan1_pins_default: mcu-mcan1-pins-default {
> + pinctrl-single,pins = <
> + AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
> + AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
> + >;
> + };
> +
> + mcu_mcan2_pins_default: mcu-mcan2-pins-default {
> + pinctrl-single,pins = <
> + AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
> + AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
> + >;
> + };
> +};
> +
> +&mcu_mcan1 {
> + poll-interval;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_mcan1_pins_default>;
> + phys = <&transceiver2>;
> + status = "okay";
> +};
> +
> +&mcu_mcan2 {
> + poll-interval;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_mcan2_pins_default>;
> + phys = <&transceiver3>;
> + status = "okay";
> +};
> --
> 2.17.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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